[VE][Test] Make Scalar/va_arg test generic

[simoll]

Summary

Make match patterns more permissive to be invariant to register allocation choices.

[kaz7]

LGTM to pass atm. It's better to re-implement test cases for va-args in near future.

llvm/test/CodeGen/VE/Scalar/va_arg.ll

 ; RUN: llc < %s -mtriple=ve-unknown-unknown | FileCheck %s
 
 @.str = private unnamed_addr constant [6 x i8] c"a=%d\0A\00", align 1
 @.str.1 = private unnamed_addr constant [6 x i8] c"b=%d\0A\00", align 1
 @.str.2 = private unnamed_addr constant [6 x i8] c"c=%d\0A\00", align 1
 @.str.3 = private unnamed_addr constant [6 x i8] c"d=%u\0A\00", align 1
 @.str.4 = private unnamed_addr constant [6 x i8] c"e=%u\0A\00", align 1
 @.str.5 = private unnamed_addr constant [6 x i8] c"f=%u\0A\00", align 1
 @.str.6 = private unnamed_addr constant [6 x i8] c"g=%f\0A\00", align 1
 @.str.7 = private unnamed_addr constant [6 x i8] c"h=%p\0A\00", align 1
 @.str.8 = private unnamed_addr constant [7 x i8] c"i=%ld\0A\00", align 1
 @.str.9 = private unnamed_addr constant [7 x i8] c"j=%lf\0A\00", align 1
 @.str.10 = private unnamed_addr constant [7 x i8] c"j=%Lf\0A\00", align 1
 
 define i32 @func_vainout(i32, ...) {
 ; CHECK-LABEL: func_vainout:
-; CHECK:         ldl.sx %s1, 184(, %s9)
-; CHECK:         ld2b.sx %s19, 192(, %s9)
-; CHECK:         ld1b.sx %s22, 200(, %s9)
-; CHECK:         ldl.sx %s23, 208(, %s9)
-; CHECK:         ld2b.zx %s24, 216(, %s9)
-; CHECK:         ld1b.zx %s25, 224(, %s9)
-; CHECK:         ldu %s26, 236(, %s9)
-; CHECK:         ld %s27, 240(, %s9)
-; CHECK:         ld %s28, 248(, %s9)
-; CHECK:         ld %s29, 256(, %s9)
-; CHECK:         lea %s0, 279(, %s9)
-; CHECK:         and %s0, -16, %s0
-; CHECK:         lea %s2, 16(, %s0)
-; CHECK:         ld %s20, 8(, %s0)
-; CHECK:         ld %s21, (, %s0)
-; CHECK:         ld %s18, 16(, %s0)
+; CHECK:         ldl.sx %s{{.*}}, 184(, %s9)
+; CHECK:         ld2b.sx %s{{.*}}, 192(, %s9)
+; CHECK:         ld1b.sx %s{{.*}}, 200(, %s9)
+; CHECK:         ldl.sx %s{{.*}}, 208(, %s9)
+; CHECK:         ld2b.zx %s{{.*}}, 216(, %s9)
+; CHECK:         ld1b.zx %s{{.*}}, 224(, %s9)
+; CHECK:         ldu %s{{.*}}, 236(, %s9)
+; CHECK:         ld %s{{.*}}, 240(, %s9)
+; CHECK:         ld %s{{.*}}, 248(, %s9)
+; CHECK:         ld %s{{.*}}, 256(, %s9)
+; CHECK:         lea %{{.*}}, 279(, %s9)
+; CHECK:         and %{{.*}}, -16, %s0
+; CHECK:         lea %{{.*}}, 16(, %s0)
+; CHECK:         ld %s{{.*}}, 8(, %s0)
+; CHECK:         ld %s{{.*}}, (, %s0)
+; CHECK:         ld %s{{.*}}, 16(, %s0)
+; CHECK:         bsic
+; CHECK:         bsic
+; CHECK:         bsic
+; CHECK:         bsic
+; CHECK:         bsic
+; CHECK:         bsic
+; CHECK:         bsic
+; CHECK:         bsic
+; CHECK:         bsic
+; CHECK:         bsic
+; CHECK:         bsic
+; CHECK:         bsic
 
   %a = alloca i8*, align 8
   %a8 = bitcast i8** %a to i8*
   call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %a8)
   call void @llvm.va_start(i8* nonnull %a8)
   %p0 = va_arg i8** %a, i32
   %p1 = va_arg i8** %a, i16
   %p2 = va_arg i8** %a, i8