[X86][Costmodel] Load/store i32/f32 Stride=4 VF=8 interleaving costs

[lebedev.ri]

Summary

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/a6rxMG6ec - for intels Block RThroughput: =16.0; for ryzens, Block RThroughput: <=12.0
So could pick cost of 16.

For store we have:
https://godbolt.org/z/ced1bdqc9 - for intels Block RThroughput: =16.0; for ryzens, Block RThroughput: <=8.0
So we could pick cost of 16.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

[lebedev.ri]

Fix typo, NFC.

[RKSimon]

LGTM

llvm/lib/Target/X86/X86TargetTransformInfo.cpp

static const CostTblEntry AVX2InterleavedLoadTbl[] = {
       {4, MVT::v2i16, 6}, // (load 8i16 and) deinterleave into 4 x 2i16
       {4, MVT::v4i16, 17}, // (load 16i16 and) deinterleave into 4 x 4i16
       {4, MVT::v8i16, 33}, // (load 32i16 and) deinterleave into 4 x 8i16
       {4, MVT::v16i16, 75}, // (load 64i16 and) deinterleave into 4 x 16i16
       {4, MVT::v32i16, 150}, // (load 128i16 and) deinterleave into 4 x 32i16
 
       {4, MVT::v2i32, 4}, // (load 8i32 and) deinterleave into 4 x 2i32
       {4, MVT::v4i32, 8}, // (load 16i32 and) deinterleave into 4 x 4i32
+      {4, MVT::v8i32, 16}, // (load 32i32 and) deinterleave into 4 x 8i32
 
       {6, MVT::v2i8, 6}, // (load 12i8 and) deinterleave into 6 x 2i8
       {6, MVT::v4i8, 14}, // (load 24i8 and) deinterleave into 6 x 4i8
       {6, MVT::v8i8, 18}, // (load 48i8 and) deinterleave into 6 x 8i8
       {6, MVT::v16i8, 43}, // (load 96i8 and) deinterleave into 6 x 16i8
       {6, MVT::v32i8, 82}, // (load 192i8 and) deinterleave into 6 x 32i8
 
       {6, MVT::v2i16, 13}, // (load 12i16 and) deinterleave into 6 x 2i16
static const CostTblEntry AVX2InterleavedStoreTbl[] = {
       {4, MVT::v2i16, 2},  // interleave 4 x 2i16 into 8i16 (and store)
       {4, MVT::v4i16, 6},  // interleave 4 x 4i16 into 16i16 (and store)
       {4, MVT::v8i16, 10},  // interleave 4 x 8i16 into 32i16 (and store)
       {4, MVT::v16i16, 32},  // interleave 4 x 16i16 into 64i16 (and store)
       {4, MVT::v32i16, 64},  // interleave 4 x 32i16 into 128i16 (and store)
 
       {4, MVT::v2i32, 5},  // interleave 4 x 2i32 into 8i32 (and store)
       {4, MVT::v4i32, 6},  // interleave 4 x 4i32 into 16i32 (and store)
+      {4, MVT::v8i32, 16},  // interleave 4 x 8i32 into 32i32 (and store)
 
       {6, MVT::v2i8, 7},  // interleave 6 x 2i8 into 12i8 (and store)
       {6, MVT::v4i8, 9},  // interleave 6 x 4i8 into 24i8 (and store)
       {6, MVT::v8i8, 16},  // interleave 6 x 8i8 into 48i8 (and store)
       {6, MVT::v16i8, 27},  // interleave 6 x 16i8 into 96i8 (and store)
       {6, MVT::v32i8, 90},  // interleave 6 x 32i8 into 192i8 (and store)
 
       {6, MVT::v2i16, 10},  // interleave 6 x 2i16 into 12i16 (and store)

llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-4.ll

 ; AVX1: LV: Found an estimated cost of 15 for VF 2 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX1: LV: Found an estimated cost of 34 for VF 4 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX1: LV: Found an estimated cost of 76 for VF 8 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX1: LV: Found an estimated cost of 152 for VF 16 For instruction:   %v0 = load float, float* %in0, align 4
 ;
 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 5 for VF 2 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 10 for VF 4 For instruction:   %v0 = load float, float* %in0, align 4
-; AVX2: LV: Found an estimated cost of 76 for VF 8 For instruction:   %v0 = load float, float* %in0, align 4
+; AVX2: LV: Found an estimated cost of 20 for VF 8 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 152 for VF 16 For instruction:   %v0 = load float, float* %in0, align 4
 ;
 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 5 for VF 2 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 5 for VF 4 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 8 for VF 8 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 22 for VF 16 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 92 for VF 32 For instruction:   %v0 = load float, float* %in0, align 4

llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4.ll

 ; AVX1: LV: Found an estimated cost of 21 for VF 2 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX1: LV: Found an estimated cost of 42 for VF 4 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX1: LV: Found an estimated cost of 92 for VF 8 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX1: LV: Found an estimated cost of 184 for VF 16 For instruction:   %v0 = load i32, i32* %in0, align 4
 ;
 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 5 for VF 2 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 10 for VF 4 For instruction:   %v0 = load i32, i32* %in0, align 4
-; AVX2: LV: Found an estimated cost of 92 for VF 8 For instruction:   %v0 = load i32, i32* %in0, align 4
+; AVX2: LV: Found an estimated cost of 20 for VF 8 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 184 for VF 16 For instruction:   %v0 = load i32, i32* %in0, align 4
 ;
 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 5 for VF 2 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 5 for VF 4 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 8 for VF 8 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 22 for VF 16 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 92 for VF 32 For instruction:   %v0 = load i32, i32* %in0, align 4

llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-4.ll

 ; AVX1: LV: Found an estimated cost of 13 for VF 2 For instruction:   store float %v3, float* %out3, align 4
 ; AVX1: LV: Found an estimated cost of 30 for VF 4 For instruction:   store float %v3, float* %out3, align 4
 ; AVX1: LV: Found an estimated cost of 76 for VF 8 For instruction:   store float %v3, float* %out3, align 4
 ; AVX1: LV: Found an estimated cost of 152 for VF 16 For instruction:   store float %v3, float* %out3, align 4
 ;
 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction:   store float %v3, float* %out3, align 4
 ; AVX2: LV: Found an estimated cost of 6 for VF 2 For instruction:   store float %v3, float* %out3, align 4
 ; AVX2: LV: Found an estimated cost of 8 for VF 4 For instruction:   store float %v3, float* %out3, align 4
-; AVX2: LV: Found an estimated cost of 76 for VF 8 For instruction:   store float %v3, float* %out3, align 4
+; AVX2: LV: Found an estimated cost of 20 for VF 8 For instruction:   store float %v3, float* %out3, align 4
 ; AVX2: LV: Found an estimated cost of 152 for VF 16 For instruction:   store float %v3, float* %out3, align 4
 ;
 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction:   store float %v3, float* %out3, align 4
 ; AVX512: LV: Found an estimated cost of 5 for VF 2 For instruction:   store float %v3, float* %out3, align 4
 ; AVX512: LV: Found an estimated cost of 5 for VF 4 For instruction:   store float %v3, float* %out3, align 4
 ; AVX512: LV: Found an estimated cost of 11 for VF 8 For instruction:   store float %v3, float* %out3, align 4
 ; AVX512: LV: Found an estimated cost of 22 for VF 16 For instruction:   store float %v3, float* %out3, align 4
 ; AVX512: LV: Found an estimated cost of 44 for VF 32 For instruction:   store float %v3, float* %out3, align 4

llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-4.ll

 ; AVX1: LV: Found an estimated cost of 19 for VF 2 For instruction:   store i32 %v3, i32* %out3, align 4
 ; AVX1: LV: Found an estimated cost of 38 for VF 4 For instruction:   store i32 %v3, i32* %out3, align 4
 ; AVX1: LV: Found an estimated cost of 92 for VF 8 For instruction:   store i32 %v3, i32* %out3, align 4
 ; AVX1: LV: Found an estimated cost of 184 for VF 16 For instruction:   store i32 %v3, i32* %out3, align 4
 ;
 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction:   store i32 %v3, i32* %out3, align 4
 ; AVX2: LV: Found an estimated cost of 6 for VF 2 For instruction:   store i32 %v3, i32* %out3, align 4
 ; AVX2: LV: Found an estimated cost of 8 for VF 4 For instruction:   store i32 %v3, i32* %out3, align 4
-; AVX2: LV: Found an estimated cost of 92 for VF 8 For instruction:   store i32 %v3, i32* %out3, align 4
+; AVX2: LV: Found an estimated cost of 20 for VF 8 For instruction:   store i32 %v3, i32* %out3, align 4
 ; AVX2: LV: Found an estimated cost of 184 for VF 16 For instruction:   store i32 %v3, i32* %out3, align 4
 ;
 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction:   store i32 %v3, i32* %out3, align 4
 ; AVX512: LV: Found an estimated cost of 5 for VF 2 For instruction:   store i32 %v3, i32* %out3, align 4
 ; AVX512: LV: Found an estimated cost of 5 for VF 4 For instruction:   store i32 %v3, i32* %out3, align 4
 ; AVX512: LV: Found an estimated cost of 11 for VF 8 For instruction:   store i32 %v3, i32* %out3, align 4
 ; AVX512: LV: Found an estimated cost of 22 for VF 16 For instruction:   store i32 %v3, i32* %out3, align 4
 ; AVX512: LV: Found an estimated cost of 44 for VF 32 For instruction:   store i32 %v3, i32* %out3, align 4