[X86][Costmodel] Load/store i32/f32 Stride=3 VF=8 interleaving costs

[lebedev.ri]

Summary

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/zdz5Ga6fs - for intels Block RThroughput: =7.0; for ryzens, Block RThroughput: <=6.0
So pick cost of 7.

For store we have:
https://godbolt.org/z/qn71513ac - for intels Block RThroughput: =11.0; for ryzens, Block RThroughput: <=8.0
So pick cost of 11.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

[RKSimon]

LGTM with one minor

llvm/test/Analysis/CostModel/X86/interleaved-load-float.ll

140

Maybe remove this as a separate pre-commit as we already have interleaved-load-f32-stride-3.ll ?

llvm/lib/Target/X86/X86TargetTransformInfo.cpp

static const CostTblEntry AVX2InterleavedLoadTbl[] = {
       {3, MVT::v2i16, 5},  // (load 6i16 and) deinterleave into 3 x 2i16
       {3, MVT::v4i16, 7},  // (load 12i16 and) deinterleave into 3 x 4i16
       {3, MVT::v8i16, 9},  // (load 24i16 and) deinterleave into 3 x 8i16
       {3, MVT::v16i16, 28},  // (load 48i16 and) deinterleave into 3 x 16i16
       {3, MVT::v32i16, 56},  // (load 96i16 and) deinterleave into 3 x 32i16
 
       {3, MVT::v2i32, 3}, // (load 6i32 and) deinterleave into 3 x 2i32
       {3, MVT::v4i32, 3}, // (load 12i32 and) deinterleave into 3 x 4i32
-      {3, MVT::v8i32, 17}, // (load 24i32 and) deinterleave into 3 x 8i32
+      {3, MVT::v8i32, 7}, // (load 24i32 and) deinterleave into 3 x 8i32
 
       {4, MVT::v2i8, 4},  // (load 8i8 and) deinterleave into 4 x 2i8
       {4, MVT::v4i8, 4},   // (load 16i8 and) deinterleave into 4 x 4i8
       {4, MVT::v8i8, 12},  // (load 32i8 and) deinterleave into 4 x 8i8
       {4, MVT::v16i8, 24}, // (load 64i8 and) deinterleave into 4 x 16i8
       {4, MVT::v32i8, 56}, // (load 128i8 and) deinterleave into 4 x 32i8
 
       {4, MVT::v2i16, 6}, // (load 8i16 and) deinterleave into 4 x 2i16
static const CostTblEntry AVX2InterleavedStoreTbl[] = {
       {3, MVT::v2i16, 4},   // interleave 3 x 2i16 into 6i16 (and store)
       {3, MVT::v4i16, 6},   // interleave 3 x 4i16 into 12i16 (and store)
       {3, MVT::v8i16, 12},   // interleave 3 x 8i16 into 24i16 (and store)
       {3, MVT::v16i16, 27},   // interleave 3 x 16i16 into 48i16 (and store)
       {3, MVT::v32i16, 54},   // interleave 3 x 32i16 into 96i16 (and store)
 
       {3, MVT::v2i32, 4},   // interleave 3 x 2i32 into 6i32 (and store)
       {3, MVT::v4i32, 5},   // interleave 3 x 4i32 into 12i32 (and store)
+      {3, MVT::v8i32, 11},   // interleave 3 x 8i32 into 24i32 (and store)
 
       {4, MVT::v2i8, 4},  // interleave 4 x 2i8 into 8i8 (and store)
       {4, MVT::v4i8, 4},   // interleave 4 x 4i8 into 16i8 (and store)
       {4, MVT::v8i8, 4},  // interleave 4 x 8i8 into 32i8 (and store)
       {4, MVT::v16i8, 8}, // interleave 4 x 16i8 into 64i8 (and store)
       {4, MVT::v32i8, 12}, // interleave 4 x 32i8 into 128i8 (and store)
 
       {4, MVT::v2i16, 2},  // interleave 4 x 2i16 into 8i16 (and store)

llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-3.ll

 ; AVX1: LV: Found an estimated cost of 12 for VF 2 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX1: LV: Found an estimated cost of 24 for VF 4 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX1: LV: Found an estimated cost of 57 for VF 8 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX1: LV: Found an estimated cost of 114 for VF 16 For instruction:   %v0 = load float, float* %in0, align 4
 ;
 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 6 for VF 2 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 5 for VF 4 For instruction:   %v0 = load float, float* %in0, align 4
-; AVX2: LV: Found an estimated cost of 20 for VF 8 For instruction:   %v0 = load float, float* %in0, align 4
+; AVX2: LV: Found an estimated cost of 10 for VF 8 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 114 for VF 16 For instruction:   %v0 = load float, float* %in0, align 4
 ;
 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 4 for VF 2 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 4 for VF 4 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 6 for VF 8 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 12 for VF 16 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 51 for VF 32 For instruction:   %v0 = load float, float* %in0, align 4

llvm/test/Analysis/CostModel/X86/interleaved-load-float.ll

for.body:                                         ; preds = %for.body.lr.ph, %for.body
   %arrayidx44 = getelementptr inbounds [120 x float], [120 x float]* @dst, i32 0, i32 %add40
   %15 = load float, float* %arrayidx44, align 4
   %add45 = fadd fast float %15, %mul42
   store float %add45, float* %arrayidx44, align 4
   %add46 = add nuw nsw i32 %i.073, 8
   %cmp = icmp slt i32 %add46, %width_
   br i1 %cmp, label %for.body, label %for.cond.cleanup.loopexit
 }
-
-; Function Attrs: norecurse nounwind
-define void @stride3(float %k, i32 %width_) {
-entry:
-
-; CHECK: Found an estimated cost of 20 for VF 8 For instruction:   %0 = load float
-
-  %cmp27 = icmp sgt i32 %width_, 0
-  br i1 %cmp27, label %for.body.lr.ph, label %for.cond.cleanup
-
-for.body.lr.ph:                                   ; preds = %entry
-  br label %for.body
-
-for.cond.cleanup:                                 ; preds = %for.body, %entry
-  ret void
-
-for.body:                                         ; preds = %for.body.lr.ph, %for.body
-  %i.028 = phi i32 [ 0, %for.body.lr.ph ], [ %add16, %for.body ]
-  %arrayidx = getelementptr inbounds [120 x float], [120 x float]* @src, i32 0, i32 %i.028
-  %0 = load float, float* %arrayidx, align 4
-  %mul = fmul fast float %0, %k
-  %arrayidx2 = getelementptr inbounds [120 x float], [120 x float]* @dst, i32 0, i32 %i.028
-  %1 = load float, float* %arrayidx2, align 4
-  %add3 = fadd fast float %1, %mul
-  store float %add3, float* %arrayidx2, align 4
-  %add4 = add nuw nsw i32 %i.028, 1
-  %arrayidx5 = getelementptr inbounds [120 x float], [120 x float]* @src, i32 0, i32 %add4
-  %2 = load float, float* %arrayidx5, align 4
-  %mul6 = fmul fast float %2, %k
-  %arrayidx8 = getelementptr inbounds [120 x float], [120 x float]* @dst, i32 0, i32 %add4
-  %3 = load float, float* %arrayidx8, align 4
-  %add9 = fadd fast float %3, %mul6
-  store float %add9, float* %arrayidx8, align 4
-  %add10 = add nuw nsw i32 %i.028, 2
-  %arrayidx11 = getelementptr inbounds [120 x float], [120 x float]* @src, i32 0, i32 %add10
-  %4 = load float, float* %arrayidx11, align 4
-  %mul12 = fmul fast float %4, %k
-  %arrayidx14 = getelementptr inbounds [120 x float], [120 x float]* @dst, i32 0, i32 %add10
-  %5 = load float, float* %arrayidx14, align 4
-  %add15 = fadd fast float %5, %mul12
-  store float %add15, float* %arrayidx14, align 4
-  %add16 = add nuw nsw i32 %i.028, 3
-  %cmp = icmp slt i32 %add16, %width_
-  br i1 %cmp, label %for.body, label %for.cond.cleanup
-}
-

llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3.ll

 ; AVX1: LV: Found an estimated cost of 17 for VF 2 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX1: LV: Found an estimated cost of 30 for VF 4 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX1: LV: Found an estimated cost of 69 for VF 8 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX1: LV: Found an estimated cost of 138 for VF 16 For instruction:   %v0 = load i32, i32* %in0, align 4
 ;
 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 6 for VF 2 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 5 for VF 4 For instruction:   %v0 = load i32, i32* %in0, align 4
-; AVX2: LV: Found an estimated cost of 20 for VF 8 For instruction:   %v0 = load i32, i32* %in0, align 4
+; AVX2: LV: Found an estimated cost of 10 for VF 8 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 138 for VF 16 For instruction:   %v0 = load i32, i32* %in0, align 4
 ;
 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 4 for VF 2 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 4 for VF 4 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 6 for VF 8 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 12 for VF 16 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX512: LV: Found an estimated cost of 51 for VF 32 For instruction:   %v0 = load i32, i32* %in0, align 4

llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-3.ll

 ; AVX1: LV: Found an estimated cost of 13 for VF 2 For instruction:   store float %v2, float* %out2, align 4
 ; AVX1: LV: Found an estimated cost of 23 for VF 4 For instruction:   store float %v2, float* %out2, align 4
 ; AVX1: LV: Found an estimated cost of 57 for VF 8 For instruction:   store float %v2, float* %out2, align 4
 ; AVX1: LV: Found an estimated cost of 114 for VF 16 For instruction:   store float %v2, float* %out2, align 4
 ;
 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction:   store float %v2, float* %out2, align 4
 ; AVX2: LV: Found an estimated cost of 7 for VF 2 For instruction:   store float %v2, float* %out2, align 4
 ; AVX2: LV: Found an estimated cost of 7 for VF 4 For instruction:   store float %v2, float* %out2, align 4
-; AVX2: LV: Found an estimated cost of 57 for VF 8 For instruction:   store float %v2, float* %out2, align 4
+; AVX2: LV: Found an estimated cost of 14 for VF 8 For instruction:   store float %v2, float* %out2, align 4
 ; AVX2: LV: Found an estimated cost of 114 for VF 16 For instruction:   store float %v2, float* %out2, align 4
 ;
 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction:   store float %v2, float* %out2, align 4
 ; AVX512: LV: Found an estimated cost of 4 for VF 2 For instruction:   store float %v2, float* %out2, align 4
 ; AVX512: LV: Found an estimated cost of 4 for VF 4 For instruction:   store float %v2, float* %out2, align 4
 ; AVX512: LV: Found an estimated cost of 8 for VF 8 For instruction:   store float %v2, float* %out2, align 4
 ; AVX512: LV: Found an estimated cost of 12 for VF 16 For instruction:   store float %v2, float* %out2, align 4
 ; AVX512: LV: Found an estimated cost of 24 for VF 32 For instruction:   store float %v2, float* %out2, align 4

llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-3.ll

 ; AVX1: LV: Found an estimated cost of 18 for VF 2 For instruction:   store i32 %v2, i32* %out2, align 4
 ; AVX1: LV: Found an estimated cost of 29 for VF 4 For instruction:   store i32 %v2, i32* %out2, align 4
 ; AVX1: LV: Found an estimated cost of 69 for VF 8 For instruction:   store i32 %v2, i32* %out2, align 4
 ; AVX1: LV: Found an estimated cost of 138 for VF 16 For instruction:   store i32 %v2, i32* %out2, align 4
 ;
 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction:   store i32 %v2, i32* %out2, align 4
 ; AVX2: LV: Found an estimated cost of 7 for VF 2 For instruction:   store i32 %v2, i32* %out2, align 4
 ; AVX2: LV: Found an estimated cost of 7 for VF 4 For instruction:   store i32 %v2, i32* %out2, align 4
-; AVX2: LV: Found an estimated cost of 69 for VF 8 For instruction:   store i32 %v2, i32* %out2, align 4
+; AVX2: LV: Found an estimated cost of 14 for VF 8 For instruction:   store i32 %v2, i32* %out2, align 4
 ; AVX2: LV: Found an estimated cost of 138 for VF 16 For instruction:   store i32 %v2, i32* %out2, align 4
 ;
 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction:   store i32 %v2, i32* %out2, align 4
 ; AVX512: LV: Found an estimated cost of 4 for VF 2 For instruction:   store i32 %v2, i32* %out2, align 4
 ; AVX512: LV: Found an estimated cost of 4 for VF 4 For instruction:   store i32 %v2, i32* %out2, align 4
 ; AVX512: LV: Found an estimated cost of 8 for VF 8 For instruction:   store i32 %v2, i32* %out2, align 4
 ; AVX512: LV: Found an estimated cost of 12 for VF 16 For instruction:   store i32 %v2, i32* %out2, align 4
 ; AVX512: LV: Found an estimated cost of 24 for VF 32 For instruction:   store i32 %v2, i32* %out2, align 4