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Differential D111013

[X86][Costmodel] Load/store i8 Stride=6 VF=32 interleaving costs
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Authored by lebedev.ri on Oct 3 2021, 5:17 AM.

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RKSimon
Commits
rGa5e5883ef515: [X86][Costmodel] Load/store i8 Stride=6 VF=32 interleaving costs
Summary

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/c1jjKqP7b - for intels Block RThroughput: <=82.0; for ryzens, Block RThroughput: <=26.0
So pick cost of 82.

For store we have:
https://godbolt.org/z/YM4ErY8x7 - for intels Block RThroughput: <=90.0; for ryzens, Block RThroughput: <=25.5
So pick cost of 90.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Diff Detail

Event Timeline

lebedev.ri created this revision.Oct 3 2021, 5:17 AM
Herald added subscribers: pengfei, hiraditya. · View Herald TranscriptOct 3 2021, 5:17 AM
lebedev.ri requested review of this revision.Oct 3 2021, 5:17 AM
lebedev.ri added a parent revision: D111012: [X86][Costmodel] Load/store i8 Stride=6 VF=16 interleaving costs.
RKSimon accepted this revision.Oct 3 2021, 11:20 AM

LGTM

This revision is now accepted and ready to land.Oct 3 2021, 11:20 AM
lebedev.ri added a comment.EditedOct 3 2021, 12:07 PM
In D111013#3038912, @RKSimon wrote:

LGTM

Thank you for the reviews!

Closed by commit rGa5e5883ef515: [X86][Costmodel] Load/store i8 Stride=6 VF=32 interleaving costs (authored by lebedev.ri). · Explain WhyOct 3 2021, 1:43 PM
This revision was automatically updated to reflect the committed changes.
lebedev.ri added a commit: rGa5e5883ef515: [X86][Costmodel] Load/store i8 Stride=6 VF=32 interleaving costs.

Revision Contents

PathSize
llvm/
lib/
Target/
X86/
2 lines
test/
Analysis/
CostModel/
X86/
2 lines
2 lines

Diff 376783

llvm/lib/Target/X86/X86TargetTransformInfo.cpp

Show First 20 Lines • Show All 5,112 Lines • ▼ Show 20 Lines static const CostTblEntry AVX2InterleavedLoadTbl[] = {
{4, MVT::v8i16, 33}, // (load 32i16 and) deinterleave into 4 x 8i16 {4, MVT::v8i16, 33}, // (load 32i16 and) deinterleave into 4 x 8i16
{4, MVT::v16i16, 75}, // (load 64i16 and) deinterleave into 4 x 16i16 {4, MVT::v16i16, 75}, // (load 64i16 and) deinterleave into 4 x 16i16
{4, MVT::v32i16, 150}, // (load 128i16 and) deinterleave into 4 x 32i16 {4, MVT::v32i16, 150}, // (load 128i16 and) deinterleave into 4 x 32i16
{6, MVT::v2i8, 6}, // (load 12i8 and) deinterleave into 6 x 2i8 {6, MVT::v2i8, 6}, // (load 12i8 and) deinterleave into 6 x 2i8
{6, MVT::v4i8, 14}, // (load 24i8 and) deinterleave into 6 x 4i8 {6, MVT::v4i8, 14}, // (load 24i8 and) deinterleave into 6 x 4i8
{6, MVT::v8i8, 18}, // (load 48i8 and) deinterleave into 6 x 8i8 {6, MVT::v8i8, 18}, // (load 48i8 and) deinterleave into 6 x 8i8
{6, MVT::v16i8, 43}, // (load 96i8 and) deinterleave into 6 x 16i8 {6, MVT::v16i8, 43}, // (load 96i8 and) deinterleave into 6 x 16i8
{6, MVT::v32i8, 82}, // (load 192i8 and) deinterleave into 6 x 32i8
{6, MVT::v2i16, 13}, // (load 12i16 and) deinterleave into 6 x 2i16 {6, MVT::v2i16, 13}, // (load 12i16 and) deinterleave into 6 x 2i16
{6, MVT::v4i16, 9}, // (load 24i16 and) deinterleave into 6 x 4i16 {6, MVT::v4i16, 9}, // (load 24i16 and) deinterleave into 6 x 4i16
{6, MVT::v8i16, 39}, // (load 48i16 and) deinterleave into 6 x 8i16 {6, MVT::v8i16, 39}, // (load 48i16 and) deinterleave into 6 x 8i16
{6, MVT::v16i16, 106}, // (load 96i16 and) deinterleave into 6 x 16i16 {6, MVT::v16i16, 106}, // (load 96i16 and) deinterleave into 6 x 16i16
{8, MVT::v8i32, 40} // (load 64i32 and) deinterleave into 8 x 8i32 {8, MVT::v8i32, 40} // (load 64i32 and) deinterleave into 8 x 8i32
}; };
Show All 39 Lines static const CostTblEntry AVX2InterleavedStoreTbl[] = {
{4, MVT::v8i16, 10}, // interleave 4 x 8i16 into 32i16 (and store) {4, MVT::v8i16, 10}, // interleave 4 x 8i16 into 32i16 (and store)
{4, MVT::v16i16, 32}, // interleave 4 x 16i16 into 64i16 (and store) {4, MVT::v16i16, 32}, // interleave 4 x 16i16 into 64i16 (and store)
{4, MVT::v32i16, 64}, // interleave 4 x 32i16 into 128i16 (and store) {4, MVT::v32i16, 64}, // interleave 4 x 32i16 into 128i16 (and store)
{6, MVT::v2i8, 7}, // interleave 6 x 2i8 into 12i8 (and store) {6, MVT::v2i8, 7}, // interleave 6 x 2i8 into 12i8 (and store)
{6, MVT::v4i8, 9}, // interleave 6 x 4i8 into 24i8 (and store) {6, MVT::v4i8, 9}, // interleave 6 x 4i8 into 24i8 (and store)
{6, MVT::v8i8, 16}, // interleave 6 x 8i8 into 48i8 (and store) {6, MVT::v8i8, 16}, // interleave 6 x 8i8 into 48i8 (and store)
{6, MVT::v16i8, 27}, // interleave 6 x 16i8 into 96i8 (and store) {6, MVT::v16i8, 27}, // interleave 6 x 16i8 into 96i8 (and store)
{6, MVT::v32i8, 90}, // interleave 6 x 32i8 into 192i8 (and store)
{6, MVT::v2i16, 10}, // interleave 6 x 2i16 into 12i16 (and store) {6, MVT::v2i16, 10}, // interleave 6 x 2i16 into 12i16 (and store)
{6, MVT::v4i16, 15}, // interleave 6 x 4i16 into 24i16 (and store) {6, MVT::v4i16, 15}, // interleave 6 x 4i16 into 24i16 (and store)
{6, MVT::v8i16, 21}, // interleave 6 x 8i16 into 48i16 (and store) {6, MVT::v8i16, 21}, // interleave 6 x 8i16 into 48i16 (and store)
{6, MVT::v16i16, 58}, // interleave 6 x 16i16 into 96i16 (and store) {6, MVT::v16i16, 58}, // interleave 6 x 16i16 into 96i16 (and store)
}; };
if (Opcode == Instruction::Load) { if (Opcode == Instruction::Load) {
▲ Show 20 Lines • Show All 169 Lines • Show Last 20 Lines

llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-6.ll

Show All 24 Lines
; AVX1: LV: Found an estimated cost of 243 for VF 16 For instruction: %v0 = load i8, i8* %in0, align 1 ; AVX1: LV: Found an estimated cost of 243 for VF 16 For instruction: %v0 = load i8, i8* %in0, align 1
; AVX1: LV: Found an estimated cost of 498 for VF 32 For instruction: %v0 = load i8, i8* %in0, align 1 ; AVX1: LV: Found an estimated cost of 498 for VF 32 For instruction: %v0 = load i8, i8* %in0, align 1
; ;
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load i8, i8* %in0, align 1 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load i8, i8* %in0, align 1
; AVX2: LV: Found an estimated cost of 9 for VF 2 For instruction: %v0 = load i8, i8* %in0, align 1 ; AVX2: LV: Found an estimated cost of 9 for VF 2 For instruction: %v0 = load i8, i8* %in0, align 1
; AVX2: LV: Found an estimated cost of 17 for VF 4 For instruction: %v0 = load i8, i8* %in0, align 1 ; AVX2: LV: Found an estimated cost of 17 for VF 4 For instruction: %v0 = load i8, i8* %in0, align 1
; AVX2: LV: Found an estimated cost of 20 for VF 8 For instruction: %v0 = load i8, i8* %in0, align 1 ; AVX2: LV: Found an estimated cost of 20 for VF 8 For instruction: %v0 = load i8, i8* %in0, align 1
; AVX2: LV: Found an estimated cost of 46 for VF 16 For instruction: %v0 = load i8, i8* %in0, align 1 ; AVX2: LV: Found an estimated cost of 46 for VF 16 For instruction: %v0 = load i8, i8* %in0, align 1
; AVX2: LV: Found an estimated cost of 498 for VF 32 For instruction: %v0 = load i8, i8* %in0, align 1 ; AVX2: LV: Found an estimated cost of 88 for VF 32 For instruction: %v0 = load i8, i8* %in0, align 1
; ;
; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load i8, i8* %in0, align 1 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load i8, i8* %in0, align 1
; AVX512: LV: Found an estimated cost of 7 for VF 2 For instruction: %v0 = load i8, i8* %in0, align 1 ; AVX512: LV: Found an estimated cost of 7 for VF 2 For instruction: %v0 = load i8, i8* %in0, align 1
; AVX512: LV: Found an estimated cost of 25 for VF 4 For instruction: %v0 = load i8, i8* %in0, align 1 ; AVX512: LV: Found an estimated cost of 25 for VF 4 For instruction: %v0 = load i8, i8* %in0, align 1
; AVX512: LV: Found an estimated cost of 49 for VF 8 For instruction: %v0 = load i8, i8* %in0, align 1 ; AVX512: LV: Found an estimated cost of 49 for VF 8 For instruction: %v0 = load i8, i8* %in0, align 1
; AVX512: LV: Found an estimated cost of 119 for VF 16 For instruction: %v0 = load i8, i8* %in0, align 1 ; AVX512: LV: Found an estimated cost of 119 for VF 16 For instruction: %v0 = load i8, i8* %in0, align 1
; AVX512: LV: Found an estimated cost of 237 for VF 32 For instruction: %v0 = load i8, i8* %in0, align 1 ; AVX512: LV: Found an estimated cost of 237 for VF 32 For instruction: %v0 = load i8, i8* %in0, align 1
; AVX512: LV: Found an estimated cost of 591 for VF 64 For instruction: %v0 = load i8, i8* %in0, align 1 ; AVX512: LV: Found an estimated cost of 591 for VF 64 For instruction: %v0 = load i8, i8* %in0, align 1
▲ Show 20 Lines • Show All 47 Lines • Show Last 20 Lines

llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-6.ll

Show All 24 Lines
; AVX1: LV: Found an estimated cost of 201 for VF 16 For instruction: store i8 %v5, i8* %out5, align 1 ; AVX1: LV: Found an estimated cost of 201 for VF 16 For instruction: store i8 %v5, i8* %out5, align 1
; AVX1: LV: Found an estimated cost of 498 for VF 32 For instruction: store i8 %v5, i8* %out5, align 1 ; AVX1: LV: Found an estimated cost of 498 for VF 32 For instruction: store i8 %v5, i8* %out5, align 1
; ;
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: store i8 %v5, i8* %out5, align 1 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: store i8 %v5, i8* %out5, align 1
; AVX2: LV: Found an estimated cost of 10 for VF 2 For instruction: store i8 %v5, i8* %out5, align 1 ; AVX2: LV: Found an estimated cost of 10 for VF 2 For instruction: store i8 %v5, i8* %out5, align 1
; AVX2: LV: Found an estimated cost of 12 for VF 4 For instruction: store i8 %v5, i8* %out5, align 1 ; AVX2: LV: Found an estimated cost of 12 for VF 4 For instruction: store i8 %v5, i8* %out5, align 1
; AVX2: LV: Found an estimated cost of 18 for VF 8 For instruction: store i8 %v5, i8* %out5, align 1 ; AVX2: LV: Found an estimated cost of 18 for VF 8 For instruction: store i8 %v5, i8* %out5, align 1
; AVX2: LV: Found an estimated cost of 30 for VF 16 For instruction: store i8 %v5, i8* %out5, align 1 ; AVX2: LV: Found an estimated cost of 30 for VF 16 For instruction: store i8 %v5, i8* %out5, align 1
; AVX2: LV: Found an estimated cost of 498 for VF 32 For instruction: store i8 %v5, i8* %out5, align 1 ; AVX2: LV: Found an estimated cost of 96 for VF 32 For instruction: store i8 %v5, i8* %out5, align 1
; ;
; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: store i8 %v5, i8* %out5, align 1 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction: store i8 %v5, i8* %out5, align 1
; AVX512: LV: Found an estimated cost of 18 for VF 2 For instruction: store i8 %v5, i8* %out5, align 1 ; AVX512: LV: Found an estimated cost of 18 for VF 2 For instruction: store i8 %v5, i8* %out5, align 1
; AVX512: LV: Found an estimated cost of 38 for VF 4 For instruction: store i8 %v5, i8* %out5, align 1 ; AVX512: LV: Found an estimated cost of 38 for VF 4 For instruction: store i8 %v5, i8* %out5, align 1
; AVX512: LV: Found an estimated cost of 98 for VF 8 For instruction: store i8 %v5, i8* %out5, align 1 ; AVX512: LV: Found an estimated cost of 98 for VF 8 For instruction: store i8 %v5, i8* %out5, align 1
; AVX512: LV: Found an estimated cost of 197 for VF 16 For instruction: store i8 %v5, i8* %out5, align 1 ; AVX512: LV: Found an estimated cost of 197 for VF 16 For instruction: store i8 %v5, i8* %out5, align 1
; AVX512: LV: Found an estimated cost of 295 for VF 32 For instruction: store i8 %v5, i8* %out5, align 1 ; AVX512: LV: Found an estimated cost of 295 for VF 32 For instruction: store i8 %v5, i8* %out5, align 1
; AVX512: LV: Found an estimated cost of 591 for VF 64 For instruction: store i8 %v5, i8* %out5, align 1 ; AVX512: LV: Found an estimated cost of 591 for VF 64 For instruction: store i8 %v5, i8* %out5, align 1
▲ Show 20 Lines • Show All 48 Lines • Show Last 20 Lines