[LoopPredication] Fix MemorySSA crash in predicateLoopExits

[anna]

Summary

The attached testcase crashes without the patch (Not the same accesses
in the same order).

When we move instructions before another instruction, we also need to
update the memory accesses corresponding to it.

[reames]

I'll defer to @asbirlea. This looks slightly complicated for what should be a simple update, but she'll know if there's a cleaner way.

[asbirlea]

This is the right API to call for this instruction move.

[anna]

Thank you for the prompt reviews!

llvm/lib/Transforms/Scalar/LoopPredication.cpp

if (isa<SCEVCouldNotCompute>(MinEC) || MinEC->getType()->isPointerTy() ||
     return false;
 
   // Subtlety: We need to avoid inserting additional uses of the WC.  We know
   // that it can only have one transitive use at the moment, and thus moving
   // that use to just before the branch and inserting code before it and then
   // modifying the operand is legal.
   auto *IP = cast<Instruction>(WidenableBR->getCondition());
   IP->moveBefore(WidenableBR);
+  if (MSSAU)
+    if (auto *MUD = MSSAU->getMemorySSA()->getMemoryAccess(IP))
+       MSSAU->moveToPlace(MUD, WidenableBR->getParent(),
+                          MemorySSA::BeforeTerminator);
   Rewriter.setInsertPoint(IP);
   IRBuilder<> B(IP);
 
   bool Changed = false;
   Value *MinECV = nullptr; // lazily generated if needed
   for (BasicBlock *ExitingBB : ExitingBlocks) {
     // If our exiting block exits multiple loops, we can only rewrite the
     // innermost one.  Otherwise, we're changing how many times the innermost

llvm/test/Transforms/LoopPredication/predicate-exits.ll

guarded2:
   %continue = icmp ult i32 %i.next, %n
   br i1 %continue, label %loop, label %exit
 
 exit:
   %result = phi i32 [ %loop.acc.next, %guarded2 ]
   ret i32 %result
 }
 
+define void @test_memssa() {
+bb:
+  %tmp = call i1 @llvm.experimental.widenable.condition()
+  %tmp1 = call i1 @llvm.experimental.widenable.condition()
+  br i1 %tmp, label %bb3, label %bb2
+
+bb2:                                              ; preds = %bb
+  unreachable
+
+bb3:                                              ; preds = %bb
+  br label %bb4
+
+bb4:                                              ; preds = %bb6, %bb3
+  %tmp5 = phi i32 [ %tmp7, %bb6 ], [ 0, %bb3 ]
+  br i1 undef, label %bb10, label %bb6
+
+bb6:                                              ; preds = %bb4
+  %tmp7 = add nuw nsw i32 %tmp5, 1
+  %tmp8 = icmp ult i32 %tmp7, undef
+  br i1 %tmp8, label %bb4, label %bb9
+
+bb9:                                              ; preds = %bb6
+  ret void
+
+bb10:                                             ; preds = %bb4
+  ret void
+}
+
 
 
 declare void @unknown()
 
 declare i1 @llvm.experimental.widenable.condition()
 declare i32 @llvm.experimental.deoptimize.i32(...)
 
 !0 = !{!"branch_weights", i32 1048576, i32 1}
 !1 = !{i32 1, i32 -2147483648}
 !2 = !{i32 0, i32 50}