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[clang-repl] Tell the LLJIT the exact target triple we use.
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Authored by v.g.vassilev on May 19 2021, 3:51 AM.

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Summary

Some systems use a different data layout. For instance, s390x the layout of machines with vector registers is different from the ones without. In such cases, the JIT will automatically detect the vector registers and go out of sync.

This patch tells the JIT what is the target triple of the generated code so that both ends are in sync.

Discussion available in https://reviews.llvm.org/D96033. Thanks to @uweigand for helping understand the issue.

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