This makes the large G_CONCAT_VECTORS easier to handle.
Details
Details
Diff Detail
Diff Detail
- Repository
- rG LLVM Github Monorepo
Event Timeline
| llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir | ||
|---|---|---|
| 4651–4656 | This is worse (although this test is broken since a <4 x s8> value should not be legal, and should be a verifier error to copy this to a physical register | |
| llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir | ||
|---|---|---|
| 4651–4656 | Yeah I’m going to drop this in favour of custom legalisation. | |
This is worse (although this test is broken since a <4 x s8> value should not be legal, and should be a verifier error to copy this to a physical register