[ARM][LowOverheadLoops] Check VCMP operands have same def as the VPT before combining

[samtebbs]

Summary

This patch is a follow-up to D87616 which checks that the def of the VCMP operands is the same as it is for the VPT to make sure their values haven't changed in-between.

[samparker]

Hey Sam, add a couple of tests please to catch when the defs are mismatched.

llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp

1335

You can use getMIOperand(VCMP, Op*) here, and the code can be reduced into a loop iterating over the operands of the VCMP.

[samtebbs]

Closed since it's no longer needed.

llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp

if (Block.HasNonUniformPredicate()) {
         // - Insert a new vpst to predicate the instruction(s) that following
         //   the divergent vpr def.
         // TODO: We could be producing more VPT blocks than necessary and could
         // fold the newly created one into a proceeding one.
         for (auto I = ++MachineBasicBlock::iterator(Block.getPredicateThen()),
              E = ++MachineBasicBlock::iterator(Divergent->MI); I != E; ++I)
           RemovePredicate(&*I);
 
-        // Check if the instruction defining vpr is a vcmp so it can be combined
-        // with the VPST This should be the divergent instruction
-        MachineInstr *VCMP = VCMPOpcodeToVPT(Divergent->MI->getOpcode()) != 0
-                                 ? Divergent->MI
-                                 : nullptr;
-
         unsigned Size = 0;
         auto E = MachineBasicBlock::reverse_iterator(Divergent->MI);
         auto I = MachineBasicBlock::reverse_iterator(Insts.back().MI);
         MachineInstr *InsertAt = nullptr;
         while (I != E) {
           InsertAt = &*I;
           ++Size;
           ++I;
         }
         MachineInstrBuilder MIB;
         LLVM_DEBUG(dbgs() << "ARM Loops: Removing VPST: "
                           << *Block.getPredicateThen());
+
+        // Check if the instruction defining vpr is a vcmp so it can be combined
+        // with the VPST. This should be the divergent instruction
+        MachineInstr *VCMP = VCMPOpcodeToVPT(Divergent->MI->getOpcode()) != 0
+                                 ? Divergent->MI
+                                 : nullptr;
+        if (VCMP) {
+            MachineOperand Op1 = VCMP->getOperand(1);
+            MachineOperand Op2 = VCMP->getOperand(2);
+            MachineInstr *Op1Def = Op1.isReg() ? RDA->getUniqueReachingMIDef(VCMP, Op1.getReg()) : nullptr;
+            MachineInstr *Op2Def = Op2.isReg() ? RDA->getUniqueReachingMIDef(VCMP, Op2.getReg()) : nullptr;
+
+            // Make sure that the VCMP operands will have the same value at the insertion point
+            if (Op1.isReg() && RDA->getUniqueReachingMIDef(InsertAt, Op1.getReg()) != Op1Def)
+                VCMP = nullptr;
+            else if (Op2.isReg() && RDA->getUniqueReachingMIDef(InsertAt, Op2.getReg()) != Op2Def)
+                VCMP = nullptr;
+        }
+
         if (VCMP) {
           // Combine the VPST and VCMP into a VPT
           MIB =
               BuildMI(*InsertAt->getParent(), InsertAt, InsertAt->getDebugLoc(),
                       TII->get(VCMPOpcodeToVPT(VCMP->getOpcode())));
           MIB.addImm(ARMVCC::Then);
           // Register one
           MIB.add(VCMP->getOperand(1));