[GlobalISel][TableGen] Take first result for multi-output instructions

[ehjogab]

Summary

Previously, tblgen would reject patterns where one of its nested
instructions produced more than one result. These arise when the
instruction definition contains 'outs' as well as 'Defs'. This patch
fixes that by always taking the first result, which is how these
situations are handled in SelectionIDAG.

[arsenm]

Needs test. I thought I handled this in ee3feef5aaaa3c385fbe08bdb2d48829ad440b56?

[ehjogab]

Added testcase

[ehjogab]

In D86617#2238779, @arsenm wrote:

Needs test. I thought I handled this in ee3feef5aaaa3c385fbe08bdb2d48829ad440b56?

It seems that patch does not handle cases of nested instructions, which is the case in our target where this fix is needed.

I've added a testcase now, as requested.

[ehjogab]

Bump

[ehjogab]

Any comments? Should this patch be accepted or rejected?

[arsenm]

In D86617#2324324, @ehjogab wrote:

Any comments? Should this patch be accepted or rejected?

I mostly see this as making the behavior more opaque by changing based on the specific register classes involved, so I'm not in favor. What do others think?

[ehjogab]

In D86617#2362244, @arsenm wrote:

In D86617#2324324, @ehjogab wrote:

Any comments? Should this patch be accepted or rejected?

I mostly see this as making the behavior more opaque by changing based on the specific register classes involved, so I'm not in favor. What do others think?

I'd be happy to apply a better solution to this problem if you have one.

[ehjogab]

Added Paul-C-Anagnostopoulos since he's now one of the TableGen code owners.

[Paul-C-Anagnostopoulos]

I'm not yet familiar enough with instruction selection, so I'll leave the decision to others.

[ehjogab]

Bump

[ehjogab]

Bump