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[ARM] Don't shrink STM if it would cause an unknown base register store
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Authored by john.brawn on Apr 20 2020, 7:37 AM.

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Summary

If a 16-bit thumb STM with writeback stores the base register but it isn't the first register in the list, then an unknown value is stored. The load/store optimizer knows this and generates a 32-bit STM without writeback instead, but thumb2 size reduction converts it into a 16-bit STM. Fix this by having thumb2 size reduction notice such STMs and leave them as they are.

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john.brawn created this revision.Apr 20 2020, 7:37 AM
efriedma added inline comments.
llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
525

It's probably worth reorganizing the comments here to clarify: tSTMIA_UPD the only 16-bit STM. So the Thumb2 instruction is fine, but the rewritten one would be unpredictable.

john.brawn retitled this revision from [ARM] Don't shrink STM.W to unpredictable STM.N with writeback to [ARM] Don't shrink STM if it would cause an unknown base register store.
john.brawn edited the summary of this revision. (Show Details)

Adjust comments. Also, after double-checking the 8-A and 8-M ARMARMs it's OK if the base register being stored is the lowest one so adjusted to allow that.

efriedma accepted this revision.Apr 21 2020, 12:07 PM

LGTM

The ARMv7 ARM claims the form with writeback of the lowest register is deprecated, but it looks like ARMv8 un-deprecated it, so we probably don't care about that.

This revision is now accepted and ready to land.Apr 21 2020, 12:07 PM
This revision was automatically updated to reflect the committed changes.