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Differential D64755

ARM: Fix missing immarg for space intrinsic
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Authored by arsenm on Jul 15 2019, 9:52 AM.

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Reviewers
t.p.northover
aemerson

Diff Detail

Event Timeline

arsenm created this revision.Jul 15 2019, 9:52 AM
Herald added subscribers: kristof.beyls, javed.absar, wdng. · View Herald TranscriptJul 15 2019, 9:52 AM
arsenm added a child revision: D58232: GlobalISel: Don't materialize immarg arguments to intrinsics.Jul 16 2019, 12:44 PM
aemerson accepted this revision.Jul 16 2019, 3:18 PM
aemerson added a subscriber: aemerson.

LGTM.

This revision is now accepted and ready to land.Jul 16 2019, 3:18 PM
arsenm closed this revision.Jul 16 2019, 3:41 PM

r366280

Revision Contents

PathSize
include/
llvm/
IR/
2 lines
test/
Verifier/
ARM/
9 lines

Diff 209894

include/llvm/IR/IntrinsicsARM.td

Show All 13 Lines
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// TLS // TLS
let TargetPrefix = "arm" in { // All intrinsics start with "llvm.arm.". let TargetPrefix = "arm" in { // All intrinsics start with "llvm.arm.".
// A space-consuming intrinsic primarily for testing ARMConstantIslands. The // A space-consuming intrinsic primarily for testing ARMConstantIslands. The
// first argument is the number of bytes this "instruction" takes up, the second // first argument is the number of bytes this "instruction" takes up, the second
// and return value are essentially chains, used to force ordering during ISel. // and return value are essentially chains, used to force ordering during ISel.
def int_arm_space : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>; def int_arm_space : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [ImmArg<0>]>;
// 16-bit multiplications // 16-bit multiplications
def int_arm_smulbb : GCCBuiltin<"__builtin_arm_smulbb">, def int_arm_smulbb : GCCBuiltin<"__builtin_arm_smulbb">,
Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
def int_arm_smulbt : GCCBuiltin<"__builtin_arm_smulbt">, def int_arm_smulbt : GCCBuiltin<"__builtin_arm_smulbt">,
Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
def int_arm_smultb : GCCBuiltin<"__builtin_arm_smultb">, def int_arm_smultb : GCCBuiltin<"__builtin_arm_smultb">,
Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
▲ Show 20 Lines • Show All 751 Lines • Show Last 20 Lines

test/Verifier/ARM/intrinsic-immarg.ll

Show First 20 Lines • Show All 94 Lines • ▼ Show 20 Linesdefine void @mcrr2(i32 %arg0, i32 %arg1, i32 %arg2, i32 %arg3, i32 %arg4) {
call void @llvm.arm.mcrr2(i32 0, i32 %arg1, i32 2, i32 3, i32 4) call void @llvm.arm.mcrr2(i32 0, i32 %arg1, i32 2, i32 3, i32 4)
; CHECK: immarg operand has non-immediate parameter ; CHECK: immarg operand has non-immediate parameter
; CHECK-NEXT: i32 %arg4 ; CHECK-NEXT: i32 %arg4
; CHECK-NEXT: call void @llvm.arm.mcrr2(i32 0, i32 1, i32 2, i32 3, i32 %arg4) ; CHECK-NEXT: call void @llvm.arm.mcrr2(i32 0, i32 1, i32 2, i32 3, i32 %arg4)
call void @llvm.arm.mcrr2(i32 0, i32 1, i32 2, i32 3, i32 %arg4) call void @llvm.arm.mcrr2(i32 0, i32 1, i32 2, i32 3, i32 %arg4)
ret void ret void
} }
declare i32 @llvm.arm.space(i32, i32) nounwind
define i32 @space(i32 %arg0, i32 %arg1) {
; CHECK: immarg operand has non-immediate parameter
; CHECK-NEXT: i32 %arg0
; CHECK-NEXT: call i32 @llvm.arm.space(i32 %arg0, i32 %arg1)
%space = call i32 @llvm.arm.space(i32 %arg0, i32 %arg1)
ret i32 %space
}