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[RISCV] Support RISC-V in getBitcodeMachineKind

Authored by kito-cheng on Sep 17 2018, 1:59 AM.

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kito-cheng created this revision.Sep 17 2018, 1:59 AM
ruiu added a comment.Sep 17 2018, 6:35 AM

Is this a part of a series of patches? If so, please merge this into another patch as this is perhaps too small. Doing that should allow you to write a test.

Disasm added a subscriber: Disasm.Jul 1 2019, 1:28 PM

@ruiu This patch is useful on its own: it allows linking bitcode files with lld. As an example, we use ThinLTO in Rust to perform simple assembly inlining. Without lld support it is impossible to use ThinLTO with RISC-V target.

Herald added a project: Restricted Project. · View Herald TranscriptJul 1 2019, 1:28 PM

For riscv64, you can write a test (placed under test/ELF/lto/) like this:

; REQUIRES: riscv

; RUN: llvm-as %s -o %t.o
; RUN: ld.lld %t.o -o %t
target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n64-S128"
target triple = "riscv64-unknown-elf"

define void @f() {
  ret void

@MaskRay Thanks, I'll add test case soon :)

Add 2 test cases.

MaskRay accepted this revision.Jul 1 2019, 10:56 PM

LGTM. I think lld's RISCV support is pretty complete now. R_RISCV_RELAX is not implemented, but that is used by linker relaxation which isn't really needed. Many programs should build after D63220, D63259 and this revision.

@ruiu What do you think?

This revision is now accepted and ready to land.Jul 1 2019, 10:56 PM
ruiu accepted this revision.Jul 2 2019, 2:10 AM


This revision was automatically updated to reflect the committed changes.