[ELF][RISCV] Allow R_RISCV_ADD in relocateNonAlloc()

[MaskRay]

Summary

gcc may generate .debug_info/.debug_aranges/.debug_line/etc that are
relocated by R_RISCV_ADD*/R_RISCV_SUB* pairs.
Allow R_RISCV_ADD in non-SHF_ALLOC section to fix link errors like:

ld.lld: error: print.c:(.debug_frame+0x60): has non-ABS relocation R_RISCV_ADD64 against symbol '.L0 '

[MaskRay]

🤡

[MaskRay]

🤡

[MaskRay]

🎠

I think lld' RISCV port is quite complete after this and D52165. 9.0.0 will be branched soon (July 18). The 9.0.0 release will be really helpful to collect feedback from the community :)

lld is an important component of Rust :)

[ruiu]

Looks good to me. PkmX, do you have any comments?

[MaskRay]

@PkmX has been silent for a while...

@jrtc27 :)

[jrtc27]

Looks sensible to me

lld/trunk/ELF/InputSection.cpp

for (const RelTy &Rel : Rels) {
     if (!RelTy::IsRela)
       Addend += Target->getImplicitAddend(BufLoc, Type);
 
     Symbol &Sym = getFile<ELFT>()->getRelocTargetSym(Rel);
     RelExpr Expr = Target->getRelExpr(Type, Sym, BufLoc);
     if (Expr == R_NONE)
       continue;
 
-    if (Expr != R_ABS && Expr != R_DTPREL) {
+    if (Expr != R_ABS && Expr != R_DTPREL && Expr != R_RISCV_ADD) {
       std::string Msg = getLocation<ELFT>(Offset) +
                         ": has non-ABS relocation " + toString(Type) +
                         " against symbol '" + toString(Sym) + "'";
       if (Expr != R_PC) {
         error(Msg);
         return;
       }
 

lld/trunk/test/ELF/riscv-reloc-add.s

.L0:
   ret
 .L1:
 
 .rodata
 .dword .L1 - .L0
 .word .L1 - .L0
 .half .L1 - .L0
 .byte .L1 - .L0
+
+## Debug section may use R_RISCV_ADD64/R_RISCV_SUB64 pairs to measure lengths
+## of code ranges (e.g. DW_AT_high_pc). Check we allow R_RISCV_ADD*/R_RISCV_SUB*
+## in such non-SHF_ALLOC sections in -pie/-shared mode.
+.section .debug_info
+.quad .L1 - .L0