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Differential D43342

[ARM] Fix redirect in inline assembly test
ClosedPublic

Authored by pbarrio on Feb 15 2018, 10:18 AM.

Details

Reviewers
gkistanova
apilipenko
Commits
rGfa6f1c01300c: [ARM] Fix redirect in inline assembly test
rL325283: [ARM] Fix redirect in inline assembly test
Summary

Fix silly mistake in a test

Diff Detail

Repository
rL LLVM

Event Timeline

pbarrio created this revision.Feb 15 2018, 10:18 AM
Herald added subscribers: llvm-commits, kristof.beyls, eraman, javed.absar. · View Herald TranscriptFeb 15 2018, 10:18 AM
Harbormaster completed remote builds in B15023: Diff 134453.Feb 15 2018, 10:18 AM
pbarrio added a reviewer: apilipenko.Feb 15 2018, 10:22 AM
pbarrio added a comment.Feb 15 2018, 11:14 AM

I'll commit this fix now to prevent other buildbots to fail.

This revision was not accepted when it landed; it landed in state Needs Review.Feb 15 2018, 11:20 AM
Closed by commit rL325283: [ARM] Fix redirect in inline assembly test (authored by pabbar01). · Explain Why
This revision was automatically updated to reflect the committed changes.
rengolin added a subscriber: rengolin.Feb 15 2018, 2:14 PM

thanks!

Revision Contents

PathSize
llvm/
trunk/
test/
CodeGen/
ARM/
2 lines

Diff 134470

llvm/trunk/test/CodeGen/ARM/inlineasm-error-t-toofewregs.ll

; RUN: not llc -mtriple=armv8-eabi -mattr=+neon %s -o /dev/null 2<&1 | FileCheck %s ; RUN: not llc -mtriple=armv8-eabi -mattr=+neon %s -o /dev/null 2>&1 | FileCheck %s
; CHECK: inline assembly requires more registers than available ; CHECK: inline assembly requires more registers than available
define <4 x float> @t-constraint-float-vectors-too-few-regs(<4 x float> %a, <4 x float> %b) { define <4 x float> @t-constraint-float-vectors-too-few-regs(<4 x float> %a, <4 x float> %b) {
entry: entry:
%0 = tail call { <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float> } asm "vadd.F32 $0, $9, $10\0A\09vadd.F32 $1, $9, $10\0A\09vadd.F32 $2, $9, $10\0A\09vadd.F32 $3, $9, $10\0A\09vadd.F32 $4, $9, $10\0A\09vadd.F32 $5, $9, $10\0A\09vadd.F32 $6, $9, $10\0A\09vadd.F32 $7, $9, $10\0A\09vadd.F32 $8, $9, $10", "=t,=t,=t,=t,=t,=t,=t,=t,=t,=t,t,t"(<4 x float> %a, <4 x float> %b) %0 = tail call { <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float> } asm "vadd.F32 $0, $9, $10\0A\09vadd.F32 $1, $9, $10\0A\09vadd.F32 $2, $9, $10\0A\09vadd.F32 $3, $9, $10\0A\09vadd.F32 $4, $9, $10\0A\09vadd.F32 $5, $9, $10\0A\09vadd.F32 $6, $9, $10\0A\09vadd.F32 $7, $9, $10\0A\09vadd.F32 $8, $9, $10", "=t,=t,=t,=t,=t,=t,=t,=t,=t,=t,t,t"(<4 x float> %a, <4 x float> %b)
%asmresult = extractvalue { <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float> } %0, 0 %asmresult = extractvalue { <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float> } %0, 0
ret <4 x float> %asmresult ret <4 x float> %asmresult
} }