Fix signedness in vector bitcast evaluation

[svenvh]

Summary

The included test case triggered a sign assertion on the result in
Success(). This was caused by the APSInt created for a bitcast
having its signedness bit inverted. The second APSInt constructor
argument is isUnsigned, so invert the result of
isSignedIntegerType.

[Anastasia]

LGTM, great! Thanks! Perhaps the test can be simplified before committing...

clang/test/CodeGenOpenCL/vector_literals.cl

71

I wonder if both (int2) are needed i.e. the cast one could be ommitted?

[svenvh]

clang/test/CodeGenOpenCL/vector_literals.cl

71

The cast is actually necessary, because the fix is in the code that handles the cast (case CK_BitCast if you expand the code above my change).

clang/lib/AST/ExprConstant.cpp

if (EltTy->isRealFloatingType()) {
       }
     } else if (EltTy->isIntegerType()) {
       for (unsigned i = 0; i < NElts; i++) {
         llvm::APInt Elt;
         if (BigEndian)
           Elt = SValInt.rotl(i*EltSize+EltSize).zextOrTrunc(EltSize);
         else
           Elt = SValInt.rotr(i*EltSize).zextOrTrunc(EltSize);
-        Elts.push_back(APValue(APSInt(Elt, EltTy->isSignedIntegerType())));
+        Elts.push_back(APValue(APSInt(Elt, !EltTy->isSignedIntegerType())));
       }
     } else {
       return Error(E);
     }
     return Success(Elts, E);
   }
   default:
     return ExprEvaluatorBaseTy::VisitCastExpr(E);

clang/test/CodeGenOpenCL/vector_literals.cl

void vector_literals_valid() {
   //CHECK: load <4 x i32>, <4 x i32>* %a
   //CHECK: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
   //CHECK: shufflevector <8 x i32> %{{.+}}, <8 x i32> %{{.+}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>
   int8 b = (int8)(1, 2, a.xy, a);
 
   //CHECK: store <4 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>, <4 x float>* %V2
   float4 V2 = (float4)(1);
 }
+
+void vector_literals_with_cast() {
+  // CHECK-LABEL: vector_literals_with_cast
+  // CHECK: store <2 x i32> <i32 12, i32 34>, <2 x i32>*
+  // CHECK: extractelement <2 x i32> %{{[0-9]+}}, i64 0
+  unsigned int withCast = ((int2)((int2)(12, 34))).s0;
+}