[lldb] [Process/NetBSD] Set xs_xstate_bv correctly when setting regs

[mgorny]

Summary

Ensure that xs_xstate_bv is set correctly before calling
WriteRegisterSet(). The bit can be clear if the relevant registers
were at their initial state when they were read, and it needs to be set
in order to apply changes from the XState structure.

[mgorny]

Hmm, I have an idea how to avoid all this repetition.

[mgorny]

Reduce the repetition by bringing the most common case out.

[labath]

Linux has this factored into a separate function (UpdateXSTATEforWrite), but this isn't too bad either. Could be another candidate for factoring...

lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp

case lldb_ds_x86_64:
     m_gpr.r_ds = reg_value.GetAsUInt32();
     break;
   case lldb_es_x86_64:
     m_gpr.r_es = reg_value.GetAsUInt32();
     break;
 #endif
   case lldb_fctrl_x86_64:
     m_xstate.xs_fxsave.fx_cw = reg_value.GetAsUInt16();
+    m_xstate.xs_xstate_bv |= XCR0_X87;
     break;
   case lldb_fstat_x86_64:
     m_xstate.xs_fxsave.fx_sw = reg_value.GetAsUInt16();
+    m_xstate.xs_xstate_bv |= XCR0_X87;
     break;
   case lldb_ftag_x86_64:
     m_xstate.xs_fxsave.fx_tw = reg_value.GetAsUInt16();
+    m_xstate.xs_xstate_bv |= XCR0_X87;
     break;
   case lldb_fop_x86_64:
     m_xstate.xs_fxsave.fx_opcode = reg_value.GetAsUInt16();
+    m_xstate.xs_xstate_bv |= XCR0_X87;
     break;
   case lldb_fiseg_x86_64:
     m_xstate.xs_fxsave.fx_ip.fa_32.fa_seg = reg_value.GetAsUInt32();
+    m_xstate.xs_xstate_bv |= XCR0_X87;
     break;
   case lldb_fioff_x86_64:
     m_xstate.xs_fxsave.fx_ip.fa_32.fa_off = reg_value.GetAsUInt32();
+    m_xstate.xs_xstate_bv |= XCR0_X87;
     break;
   case lldb_foseg_x86_64:
     m_xstate.xs_fxsave.fx_dp.fa_32.fa_seg = reg_value.GetAsUInt32();
+    m_xstate.xs_xstate_bv |= XCR0_X87;
     break;
   case lldb_fooff_x86_64:
     m_xstate.xs_fxsave.fx_dp.fa_32.fa_off = reg_value.GetAsUInt32();
+    m_xstate.xs_xstate_bv |= XCR0_X87;
     break;
   case lldb_mxcsr_x86_64:
     m_xstate.xs_fxsave.fx_mxcsr = reg_value.GetAsUInt32();
+    m_xstate.xs_xstate_bv |= XCR0_SSE;
     break;
   case lldb_mxcsrmask_x86_64:
     m_xstate.xs_fxsave.fx_mxcsr_mask = reg_value.GetAsUInt32();
+    m_xstate.xs_xstate_bv |= XCR0_SSE;
     break;
   case lldb_st0_x86_64:
   case lldb_st1_x86_64:
   case lldb_st2_x86_64:
   case lldb_st3_x86_64:
   case lldb_st4_x86_64:
   case lldb_st5_x86_64:
   case lldb_st6_x86_64:
   case lldb_st7_x86_64:
     ::memcpy(&m_xstate.xs_fxsave.fx_87_ac[reg - lldb_st0_x86_64],
              reg_value.GetBytes(), reg_value.GetByteSize());
+    m_xstate.xs_xstate_bv |= XCR0_X87;
     break;
   case lldb_mm0_x86_64:
   case lldb_mm1_x86_64:
   case lldb_mm2_x86_64:
   case lldb_mm3_x86_64:
   case lldb_mm4_x86_64:
   case lldb_mm5_x86_64:
   case lldb_mm6_x86_64:
   case lldb_mm7_x86_64:
     ::memcpy(&m_xstate.xs_fxsave.fx_87_ac[reg - lldb_mm0_x86_64],
              reg_value.GetBytes(), reg_value.GetByteSize());
+    m_xstate.xs_xstate_bv |= XCR0_X87;
     break;
   case lldb_xmm0_x86_64:
   case lldb_xmm1_x86_64:
   case lldb_xmm2_x86_64:
   case lldb_xmm3_x86_64:
   case lldb_xmm4_x86_64:
   case lldb_xmm5_x86_64:
   case lldb_xmm6_x86_64:
   case lldb_xmm7_x86_64:
   case lldb_xmm8_x86_64:
   case lldb_xmm9_x86_64:
   case lldb_xmm10_x86_64:
   case lldb_xmm11_x86_64:
   case lldb_xmm12_x86_64:
   case lldb_xmm13_x86_64:
   case lldb_xmm14_x86_64:
   case lldb_xmm15_x86_64:
     if (!(m_xstate.xs_rfbm & XCR0_SSE)) {
       error.SetErrorStringWithFormat(
           "register \"%s\" not supported by CPU/kernel", reg_info->name);
     } else {
       ::memcpy(&m_xstate.xs_fxsave.fx_xmm[reg - lldb_xmm0_x86_64],
                reg_value.GetBytes(), reg_value.GetByteSize());
+      m_xstate.xs_xstate_bv |= XCR0_SSE;
     }
     break;
   case lldb_ymm0_x86_64:
   case lldb_ymm1_x86_64:
   case lldb_ymm2_x86_64:
   case lldb_ymm3_x86_64:
   case lldb_ymm4_x86_64:
   case lldb_ymm5_x86_64:
if (!(m_xstate.xs_rfbm & XCR0_SSE) ||
       error.SetErrorStringWithFormat(
           "register \"%s\" not supported by CPU/kernel", reg_info->name);
     } else {
       uint32_t reg_index = reg - lldb_ymm0_x86_64;
       YMMReg ymm;
       ::memcpy(ymm.bytes, reg_value.GetBytes(), reg_value.GetByteSize());
       YMMToXState(ymm, m_xstate.xs_fxsave.fx_xmm[reg_index].xmm_bytes,
                   m_xstate.xs_ymm_hi128.xs_ymm[reg_index].ymm_bytes);
+      m_xstate.xs_xstate_bv |= XCR0_SSE | XCR0_YMM_Hi128;
     }
     break;
   case lldb_dr0_x86_64:
   case lldb_dr1_x86_64:
   case lldb_dr2_x86_64:
   case lldb_dr3_x86_64:
   case lldb_dr4_x86_64:
   case lldb_dr5_x86_64: