Fix reading FIP/FDP registers to correctly return segment and offset
parts. On amd64, this roughly matches the Linux behavior of splitting
the 64-bit FIP/FDP into two halves, and putting the higher 32 bits
into f*seg and lower into f*off. Well, actually we use only 16 bits
of higher half but the CPUs do not seem to handle more than that anyway.
Details
Details
Diff Detail
Diff Detail
- Repository
- rG LLVM Github Monorepo
Event Timeline
lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp | ||
---|---|---|
954 | GetAsUInt32 above and GetAsUInt64 here? |
GetAsUInt32 above and GetAsUInt64 here?