[llvm-exegesis][NFC] Let `ExegesisTarget::randomizeTargetMCOperand`

[courbet]

Summary

take an Operand rather than a Variable. Return the value instead of
having an output parameter.

llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp

void setRandomAliasing(const AliasingConfigurations &AliasingConfigurations,
                        InstructionTemplate &DefIB, InstructionTemplate &UseIB) {
   assert(!AliasingConfigurations.empty());
   assert(!AliasingConfigurations.hasImplicitAliasing());
   const auto &RandomConf = randomElement(AliasingConfigurations.Configurations);
   setRegisterOperandValue(randomElement(RandomConf.Defs), DefIB);
   setRegisterOperandValue(randomElement(RandomConf.Uses), UseIB);
 }
 
-static Error randomizeMCOperand(const LLVMState &State,
-                                const Instruction &Instr, const Variable &Var,
-                                MCOperand &AssignedValue,
+static Expected<MCOperand> randomizeMCOperand(const LLVMState &State,
+                                              const Instruction &Instr,
+                                              const Variable &Var,
                                               const BitVector &ForbiddenRegs) {
   const Operand &Op = Instr.getPrimaryOperand(Var);
   if (Op.getExplicitOperandInfo().OperandType >=
       MCOI::OperandType::OPERAND_FIRST_TARGET)
-    return State.getExegesisTarget().randomizeTargetMCOperand(
-        Instr, Var, AssignedValue, ForbiddenRegs);
+    return State.getExegesisTarget().randomizeTargetMCOperand(Instr, Op,
+                                                              ForbiddenRegs);
   switch (Op.getExplicitOperandInfo().OperandType) {
   case MCOI::OperandType::OPERAND_IMMEDIATE:
     // FIXME: explore immediate values too.
-    AssignedValue = MCOperand::createImm(1);
-    break;
+    return MCOperand::createImm(1);
   case MCOI::OperandType::OPERAND_REGISTER: {
     assert(Op.isReg());
     auto AllowedRegs = Op.getRegisterAliasing().sourceBits();
     assert(AllowedRegs.size() == ForbiddenRegs.size());
     for (auto I : ForbiddenRegs.set_bits())
       AllowedRegs.reset(I);
     if (!AllowedRegs.any())
       return make_error<Failure>(
           Twine("no available registers:\ncandidates:\n")
               .concat(debugString(State.getRegInfo(),
                                   Op.getRegisterAliasing().sourceBits()))
               .concat("\nforbidden:\n")
               .concat(debugString(State.getRegInfo(), ForbiddenRegs)));
-    AssignedValue = MCOperand::createReg(randomBit(AllowedRegs));
-    break;
+    return MCOperand::createReg(randomBit(AllowedRegs));
   }
   default:
     break;
   }
-  return Error::success();
+  return make_error<Failure>(
+      Twine("cannot create operand of type")
+          .concat(Twine(Op.getExplicitOperandInfo().OperandType)));
 }
 
 Error randomizeUnsetVariables(const LLVMState &State,
                               const BitVector &ForbiddenRegs,
                               InstructionTemplate &IT) {
   for (const Variable &Var : IT.getInstr().Variables) {
     MCOperand &AssignedValue = IT.getValueFor(Var);
-    if (!AssignedValue.isValid())
-      if (auto Err = randomizeMCOperand(State, IT.getInstr(), Var,
-                                        AssignedValue, ForbiddenRegs))
-        return Err;
+    if (!AssignedValue.isValid()) {
+      auto ErrorOr =
+          randomizeMCOperand(State, IT.getInstr(), Var, ForbiddenRegs);
+      if (!ErrorOr)
+        return ErrorOr.takeError();
+      AssignedValue = *ErrorOr;
+    }
   }
   return Error::success();
 }
 
 } // namespace exegesis
 } // namespace llvm

llvm/tools/llvm-exegesis/lib/Target.h

public:
 
   // Returns the maximum number of bytes a load/store instruction can access at
   // once. This is typically the size of the largest register available on the
   // processor. Note that this only used as a hint to generate independant
   // load/stores to/from memory, so the exact returned value does not really
   // matter as long as it's large enough.
   virtual unsigned getMaxMemoryAccessSize() const { return 0; }
 
-  // Assigns a random operand of the right type to variable Var.
+  // Creates a random operand of the right type for operand Op.
   // The target is responsible for handling any operand starting from
   // OPERAND_FIRST_TARGET.
-  virtual Error randomizeTargetMCOperand(const Instruction &Instr,
-                                         const Variable &Var,
-                                         MCOperand &AssignedValue,
-                                         const BitVector &ForbiddenRegs) const {
+  virtual Expected<MCOperand>
+  randomizeTargetMCOperand(const Instruction &Instr, const Operand &Op,
     return make_error<Failure>(
         "targets with target-specific operands should implement this");
   }
 
   // Returns true if this instruction is supported as a back-to-back
   // instructions.
   // FIXME: Eventually we should discover this dynamically.
   virtual bool allowAsBackToBack(const Instruction &Instr) const {

llvm/tools/llvm-exegesis/lib/X86/Target.cpp

private:
   void addTargetSpecificPasses(PassManagerBase &PM) const override;
 
   unsigned getScratchMemoryRegister(const Triple &TT) const override;
 
   unsigned getLoopCounterRegister(const Triple &) const override;
 
   unsigned getMaxMemoryAccessSize() const override { return 64; }
 
-  Error randomizeTargetMCOperand(const Instruction &Instr, const Variable &Var,
-                                 MCOperand &AssignedValue,
-                                 const BitVector &ForbiddenRegs) const override;
+  Expected<MCOperand>
+  randomizeTargetMCOperand(const Instruction &Instr, const Operand &Op,
 
   void fillMemoryOperands(InstructionTemplate &IT, unsigned Reg,
                           unsigned Offset) const override;
 
   void decrementLoopCounterAndJump(MachineBasicBlock &MBB,
                                    MachineBasicBlock &TargetMBB,
                                    const MCInstrInfo &MII) const override;
 

 
 unsigned ExegesisX86Target::getLoopCounterRegister(const Triple &TT) const {
   if (!TT.isArch64Bit()) {
     return 0;
   }
   return kLoopCounterReg;
 }
 
-Error ExegesisX86Target::randomizeTargetMCOperand(
-    const Instruction &Instr, const Variable &Var, MCOperand &AssignedValue,
+Expected<MCOperand> ExegesisX86Target::randomizeTargetMCOperand(
+    const Instruction &Instr, const Operand &Op,
     const BitVector &ForbiddenRegs) const {
-  const Operand &Op = Instr.getPrimaryOperand(Var);
   switch (Op.getExplicitOperandInfo().OperandType) {
   case X86::OperandType::OPERAND_ROUNDING_CONTROL:
-    AssignedValue =
-        MCOperand::createImm(randomIndex(X86::STATIC_ROUNDING::TO_ZERO));
-    return Error::success();
+    return MCOperand::createImm(randomIndex(X86::STATIC_ROUNDING::TO_ZERO));
   default:
     break;
   }
   return make_error<Failure>(
       Twine("unimplemented operand type ")
           .concat(Twine(Op.getExplicitOperandInfo().OperandType)));
 }