[SDAG] Do not convert undef to 0 when folding CONCAT/BUILD_VECTOR

[kparzysz]

Summary

When calling DAG.getNode(ISD::CONCAT_VECTOR, ...) with arguments that are BUILD_VECTOR and/or undef, the DAG will try to fold it into one large BUILD_VECTOR. In the process of preparing the operands, it may perform sign- or zero-extension of all values having width less than the required one. This includes undefs, which causes them to become zeros. This conversion from undef to "def" is not necessary and may inhibit further optimizations.

Concrete example: the original code had this operation in it:

v8i8 = BUILD_VECTOR t109, t109, t109, t109, t109, t109, t109, undef:i32

The operands were all of a legal type i32, i8 as a scalar is not legal on this target. The vector was then widened to v128i8 by concatenating it with a number of undef vectors. The folding described above broke up all these undef vectors into individual elements, and extended them to i32, which resulted in (unnecessarily) appending a number of 0s instead.

[craig.topper]

LGTM

[kparzysz]

Committed in db04bec5f1eeb581ee1470e5f444cc7b918c6d93. Somehow phabricator missed it and didn't close automatically.

llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

else
       return SDValue();
   }
 
   // BUILD_VECTOR requires all inputs to be of the same type, find the
   // maximum type and extend them all.
   for (SDValue Op : Elts)
     SVT = (SVT.bitsLT(Op.getValueType()) ? Op.getValueType() : SVT);
 
-  if (SVT.bitsGT(VT.getScalarType()))
-    for (SDValue &Op : Elts)
+  if (SVT.bitsGT(VT.getScalarType())) {
+    for (SDValue &Op : Elts) {
+      if (Op.isUndef())
+        Op = DAG.getUNDEF(SVT);
+      else
         Op = DAG.getTargetLoweringInfo().isZExtFree(Op.getValueType(), SVT)
                  ? DAG.getZExtOrTrunc(Op, DL, SVT)
                  : DAG.getSExtOrTrunc(Op, DL, SVT);
+    }
+  }
 
   SDValue V = DAG.getBuildVector(VT, DL, Elts);
   NewSDValueDbgMsg(V, "New node fold concat vectors: ", &DAG);
   return V;
 }
 
 /// Gets or creates the specified node.
 SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT) {

llvm/test/CodeGen/Hexagon/autohvx/isel-undef-not-zero.ll

+; RUN: llc -march=hexagon -hexagon-hvx-widen=32 < %s | FileCheck %s
+
+; Check that we don't generate lots of vinserts (of 0 that should be undef).
+; CHECK: vinsert
+; CHECK: vinsert
+; CHECK-NOT: vinsert
+
+target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
+target triple = "hexagon"
+
+define dllexport void @f0(i8* noalias align 128 %a0) #0 {
+b0:
+  %v0 = bitcast i8* %a0 to i32*
+  %v1 = getelementptr inbounds i32, i32* %v0, i32 undef
+  %v2 = bitcast i32* %v1 to <7 x i32>*
+  br label %b1
+
+b1:                                               ; preds = %b0
+  %v3 = load i8, i8* undef, align 1
+  %v4 = insertelement <7 x i8> undef, i8 %v3, i32 0
+  %v5 = shufflevector <7 x i8> %v4, <7 x i8> undef, <7 x i32> zeroinitializer
+  %v6 = zext <7 x i8> %v5 to <7 x i32>
+  %v7 = load <7 x i8>, <7 x i8>* undef, align 1
+  %v8 = zext <7 x i8> %v7 to <7 x i32>
+  %v9 = mul nsw <7 x i32> %v6, %v8
+  %v10 = add nsw <7 x i32> %v9, zeroinitializer
+  store <7 x i32> %v10, <7 x i32>* %v2, align 4
+  ret void
+}
+
+attributes #0 = { nounwind "target-cpu"="hexagonv66" "target-features"="+hvx,+hvx-length128b" }
+

llvm/test/CodeGen/X86/vec-strict-cmp-sub128.ll

 ; AVX512-32-NEXT:    pushl %ebp
 ; AVX512-32-NEXT:    movl %esp, %ebp
 ; AVX512-32-NEXT:    andl $-16, %esp
 ; AVX512-32-NEXT:    subl $16, %esp
 ; AVX512-32-NEXT:    movw $-3, %ax
 ; AVX512-32-NEXT:    kmovw %eax, %k0
 ; AVX512-32-NEXT:    vcomiss 8(%ebp), %xmm2
 ; AVX512-32-NEXT:    seta %al
-; AVX512-32-NEXT:    andl $1, %eax
 ; AVX512-32-NEXT:    kmovw %eax, %k1
 ; AVX512-32-NEXT:    kandw %k0, %k1, %k0
 ; AVX512-32-NEXT:    vmovshdup {{.*#+}} xmm2 = xmm2[1,1,3,3]
 ; AVX512-32-NEXT:    vcomiss 12(%ebp), %xmm2
 ; AVX512-32-NEXT:    seta %al
 ; AVX512-32-NEXT:    kmovw %eax, %k1
 ; AVX512-32-NEXT:    kshiftlw $15, %k1, %k1
 ; AVX512-32-NEXT:    kshiftrw $14, %k1, %k1
 ; AVX512-32-NEXT:    korw %k1, %k0, %k1
 ; AVX512-32-NEXT:    vpblendmd %xmm0, %xmm1, %xmm0 {%k1}
 ; AVX512-32-NEXT:    movl %ebp, %esp
 ; AVX512-32-NEXT:    popl %ebp
 ; AVX512-32-NEXT:    retl
 ;
 ; AVX512-64-LABEL: test_v2f32_ogt_s:
 ; AVX512-64:       # %bb.0:
 ; AVX512-64-NEXT:    movw $-3, %ax
 ; AVX512-64-NEXT:    kmovw %eax, %k0
 ; AVX512-64-NEXT:    vcomiss %xmm3, %xmm2
 ; AVX512-64-NEXT:    seta %al
-; AVX512-64-NEXT:    andl $1, %eax
 ; AVX512-64-NEXT:    kmovw %eax, %k1
 ; AVX512-64-NEXT:    kandw %k0, %k1, %k0
 ; AVX512-64-NEXT:    vmovshdup {{.*#+}} xmm3 = xmm3[1,1,3,3]
 ; AVX512-64-NEXT:    vmovshdup {{.*#+}} xmm2 = xmm2[1,1,3,3]
 ; AVX512-64-NEXT:    vcomiss %xmm3, %xmm2
 ; AVX512-64-NEXT:    seta %al
 ; AVX512-64-NEXT:    kmovw %eax, %k1
 ; AVX512-64-NEXT:    kshiftlw $15, %k1, %k1

 ; AVX512F-32-NEXT:    andl $-16, %esp
 ; AVX512F-32-NEXT:    subl $16, %esp
 ; AVX512F-32-NEXT:    # kill: def $xmm1 killed $xmm1 def $zmm1
 ; AVX512F-32-NEXT:    # kill: def $xmm0 killed $xmm0 def $zmm0
 ; AVX512F-32-NEXT:    movw $-3, %ax
 ; AVX512F-32-NEXT:    kmovw %eax, %k0
 ; AVX512F-32-NEXT:    vcomiss 8(%ebp), %xmm2
 ; AVX512F-32-NEXT:    seta %al
-; AVX512F-32-NEXT:    andl $1, %eax
 ; AVX512F-32-NEXT:    kmovw %eax, %k1
 ; AVX512F-32-NEXT:    kandw %k0, %k1, %k0
 ; AVX512F-32-NEXT:    vmovshdup {{.*#+}} xmm2 = xmm2[1,1,3,3]
 ; AVX512F-32-NEXT:    vcomiss 12(%ebp), %xmm2
 ; AVX512F-32-NEXT:    seta %al
 ; AVX512F-32-NEXT:    kmovw %eax, %k1
 ; AVX512F-32-NEXT:    kshiftlw $15, %k1, %k1
 ; AVX512F-32-NEXT:    kshiftrw $14, %k1, %k1
 ; AVX512F-32-NEXT:    korw %k1, %k0, %k1
 ; AVX512F-32-NEXT:    vpblendmd %zmm0, %zmm1, %zmm0 {%k1}
 ; AVX512F-32-NEXT:    # kill: def $xmm0 killed $xmm0 killed $zmm0
 ; AVX512F-32-NEXT:    movl %ebp, %esp
 ; AVX512F-32-NEXT:    popl %ebp
 ; AVX512F-32-NEXT:    vzeroupper
 ; AVX512F-32-NEXT:    retl
 ;
 ; AVX512F-64-LABEL: test_v2f32_ogt_s:
 ; AVX512F-64:       # %bb.0:
 ; AVX512F-64-NEXT:    # kill: def $xmm1 killed $xmm1 def $zmm1
 ; AVX512F-64-NEXT:    # kill: def $xmm0 killed $xmm0 def $zmm0
 ; AVX512F-64-NEXT:    movw $-3, %ax
 ; AVX512F-64-NEXT:    kmovw %eax, %k0
 ; AVX512F-64-NEXT:    vcomiss %xmm3, %xmm2
 ; AVX512F-64-NEXT:    seta %al
-; AVX512F-64-NEXT:    andl $1, %eax
 ; AVX512F-64-NEXT:    kmovw %eax, %k1
 ; AVX512F-64-NEXT:    kandw %k0, %k1, %k0
 ; AVX512F-64-NEXT:    vmovshdup {{.*#+}} xmm3 = xmm3[1,1,3,3]
 ; AVX512F-64-NEXT:    vmovshdup {{.*#+}} xmm2 = xmm2[1,1,3,3]
 ; AVX512F-64-NEXT:    vcomiss %xmm3, %xmm2
 ; AVX512F-64-NEXT:    seta %al
 ; AVX512F-64-NEXT:    kmovw %eax, %k1
 ; AVX512F-64-NEXT:    kshiftlw $15, %k1, %k1

 ; AVX512-32-NEXT:    subl $16, %esp
 ; AVX512-32-NEXT:    movw $-3, %ax
 ; AVX512-32-NEXT:    kmovw %eax, %k0
 ; AVX512-32-NEXT:    vucomiss 8(%ebp), %xmm2
 ; AVX512-32-NEXT:    setnp %al
 ; AVX512-32-NEXT:    sete %cl
 ; AVX512-32-NEXT:    testb %al, %cl
 ; AVX512-32-NEXT:    setne %al
-; AVX512-32-NEXT:    andl $1, %eax
 ; AVX512-32-NEXT:    kmovw %eax, %k1
 ; AVX512-32-NEXT:    kandw %k0, %k1, %k0
 ; AVX512-32-NEXT:    vmovshdup {{.*#+}} xmm2 = xmm2[1,1,3,3]
 ; AVX512-32-NEXT:    vucomiss 12(%ebp), %xmm2
 ; AVX512-32-NEXT:    setnp %al
 ; AVX512-32-NEXT:    sete %cl
 ; AVX512-32-NEXT:    testb %al, %cl
 ; AVX512-32-NEXT:    setne %al
 ; AVX512-32-NEXT:    kmovw %eax, %k1
 ; AVX512-32-NEXT:    kshiftlw $15, %k1, %k1
 ; AVX512-32-NEXT:    kshiftrw $14, %k1, %k1
 ; AVX512-32-NEXT:    korw %k1, %k0, %k1
 ; AVX512-32-NEXT:    vpblendmd %xmm0, %xmm1, %xmm0 {%k1}
 ; AVX512-32-NEXT:    movl %ebp, %esp
 ; AVX512-32-NEXT:    popl %ebp
 ; AVX512-32-NEXT:    retl
 ;
 ; AVX512-64-LABEL: test_v2f32_oeq_q:
 ; AVX512-64:       # %bb.0:
-; AVX512-64-NEXT:    vmovshdup {{.*#+}} xmm4 = xmm3[1,1,3,3]
-; AVX512-64-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm2[1,1,3,3]
-; AVX512-64-NEXT:    vucomiss %xmm4, %xmm5
+; AVX512-64-NEXT:    vucomiss %xmm3, %xmm2
 ; AVX512-64-NEXT:    setnp %al
 ; AVX512-64-NEXT:    sete %cl
 ; AVX512-64-NEXT:    testb %al, %cl
 ; AVX512-64-NEXT:    setne %al
 ; AVX512-64-NEXT:    kmovw %eax, %k0
-; AVX512-64-NEXT:    kshiftlw $15, %k0, %k0
-; AVX512-64-NEXT:    kshiftrw $14, %k0, %k0
+; AVX512-64-NEXT:    movw $-3, %ax
+; AVX512-64-NEXT:    kmovw %eax, %k1
+; AVX512-64-NEXT:    kandw %k1, %k0, %k0
+; AVX512-64-NEXT:    vmovshdup {{.*#+}} xmm3 = xmm3[1,1,3,3]
+; AVX512-64-NEXT:    vmovshdup {{.*#+}} xmm2 = xmm2[1,1,3,3]
 ; AVX512-64-NEXT:    vucomiss %xmm3, %xmm2
 ; AVX512-64-NEXT:    setnp %al
 ; AVX512-64-NEXT:    sete %cl
 ; AVX512-64-NEXT:    testb %al, %cl
 ; AVX512-64-NEXT:    setne %al
-; AVX512-64-NEXT:    andl $1, %eax
 ; AVX512-64-NEXT:    kmovw %eax, %k1
-; AVX512-64-NEXT:    movw $-3, %ax
-; AVX512-64-NEXT:    kmovw %eax, %k2
-; AVX512-64-NEXT:    kandw %k2, %k1, %k1
-; AVX512-64-NEXT:    korw %k0, %k1, %k1
+; AVX512-64-NEXT:    kshiftlw $15, %k1, %k1
+; AVX512-64-NEXT:    kshiftrw $14, %k1, %k1
+; AVX512-64-NEXT:    korw %k1, %k0, %k1
 ; AVX512-64-NEXT:    vpblendmd %xmm0, %xmm1, %xmm0 {%k1}
 ; AVX512-64-NEXT:    retq
 ;
 ; AVX512F-32-LABEL: test_v2f32_oeq_q:
 ; AVX512F-32:       # %bb.0:
 ; AVX512F-32-NEXT:    pushl %ebp
 ; AVX512F-32-NEXT:    movl %esp, %ebp
 ; AVX512F-32-NEXT:    andl $-16, %esp
 ; AVX512F-32-NEXT:    subl $16, %esp
 ; AVX512F-32-NEXT:    # kill: def $xmm1 killed $xmm1 def $zmm1
 ; AVX512F-32-NEXT:    # kill: def $xmm0 killed $xmm0 def $zmm0
 ; AVX512F-32-NEXT:    movw $-3, %ax
 ; AVX512F-32-NEXT:    kmovw %eax, %k0
 ; AVX512F-32-NEXT:    vucomiss 8(%ebp), %xmm2
 ; AVX512F-32-NEXT:    setnp %al
 ; AVX512F-32-NEXT:    sete %cl
 ; AVX512F-32-NEXT:    testb %al, %cl
 ; AVX512F-32-NEXT:    setne %al
-; AVX512F-32-NEXT:    andl $1, %eax
 ; AVX512F-32-NEXT:    kmovw %eax, %k1
 ; AVX512F-32-NEXT:    kandw %k0, %k1, %k0
 ; AVX512F-32-NEXT:    vmovshdup {{.*#+}} xmm2 = xmm2[1,1,3,3]
 ; AVX512F-32-NEXT:    vucomiss 12(%ebp), %xmm2
 ; AVX512F-32-NEXT:    setnp %al
 ; AVX512F-32-NEXT:    sete %cl
 ; AVX512F-32-NEXT:    testb %al, %cl
 ; AVX512F-32-NEXT:    setne %al
 ; AVX512F-32-NEXT:    kmovw %eax, %k1
 ; AVX512F-32-NEXT:    kshiftlw $15, %k1, %k1
 ; AVX512F-32-NEXT:    kshiftrw $14, %k1, %k1
 ; AVX512F-32-NEXT:    korw %k1, %k0, %k1
 ; AVX512F-32-NEXT:    vpblendmd %zmm0, %zmm1, %zmm0 {%k1}
 ; AVX512F-32-NEXT:    # kill: def $xmm0 killed $xmm0 killed $zmm0
 ; AVX512F-32-NEXT:    movl %ebp, %esp
 ; AVX512F-32-NEXT:    popl %ebp
 ; AVX512F-32-NEXT:    vzeroupper
 ; AVX512F-32-NEXT:    retl
 ;
 ; AVX512F-64-LABEL: test_v2f32_oeq_q:
 ; AVX512F-64:       # %bb.0:
 ; AVX512F-64-NEXT:    # kill: def $xmm1 killed $xmm1 def $zmm1
 ; AVX512F-64-NEXT:    # kill: def $xmm0 killed $xmm0 def $zmm0
-; AVX512F-64-NEXT:    vmovshdup {{.*#+}} xmm4 = xmm3[1,1,3,3]
-; AVX512F-64-NEXT:    vmovshdup {{.*#+}} xmm5 = xmm2[1,1,3,3]
-; AVX512F-64-NEXT:    vucomiss %xmm4, %xmm5
+; AVX512F-64-NEXT:    vucomiss %xmm3, %xmm2
 ; AVX512F-64-NEXT:    setnp %al
 ; AVX512F-64-NEXT:    sete %cl
 ; AVX512F-64-NEXT:    testb %al, %cl
 ; AVX512F-64-NEXT:    setne %al
 ; AVX512F-64-NEXT:    kmovw %eax, %k0
-; AVX512F-64-NEXT:    kshiftlw $15, %k0, %k0
-; AVX512F-64-NEXT:    kshiftrw $14, %k0, %k0
+; AVX512F-64-NEXT:    movw $-3, %ax
+; AVX512F-64-NEXT:    kmovw %eax, %k1
+; AVX512F-64-NEXT:    kandw %k1, %k0, %k0
+; AVX512F-64-NEXT:    vmovshdup {{.*#+}} xmm3 = xmm3[1,1,3,3]
+; AVX512F-64-NEXT:    vmovshdup {{.*#+}} xmm2 = xmm2[1,1,3,3]
 ; AVX512F-64-NEXT:    vucomiss %xmm3, %xmm2
 ; AVX512F-64-NEXT:    setnp %al
 ; AVX512F-64-NEXT:    sete %cl
 ; AVX512F-64-NEXT:    testb %al, %cl
 ; AVX512F-64-NEXT:    setne %al
-; AVX512F-64-NEXT:    andl $1, %eax
 ; AVX512F-64-NEXT:    kmovw %eax, %k1
-; AVX512F-64-NEXT:    movw $-3, %ax
-; AVX512F-64-NEXT:    kmovw %eax, %k2
-; AVX512F-64-NEXT:    kandw %k2, %k1, %k1
-; AVX512F-64-NEXT:    korw %k0, %k1, %k1
+; AVX512F-64-NEXT:    kshiftlw $15, %k1, %k1
+; AVX512F-64-NEXT:    kshiftrw $14, %k1, %k1
+; AVX512F-64-NEXT:    korw %k1, %k0, %k1
 ; AVX512F-64-NEXT:    vpblendmd %zmm0, %zmm1, %zmm0 {%k1}
 ; AVX512F-64-NEXT:    # kill: def $xmm0 killed $xmm0 killed $zmm0
 ; AVX512F-64-NEXT:    vzeroupper
 ; AVX512F-64-NEXT:    retq
   %cond = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f32(
                                                <2 x float> %f1, <2 x float> %f2, metadata !"oeq",
                                                metadata !"fpexcept.strict") #0
   %res = select <2 x i1> %cond, <2 x i32> %a, <2 x i32> %b
   ret <2 x i32> %res
 }
 
 attributes #0 = { strictfp nounwind }
 
 declare <2 x i1> @llvm.experimental.constrained.fcmp.v2f32(<2 x float>, <2 x float>, metadata, metadata)
 declare <2 x i1> @llvm.experimental.constrained.fcmps.v2f32(<2 x float>, <2 x float>, metadata, metadata)