[mips][microMIPSr6] Implement mips32 to microMIPSr6 mapping support

[dsanders]

I'm not very familiar with the mapping implementation of microMIPS at the moment so I don't feel able to review this yet. All I know is that 'MM' does some magic that maps MIPS32r2 instructions to microMIPS instructions. Is there someone who is better able to review this? If not, I'll look into it and learn how this works.

[jkolek]

LGTM.

llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp

EncodeInstruction(const MCInst &MI, raw_ostream &OS,
   // Check for unimplemented opcodes.
   // Unfortunately in MIPS both NOP and SLL will come in with Binary == 0
   // so we have to special check for them.
   unsigned Opcode = TmpInst.getOpcode();
   if ((Opcode != Mips::NOP) && (Opcode != Mips::SLL) &&
       (Opcode != Mips::SLL_MM) && !Binary)
     llvm_unreachable("unimplemented opcode in EncodeInstruction()");
 
+  int NewOpcode = -1;
   if (isMicroMips(STI)) {
-    int NewOpcode = isMips32r6(STI) ?
-                    Mips::MipsR62MicroMipsR6(Opcode, Mips::Arch_micromipsr6) :
-                    Mips::Std2MicroMips(Opcode, Mips::Arch_micromips);
+    if (isMips32r6(STI)) {
+      NewOpcode = Mips::MipsR62MicroMipsR6(Opcode, Mips::Arch_micromipsr6);
+      if (NewOpcode == -1)
+        NewOpcode = Mips::Std2MicroMipsR6(Opcode, Mips::Arch_micromipsr6);
+    }
+    else
+      NewOpcode = Mips::Std2MicroMips(Opcode, Mips::Arch_micromips);
+
     if (NewOpcode != -1) {
       if (Fixups.size() > N)
         Fixups.pop_back();
+
       Opcode = NewOpcode;
       TmpInst.setOpcode (NewOpcode);
       Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI);
     }
   }
 
   const MCInstrDesc &Desc = MCII.get(TmpInst.getOpcode());
 

llvm/trunk/lib/Target/Mips/MipsInstrFormats.td

def Std2MicroMips : InstrMapping {
   // Instructions with the same predicate sense form a column.
   let ColFields = ["Arch"];
   // The key column is the unpredicated instructions.
   let KeyCol = ["se"];
   // Value columns are PredSense=true and PredSense=false
   let ValueCols = [["se"], ["micromips"]];
 }
 
+class StdMMR6Rel;
+
+def Std2MicroMipsR6 : InstrMapping {
+  let FilterClass = "StdMMR6Rel";
+  // Instructions with the same BaseOpcode and isNVStore values form a row.
+  let RowFields = ["BaseOpcode"];
+  // Instructions with the same predicate sense form a column.
+  let ColFields = ["Arch"];
+  // The key column is the unpredicated instructions.
+  let KeyCol = ["se"];
+  // Value columns are PredSense=true and PredSense=false
+  let ValueCols = [["se"], ["micromipsr6"]];
+}
+
 class StdArch {
   string Arch = "se";
 }
 
 // Generic Mips Format
 class MipsInst<dag outs, dag ins, string asmstr, list<dag> pattern,
                InstrItinClass itin, Format f>: Instruction
 {