[mips] Expose adjustStackPtr() from MipsInstrInfo. NFC.

[vkalintiris]

Summary

adjustStackPtr() is implemented from both MipsSEInstrInfo and
Mips16InstrInfo. It makes sense to expose this function from
MipsInstrInfo and avoid explicit casting in some cases.

Depends on D8638.

[echristo]

LGTM.

-eric

[dsanders]

LGTM

lib/Target/Mips/Mips16FrameLowering.cpp

bool Mips16FrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
 
   return true;
 }
 
 // Eliminate ADJCALLSTACKDOWN, ADJCALLSTACKUP pseudo instructions
 void Mips16FrameLowering::
 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
                               MachineBasicBlock::iterator I) const {
-  const Mips16InstrInfo &TII =
-    *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo());
-
   if (!hasReservedCallFrame(MF)) {
     int64_t Amount = I->getOperand(0).getImm();
     if (Amount) {
       if (I->getOpcode() == Mips::ADJCALLSTACKDOWN)
         Amount = -Amount;
 
-      TII.adjustStackPtr(Mips::SP, Amount, MBB, I);
+      STI.getInstrInfo()->adjustStackPtr(Mips::SP, Amount, MBB, I);
     }
   }
 
   MBB.erase(I);
 }
 
 bool
 Mips16FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {

lib/Target/Mips/Mips16InstrInfo.h

public:
 
   // Adjust SP by FrameSize bytes. Restore RA, S0, S1
   void restoreFrame(unsigned SP, int64_t FrameSize, MachineBasicBlock &MBB,
                       MachineBasicBlock::iterator I) const;
 
 
   /// Adjust SP by Amount bytes.
   void adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB,
-                      MachineBasicBlock::iterator I) const;
+                      MachineBasicBlock::iterator I) const override;
 
   /// Emit a series of instructions to load an immediate.
   // This is to adjust some FrameReg. We return the new register to be used
   // in place of FrameReg and the adjusted immediate field (&NewImm)
   //
   unsigned loadImmediate(unsigned FrameReg,
                          int64_t Imm, MachineBasicBlock &MBB,
                          MachineBasicBlock::iterator II, DebugLoc DL,

lib/Target/Mips/MipsInstrInfo.h

public:
 
   virtual void loadRegFromStack(MachineBasicBlock &MBB,
                                 MachineBasicBlock::iterator MI,
                                 unsigned DestReg, int FrameIndex,
                                 const TargetRegisterClass *RC,
                                 const TargetRegisterInfo *TRI,
                                 int64_t Offset) const = 0;
 
+  virtual void adjustStackPtr(unsigned SP, int64_t Amount,
+                              MachineBasicBlock &MBB,
+                              MachineBasicBlock::iterator I) const = 0;
+
   /// Create an instruction which has the same operands and memory operands
   /// as MI but has a new opcode.
   MachineInstrBuilder genInstrWithNewOpc(unsigned NewOpc,
                                          MachineBasicBlock::iterator I) const;
 
 protected:
   bool isZeroImm(const MachineOperand &op) const;
 

lib/Target/Mips/MipsSEFrameLowering.cpp

MipsSEFrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
   return isInt<16>(MFI->getMaxCallFrameSize() + getStackAlignment()) &&
     !MFI->hasVarSizedObjects();
 }
 
 // Eliminate ADJCALLSTACKDOWN, ADJCALLSTACKUP pseudo instructions
 void MipsSEFrameLowering::
 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
                               MachineBasicBlock::iterator I) const {
-  const MipsSEInstrInfo &TII =
-      *static_cast<const MipsSEInstrInfo *>(STI.getInstrInfo());
-
   if (!hasReservedCallFrame(MF)) {
     int64_t Amount = I->getOperand(0).getImm();
     if (Amount) {
       if (I->getOpcode() == Mips::ADJCALLSTACKDOWN)
         Amount = -Amount;
 
       unsigned SP = STI.isABI_N64() ? Mips::SP_64 : Mips::SP;
-      TII.adjustStackPtr(SP, Amount, MBB, I);
+      STI.getInstrInfo()->adjustStackPtr(SP, Amount, MBB, I);
     }
   }
 
   MBB.erase(I);
 }
 
 void MipsSEFrameLowering::
 processFunctionBeforeCalleeSavedScan(MachineFunction &MF,

lib/Target/Mips/MipsSEInstrInfo.h

void loadRegFromStack(MachineBasicBlock &MBB,
                         int64_t Offset) const override;
 
   bool expandPostRAPseudo(MachineBasicBlock::iterator MI) const override;
 
   unsigned getOppositeBranchOpc(unsigned Opc) const override;
 
   /// Adjust SP by Amount bytes.
   void adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB,
-                      MachineBasicBlock::iterator I) const;
+                      MachineBasicBlock::iterator I) const override;
 
   /// Emit a series of instructions to load an immediate. If NewImm is a
   /// non-NULL parameter, the last instruction is not emitted, but instead
   /// its immediate operand is returned in NewImm.
   unsigned loadImmediate(int64_t Imm, MachineBasicBlock &MBB,
                          MachineBasicBlock::iterator II, DebugLoc DL,
                          unsigned *NewImm) const;