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[mips] Cleanup old floating-point flag conditions definitions. NFC.
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Authored by vkalintiris on Feb 27 2015, 10:49 AM.

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rG41b0100dea3b: [mips] Cleanup old floating-point flag conditions definitions. NFC.
rL235377: [mips] Cleanup old floating-point flag conditions definitions. NFC.

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vkalintiris updated this revision to Diff 20869.Feb 27 2015, 10:49 AM

vkalintiris retitled this revision from to [mips] Cleanup old floating-point flag conditions definitions. NFC..

vkalintiris updated this object.

vkalintiris edited the test plan for this revision. (Show Details)

vkalintiris added a reviewer: dsanders.

LGTM

This revision is now accepted and ready to land.Apr 21 2015, 3:21 AM

Closed by commit rL235377: [mips] Cleanup old floating-point flag conditions definitions. NFC. (authored by vkalintiris). · Explain WhyApr 21 2015, 3:57 AM

This revision was automatically updated to reflect the committed changes.

aaron.ballman mentioned this in rGaf06ff1cf87e: add -use-color option to clang-tidy-diff.py.Feb 18 2021, 6:14 AM

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lib/

Target/

Mips/

MipsInstrFPU.td

22 lines

Diff 20869

lib/Target/Mips/MipsInstrFPU.td

Show First 20 Lines • Show All 507 Lines • ▼ Show 20 Lines	def BC1F : MMRel, BC1F_FT<"bc1f", brtarget, IIBranch, MIPS_BRANCH_F>,
BC1F_FM<0, 0>, ISA_MIPS1_NOT_32R6_64R6;		BC1F_FM<0, 0>, ISA_MIPS1_NOT_32R6_64R6;
def BC1FL : MMRel, BC1F_FT<"bc1fl", brtarget, IIBranch, MIPS_BRANCH_F, 0>,		def BC1FL : MMRel, BC1F_FT<"bc1fl", brtarget, IIBranch, MIPS_BRANCH_F, 0>,
BC1F_FM<1, 0>, ISA_MIPS2_NOT_32R6_64R6;		BC1F_FM<1, 0>, ISA_MIPS2_NOT_32R6_64R6;
def BC1T : MMRel, BC1F_FT<"bc1t", brtarget, IIBranch, MIPS_BRANCH_T>,		def BC1T : MMRel, BC1F_FT<"bc1t", brtarget, IIBranch, MIPS_BRANCH_T>,
BC1F_FM<0, 1>, ISA_MIPS1_NOT_32R6_64R6;		BC1F_FM<0, 1>, ISA_MIPS1_NOT_32R6_64R6;
def BC1TL : MMRel, BC1F_FT<"bc1tl", brtarget, IIBranch, MIPS_BRANCH_T, 0>,		def BC1TL : MMRel, BC1F_FT<"bc1tl", brtarget, IIBranch, MIPS_BRANCH_T, 0>,
BC1F_FM<1, 1>, ISA_MIPS2_NOT_32R6_64R6;		BC1F_FM<1, 1>, ISA_MIPS2_NOT_32R6_64R6;

//===----------------------------------------------------------------------===//
// Floating Point Flag Conditions
//===----------------------------------------------------------------------===//
// Mips condition codes. They must correspond to condcode in MipsInstrInfo.h.
// They must be kept in synch.
def MIPS_FCOND_F : PatLeaf<(i32 0)>;
def MIPS_FCOND_UN : PatLeaf<(i32 1)>;
def MIPS_FCOND_OEQ : PatLeaf<(i32 2)>;
def MIPS_FCOND_UEQ : PatLeaf<(i32 3)>;
def MIPS_FCOND_OLT : PatLeaf<(i32 4)>;
def MIPS_FCOND_ULT : PatLeaf<(i32 5)>;
def MIPS_FCOND_OLE : PatLeaf<(i32 6)>;
def MIPS_FCOND_ULE : PatLeaf<(i32 7)>;
def MIPS_FCOND_SF : PatLeaf<(i32 8)>;
def MIPS_FCOND_NGLE : PatLeaf<(i32 9)>;
def MIPS_FCOND_SEQ : PatLeaf<(i32 10)>;
def MIPS_FCOND_NGL : PatLeaf<(i32 11)>;
def MIPS_FCOND_LT : PatLeaf<(i32 12)>;
def MIPS_FCOND_NGE : PatLeaf<(i32 13)>;
def MIPS_FCOND_LE : PatLeaf<(i32 14)>;
def MIPS_FCOND_NGT : PatLeaf<(i32 15)>;

/// Floating Point Compare		/// Floating Point Compare
def FCMP_S32 : MMRel, CEQS_FT<"s", FGR32, II_C_CC_S, MipsFPCmp>, CEQS_FM<16>,		def FCMP_S32 : MMRel, CEQS_FT<"s", FGR32, II_C_CC_S, MipsFPCmp>, CEQS_FM<16>,
ISA_MIPS1_NOT_32R6_64R6;		ISA_MIPS1_NOT_32R6_64R6;
def FCMP_D32 : MMRel, CEQS_FT<"d", AFGR64, II_C_CC_D, MipsFPCmp>, CEQS_FM<17>,		def FCMP_D32 : MMRel, CEQS_FT<"d", AFGR64, II_C_CC_D, MipsFPCmp>, CEQS_FM<17>,
ISA_MIPS1_NOT_32R6_64R6, AdditionalRequires<[NotFP64bit]>;		ISA_MIPS1_NOT_32R6_64R6, AdditionalRequires<[NotFP64bit]>;
let DecoderNamespace = "Mips64" in		let DecoderNamespace = "Mips64" in
def FCMP_D64 : CEQS_FT<"d", FGR64, II_C_CC_D, MipsFPCmp>, CEQS_FM<17>,		def FCMP_D64 : CEQS_FT<"d", FGR64, II_C_CC_D, MipsFPCmp>, CEQS_FM<17>,
ISA_MIPS1_NOT_32R6_64R6, AdditionalRequires<[IsFP64bit]>;		ISA_MIPS1_NOT_32R6_64R6, AdditionalRequires<[IsFP64bit]>;
▲ Show 20 Lines • Show All 94 Lines • Show Last 20 Lines