[X86] Add x, t and g modifiers for inline asm

[Amanieu]

Summary

This patch adds the x, t and g modifiers for inline asm from GCC. These will print a vector register as xmm*, ymm* or zmm* respectively.

I also fixed register names with modifiers with inteldialect so they are no longer printed with a leading %.

[craig.topper]

Are these documented somewhere for gcc? I don't see them in the operand modifiers here https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html

[Amanieu]

They are not mentioned in the GCC documentation, but are documented in this comment in the GCC code:

If CODE is 'x', pretend the mode is V4SFmode.
If CODE is 't', pretend the mode is V8SFmode.
If CODE is 'g', pretend the mode is V16SFmode.

We need these modifiers for the new inline assembly support in Rust.

[Amanieu]

clang-format

[craig.topper]

Thanks for the gcc link. How do they expect people to know they exist if they aren't documented?

Anyway this patch, LGTM

[Amanieu]

I don't have commit access, could you commit this for me?

llvm/lib/Target/X86/X86AsmPrinter.cpp

if (!DispSpec.isImm()) {
     }
   }
   O << ']';
 }
 
 static bool printAsmMRegister(X86AsmPrinter &P, const MachineOperand &MO,
                               char Mode, raw_ostream &O) {
   Register Reg = MO.getReg();
-  bool EmitPercent = true;
+  bool EmitPercent = MO.getParent()->getInlineAsmDialect() == InlineAsm::AD_ATT;
 
   if (!X86::GR8RegClass.contains(Reg) &&
       !X86::GR16RegClass.contains(Reg) &&
       !X86::GR32RegClass.contains(Reg) &&
       !X86::GR64RegClass.contains(Reg))
     return true;
 
   switch (Mode) {
static bool printAsmMRegister(X86AsmPrinter &P, const MachineOperand &MO,
 
   if (EmitPercent)
     O << '%';
 
   O << X86ATTInstPrinter::getRegisterName(Reg);
   return false;
 }
 
+static bool printAsmVRegister(X86AsmPrinter &P, const MachineOperand &MO,
+                              char Mode, raw_ostream &O) {
+  unsigned Reg = MO.getReg();
+  bool EmitPercent = MO.getParent()->getInlineAsmDialect() == InlineAsm::AD_ATT;
+
+  unsigned Index;
+  if (X86::VR128XRegClass.contains(Reg))
+    Index = Reg - X86::XMM0;
+  else if (X86::VR256XRegClass.contains(Reg))
+    Index = Reg - X86::YMM0;
+  else if (X86::VR512RegClass.contains(Reg))
+    Index = Reg - X86::ZMM0;
+  else
+    return true;
+
+  switch (Mode) {
+  default: // Unknown mode.
+    return true;
+  case 'x': // Print V4SFmode register
+    Reg = X86::XMM0 + Index;
+    break;
+  case 't': // Print V8SFmode register
+    Reg = X86::YMM0 + Index;
+    break;
+  case 'g': // Print V16SFmode register
+    Reg = X86::ZMM0 + Index;
+    break;
+  }
+
+  if (EmitPercent)
+    O << '%';
+
+  O << X86ATTInstPrinter::getRegisterName(Reg);
+  return false;
+}
+
 /// PrintAsmOperand - Print out an operand for an inline asm expression.
 ///
 bool X86AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
                                     const char *ExtraCode, raw_ostream &O) {
   // Does this asm operand have a single letter operand modifier?
   if (ExtraCode && ExtraCode[0]) {
     if (ExtraCode[1] != 0) return true; // Unknown modifier.
 
if (ExtraCode && ExtraCode[0]) {
     case 'k': // Print SImode register
     case 'q': // Print DImode register
     case 'V': // Print native register without '%'
       if (MO.isReg())
         return printAsmMRegister(*this, MO, ExtraCode[0], O);
       PrintOperand(MI, OpNo, O);
       return false;
 
+    case 'x': // Print V4SFmode register
+    case 't': // Print V8SFmode register
+    case 'g': // Print V16SFmode register
+      if (MO.isReg())
+        return printAsmVRegister(*this, MO, ExtraCode[0], O);
+      PrintOperand(MI, OpNo, O);
+      return false;
+
     case 'P': // This is the operand of a call, treat specially.
       PrintPCRelImm(MI, OpNo, O);
       return false;
 
     case 'n': // Negate the immediate or print a '-' before the operand.
       // Note: this is a temporary solution. It should be handled target
       // independently as part of the 'MC' work.
       if (MO.isImm()) {

llvm/test/CodeGen/X86/asm-modifier2.ll

+; RUN: llc < %s | FileCheck %s
+
+define void @test1() {
+; CHECK-LABEL: test1:
+; CHECK: vmovaps %xmm0, %xmm0
+; CHECK: vmovaps %ymm0, %ymm0
+; CHECK: vmovaps %zmm0, %zmm0
+  tail call void asm sideeffect "vmovaps ${0:x}, ${0:x}", "{xmm0},~{dirflag},~{fpsr},~{flags}"(i32 0)
+  tail call void asm sideeffect "vmovaps ${0:t}, ${0:t}", "{xmm0},~{dirflag},~{fpsr},~{flags}"(i32 0)
+  tail call void asm sideeffect "vmovaps ${0:g}, ${0:g}", "{xmm0},~{dirflag},~{fpsr},~{flags}"(i32 0)
+  ret void
+}
+
+define void @test2() {
+; CHECK-LABEL: test2:
+; CHECK: vmovaps %xmm0, %xmm0
+; CHECK: vmovaps %ymm0, %ymm0
+; CHECK: vmovaps %zmm0, %zmm0
+  tail call void asm sideeffect inteldialect "vmovaps ${0:x}, ${0:x}", "{xmm0},~{dirflag},~{fpsr},~{flags}"(i32 0)
+  tail call void asm sideeffect inteldialect "vmovaps ${0:t}, ${0:t}", "{xmm0},~{dirflag},~{fpsr},~{flags}"(i32 0)
+  tail call void asm sideeffect inteldialect "vmovaps ${0:g}, ${0:g}", "{xmm0},~{dirflag},~{fpsr},~{flags}"(i32 0)
+  ret void
+}
+
+define void @test3() {
+; CHECK-LABEL: test3:
+; CHECK: movb %al, %al
+; CHECK: movb %ah, %ah
+; CHECK: movw %ax, %ax
+; CHECK: movl %eax, %eax
+; CHECK: movq %rax, %rax
+  tail call void asm sideeffect "mov ${0:b}, ${0:b}", "{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
+  tail call void asm sideeffect "mov ${0:h}, ${0:h}", "{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
+  tail call void asm sideeffect "mov ${0:w}, ${0:w}", "{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
+  tail call void asm sideeffect "mov ${0:k}, ${0:k}", "{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
+  tail call void asm sideeffect "mov ${0:q}, ${0:q}", "{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
+  ret void
+}
+
+define void @test4() {
+; CHECK-LABEL: test4:
+; CHECK: movb %al, %al
+; CHECK: movb %ah, %ah
+; CHECK: movw %ax, %ax
+; CHECK: movl %eax, %eax
+; CHECK: movq %rax, %rax
+  tail call void asm sideeffect inteldialect "mov ${0:b}, ${0:b}", "{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
+  tail call void asm sideeffect inteldialect "mov ${0:h}, ${0:h}", "{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
+  tail call void asm sideeffect inteldialect "mov ${0:w}, ${0:w}", "{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
+  tail call void asm sideeffect inteldialect "mov ${0:k}, ${0:k}", "{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
+  tail call void asm sideeffect inteldialect "mov ${0:q}, ${0:q}", "{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
+  ret void
+}

llvm/test/CodeGen/X86/inline-asm-bad-modifier.ll

 ; RUN: not llc -mtriple=x86_64-- < %s 2>&1 | FileCheck %s
 
-;CHECK: error: invalid operand in inline asm: 'vmovd ${1:x}, $0'
+;CHECK: error: invalid operand in inline asm: 'vmovd ${1:k}, $0'
 define i32 @foo() {
 entry:
-  %0 = tail call i32 asm sideeffect "vmovd ${1:x}, $0", "=r,x,~{dirflag},~{fpsr},~{flags}"(<2 x i64> <i64 240518168632, i64 240518168632>)
+  %0 = tail call i32 asm sideeffect "vmovd ${1:k}, $0", "=r,x,~{dirflag},~{fpsr},~{flags}"(<2 x i64> <i64 240518168632, i64 240518168632>)
   ret i32 %0
 }