[LoopVectorize][TTI] Add an isLegalMaskedLoadStore method. NFC

[dmgreen]

Summary

As with isLegalGatherScatter added in D71919, this adds a isLegalMaskedLoadStore method to TTI to remove the need for a similar functionality in the vectorizer.

[Ayal]

Thanks!

llvm/lib/Transforms/Vectorize/LoopVectorize.cpp

4582

(Can use the conventional prefix: [Is]LegalLoadStore, [Is]LegalGatherScatter; or inline everything into the return.)

llvm/include/llvm/Analysis/TargetTransformInfo.h

public:
   bool isLegalMaskedGather(Type *DataType, MaybeAlign Alignment) const;
 
   /// Return true if the target supports masked compress store.
   bool isLegalMaskedCompressStore(Type *DataType) const;
   /// Return true if the target supports masked expand load.
   bool isLegalMaskedExpandLoad(Type *DataType) const;
 
   /// Returns true if the target machine can represent a vectorized version
+  /// of \p V as a masked load or store operation. This assumes that the memory
+  /// is contiguous.
+  bool isLegalMaskedLoadStore(Value *V) const;
+  /// Returns true if the target machine can represent a vectorized version
   /// of \p V as a masked gather or scatter operation.
   bool isLegalGatherOrScatter(Value *V) const;
 
   /// Return true if the target has a unified operation to calculate division
   /// and remainder. If so, the additional implicit multiplication and
   /// subtraction required to calculate a remainder from division are free. This
   /// can enable more aggressive transformations for division and remainder than
   /// would typically be allowed using throughput or size cost models.

llvm/lib/Analysis/TargetTransformInfo.cpp

 bool TargetTransformInfo::isLegalMaskedCompressStore(Type *DataType) const {
   return TTIImpl->isLegalMaskedCompressStore(DataType);
 }
 
 bool TargetTransformInfo::isLegalMaskedExpandLoad(Type *DataType) const {
   return TTIImpl->isLegalMaskedExpandLoad(DataType);
 }
 
+bool TargetTransformInfo::isLegalMaskedLoadStore(Value *V) const {
+  LoadInst *LI = dyn_cast<LoadInst>(V);
+  StoreInst *SI = dyn_cast<StoreInst>(V);
+  if (!LI && !SI)
+    return false;
+  Type *Ty = LI ? LI->getType() : SI->getValueOperand()->getType();
+  MaybeAlign Align = getLoadStoreAlignment(V);
+  return (LI && isLegalMaskedLoad(Ty, Align)) ||
+         (SI && isLegalMaskedStore(Ty, Align));
+}
+
 bool TargetTransformInfo::isLegalGatherOrScatter(Value *V) const {
   LoadInst *LI = dyn_cast<LoadInst>(V);
   StoreInst *SI = dyn_cast<StoreInst>(V);
   if (!LI && !SI)
     return false;
   Type *Ty = LI ? LI->getType() : SI->getValueOperand()->getType();
   MaybeAlign Align = getLoadStoreAlignment(V);
   return (LI && isLegalMaskedGather(Ty, Align)) ||
-          (SI && isLegalMaskedScatter(Ty, Align));
 }
 
 bool TargetTransformInfo::hasDivRemOp(Type *DataType, bool IsSigned) const {
   return TTIImpl->hasDivRemOp(DataType, IsSigned);
 }
 
 bool TargetTransformInfo::hasVolatileVariant(Instruction *I,
                                              unsigned AddrSpace) const {

llvm/lib/Transforms/Vectorize/LoopVectorize.cpp

void collectUniformsAndScalars(unsigned VF) {
     // Do the analysis once.
     if (VF == 1 || Uniforms.find(VF) != Uniforms.end())
       return;
     setCostBasedWideningDecision(VF);
     collectLoopUniforms(VF);
     collectLoopScalars(VF);
   }
 
-  /// Returns true if the target machine supports masked store operation
-  /// for the given \p DataType and kind of access to \p Ptr.
-  bool isLegalMaskedStore(Type *DataType, Value *Ptr, MaybeAlign Alignment) {
-    return Legal->isConsecutivePtr(Ptr) &&
-           TTI.isLegalMaskedStore(DataType, Alignment);
-  }
-
-  /// Returns true if the target machine supports masked load operation
-  /// for the given \p DataType and kind of access to \p Ptr.
-  bool isLegalMaskedLoad(Type *DataType, Value *Ptr, MaybeAlign Alignment) {
-    return Legal->isConsecutivePtr(Ptr) &&
-           TTI.isLegalMaskedLoad(DataType, Alignment);
-  }
-
   /// Returns true if \p I is an instruction that will be scalarized with
   /// predication. Such instructions include conditional stores and
   /// instructions that may divide by zero.
   /// If a non-zero VF has been calculated, we check if I will be scalarized
   /// predication for that VF.
   bool isScalarWithPredication(Instruction *I, unsigned VF = 1);
 
   // Returns true if \p I is an instruction that will be predicated either
bool LoopVectorizationCostModel::isScalarWithPredication(Instruction *I, unsigned VF) {
   switch(I->getOpcode()) {
   default:
     break;
   case Instruction::Load:
   case Instruction::Store: {
     if (!Legal->isMaskRequired(I))
       return false;
     auto *Ptr = getLoadStorePointerOperand(I);
-    auto *Ty = getMemInstValueType(I);
     // We have already decided how to vectorize this instruction, get that
     // result.
     if (VF > 1) {
       InstWidening WideningDecision = getWideningDecision(I, VF);
       assert(WideningDecision != CM_Unknown &&
              "Widening decision should be ready at this moment");
       return WideningDecision == CM_Scalarize;
     }
-    const MaybeAlign Alignment = getLoadStoreAlignment(I);
-    bool LegalGather = TTI.isLegalGatherOrScatter(I);
-    return !(LegalGather || isa<LoadInst>(I)
-                 ? isLegalMaskedLoad(Ty, Ptr, Alignment)
-                 : isLegalMaskedStore(Ty, Ptr, Alignment));
+    bool LegalLoadStore =
+        Legal->isConsecutivePtr(Ptr) && TTI.isLegalMaskedLoadStore(I);
+    bool LegalGatherScatter = TTI.isLegalGatherOrScatter(I);
+    return !(LegalLoadStore || LegalGatherScatter);
   }
   case Instruction::UDiv:
   case Instruction::SDiv:
   case Instruction::SRem:
   case Instruction::URem:
     return mayDivideByZero(*I);
   }
   return false;
if (!PredicatedAccessRequiresMasking && !AccessWithGapsRequiresMasking)
     return true;
 
   // If masked interleaving is required, we expect that the user/target had
   // enabled it, because otherwise it either wouldn't have been created or
   // it should have been invalidated by the CostModel.
   assert(useMaskedInterleavedAccesses(TTI) &&
          "Masked interleave-groups for predicated accesses are not enabled.");
 
-  auto *Ty = getMemInstValueType(I);
-  const MaybeAlign Alignment = getLoadStoreAlignment(I);
-  return isa<LoadInst>(I) ? TTI.isLegalMaskedLoad(Ty, Alignment)
-                          : TTI.isLegalMaskedStore(Ty, Alignment);
+  return TTI.isLegalMaskedLoadStore(I);
 }
 
 bool LoopVectorizationCostModel::memoryInstructionCanBeWidened(Instruction *I,
                                                                unsigned VF) {
   // Get and ensure we have a valid memory instruction.
   LoadInst *LI = dyn_cast<LoadInst>(I);
   StoreInst *SI = dyn_cast<StoreInst>(I);
   assert((LI || SI) && "Invalid memory instruction");