[mips] Add __clear_cache() definition for non-Android systems

[petarj]

Summary

Make sure clear_cache() builtin has an appropriate definition for Linux.
Call syscall(NR_cacheflush, ...).

[petarj]

OK to commit?

lib/builtins/clear_cache.c

#if defined(__FreeBSD__) && defined(__arm__)
   #include <sys/types.h>
   #include <machine/sysarch.h>
 #endif
 
 #if defined(__NetBSD__) && defined(__arm__)
   #include <machine/sysarch.h>
 #endif
 
-#if defined(__ANDROID__) && defined(__mips__)
+#if defined(__mips__)
   #include <sys/cachectl.h>
   #include <sys/syscall.h>
-  #ifdef __LP64__
+  #if defined(__ANDROID__) && defined(__LP64__)
     /*
      * clear_mips_cache - Invalidates instruction cache for Mips.
      */
     static void clear_mips_cache(const void* Addr, size_t Size) {
       asm volatile (
         ".set push\n"
         ".set noreorder\n"
         ".set noat\n"
#elif defined(__ANDROID__)
         __asm __volatile("svc 0x0" : "=r"(start_reg)
             : "r"(syscall_nr), "r"(start_reg), "r"(end_reg), "r"(flags) : "r0");
          if (start_reg != 0) {
              compilerrt_abort();
          }
     #else
         compilerrt_abort();
     #endif
-#elif defined(__ANDROID__) && defined(__mips__)
+#elif defined(__mips__)
   const uintptr_t start_int = (uintptr_t) start;
   const uintptr_t end_int = (uintptr_t) end;
-    #ifdef __LP64__
+    #if defined(__ANDROID__) && defined(__LP64__)
         // Call synci implementation for short address range.
         const uintptr_t address_range_limit = 256;
         if ((end_int - start_int) <= address_range_limit) {
             clear_mips_cache(start, (end_int - start_int));
         } else {
             syscall(__NR_cacheflush, start, (end_int - start_int), BCACHE);
         }
     #else