[X86] Only look up boolean reduction cost tables if the reduction is not pairwise.

[craig.topper]

Summary

We don't pattern match pairwise shuffles in SelectionDAG. So we
should only return the optimized costs if its not a pairwise
shuffle.

I think SLP vectorizer gives priority to non pairwise shuffle if
the cost is the same. And the look up for reduction intrinsics
passes false for the pairwise flag. I didn't check the loop
vectorizer.

[RKSimon]

LGTM by inspection

llvm/lib/Target/X86/X86TargetTransformInfo.cpp

static const CostTblEntry SSE2BoolReduction[] = {
     { ISD::AND,  MVT::v16i8,   2 }, // pmovmskb + cmp
     { ISD::OR,   MVT::v2i64,   2 }, // movmskpd + cmp
     { ISD::OR,   MVT::v4i32,   2 }, // movmskps + cmp
     { ISD::OR,   MVT::v8i16,   2 }, // pmovmskb + cmp
     { ISD::OR,   MVT::v16i8,   2 }, // pmovmskb + cmp
   };
 
   // Handle bool allof/anyof patterns.
-  if (ValTy->getVectorElementType()->isIntegerTy(1)) {
+  if (!IsPairwise && ValTy->getVectorElementType()->isIntegerTy(1)) {
     if (ST->hasAVX2())
       if (const auto *Entry = CostTableLookup(AVX2BoolReduction, ISD, MTy))
         return LT.first * Entry->Cost;
     if (ST->hasAVX())
       if (const auto *Entry = CostTableLookup(AVX1BoolReduction, ISD, MTy))
         return LT.first * Entry->Cost;
     if (ST->hasSSE2())
       if (const auto *Entry = CostTableLookup(SSE2BoolReduction, ISD, MTy))