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[X86][SSE] Improve bool vector extload (PR26091)
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Authored by RKSimon on May 25 2019, 9:47 AM.

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Summary

We already have good codegen for (vXiY *ext(vXi1 bitcast(iX))) cases, this patch uses it for ext-loads of vXi1 types as well - changing the load into a iX integer load, and bitcasting+extending so that combineToExtendBoolVectorInReg can then use it.

What's curious is how much we're using MOVD (VMOVDI2PDIrm) scalar_to_vector loads directly for smaller (<i32) memory sources - I don't THINK this is something I've introduced but its something that looks potentially concerning - @craig.topper any ideas?

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RKSimon created this revision.May 25 2019, 9:47 AM
Herald added a project: Restricted Project. · View Herald TranscriptMay 25 2019, 9:47 AM

Are the loads where we're using movd directly, are the loads being considered at least 4 byte aligned? That would trigger the loadi32 PatFrag to match an EXTLOAD

craig.topper added inline comments.May 26 2019, 10:22 PM
lib/Target/X86/X86ISelLowering.cpp
38850 ↗(On Diff #201408)

I think we need to limit to BeforeLegalize in order to be able to use MemVT here?

RKSimon updated this revision to Diff 201872.May 29 2019, 5:27 AM

Only perform this as DCI.BeforeLegalize()

This revision is now accepted and ready to land.May 29 2019, 3:35 PM
This revision was automatically updated to reflect the committed changes.
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp