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Differential D60688

[InstCombine] add failing tests of missed optimizations of fshl/fshr
ClosedPublic

Authored by shawnl on Apr 15 2019, 5:11 AM.

Details

Reviewers
lebedev.ri
nikic
Commits
rGf700081a7d97: [InstCombine] Add tests for fshl/fshr with masked operands; NFC
rL358514: [InstCombine] Add tests for fshl/fshr with masked operands; NFC
Summary

We are not checking if the first and second operands are masked.

patch is D60660

Diff Detail

Repository
rL LLVM

Event Timeline

shawnl created this revision.Apr 15 2019, 5:11 AM
Herald added a project: Restricted Project. · View Herald TranscriptApr 15 2019, 5:11 AM
Herald added a subscriber: llvm-commits. · View Herald Transcript
shawnl mentioned this in D60660: [InstCombine] Prune fshl/fshr with masked operands.Apr 15 2019, 5:36 AM
nikic added a subscriber: nikic.Apr 15 2019, 6:07 AM
nikic added inline comments.
test/Transforms/InstCombine/fsh.ll
591

nit: args_different probably here?

625

nit: different

nikic accepted this revision.Apr 16 2019, 11:57 AM

LG modulo nits.

This revision is now accepted and ready to land.Apr 16 2019, 11:57 AM
Closed by commit rL358514: [InstCombine] Add tests for fshl/fshr with masked operands; NFC (authored by nikic). · Explain WhyApr 16 2019, 12:08 PM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
test/
Transforms/
InstCombine/
76 lines

Diff 195138

test/Transforms/InstCombine/fsh.ll

Show First 20 Lines • Show All 91 Lines • ▼ Show 20 Lines
define i16 @fshr_bswap(i16 %x) { define i16 @fshr_bswap(i16 %x) {
; CHECK-LABEL: @fshr_bswap( ; CHECK-LABEL: @fshr_bswap(
; CHECK-NEXT: [[R:%.*]] = call i16 @llvm.fshl.i16(i16 [[X:%.*]], i16 [[X]], i16 8) ; CHECK-NEXT: [[R:%.*]] = call i16 @llvm.fshl.i16(i16 [[X:%.*]], i16 [[X]], i16 8)
; CHECK-NEXT: ret i16 [[R]] ; CHECK-NEXT: ret i16 [[R]]
; ;
%r = call i16 @llvm.fshr.i16(i16 %x, i16 %x, i16 8) %r = call i16 @llvm.fshr.i16(i16 %x, i16 %x, i16 8)
ret i16 %r ret i16 %r
} }
define i32 @fshl_mask_args_same1(i32 %a) {
; CHECK-LABEL: @fshl_mask_args_same1(
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], -65536
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.fshl.i32(i32 [[TMP1]], i32 [[TMP1]], i32 16)
; CHECK-NEXT: ret i32 [[TMP2]]
;
%tmp1 = and i32 %a, 4294901760 ; 0xffff0000
%tmp2 = call i32 @llvm.fshl.i32(i32 %tmp1, i32 %tmp1, i32 16)
ret i32 %tmp2
}
define i32 @fshl_mask_args_same2(i32 %a) {
; CHECK-LABEL: @fshl_mask_args_same2(
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], 255
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.fshl.i32(i32 [[TMP1]], i32 [[TMP1]], i32 8)
; CHECK-NEXT: ret i32 [[TMP2]]
;
%tmp1 = and i32 %a, 255
%tmp2 = call i32 @llvm.fshl.i32(i32 %tmp1, i32 %tmp1, i32 8)
ret i32 %tmp2
}
define i32 @fshl_mask_args_same_3(i32 %a) {
; CHECK-LABEL: @fshl_mask_args_same_3(
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], 255
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.fshl.i32(i32 [[TMP1]], i32 [[TMP1]], i32 24)
; CHECK-NEXT: ret i32 [[TMP2]]
;
%tmp1 = and i32 %a, 255
%tmp2 = call i32 @llvm.fshl.i32(i32 %tmp1, i32 %tmp1, i32 24)
ret i32 %tmp2
}
define i32 @fshl_mask_args_same5(i32 %a) {
nikicUnsubmitted
Not Done
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nit: args_different probably here?

nikic: nit: args_different probably here?
; CHECK-LABEL: @fshl_mask_args_same5(
; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[A:%.*]], -65536
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A]], -16777216
; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.fshl.i32(i32 [[TMP2]], i32 [[TMP1]], i32 17)
; CHECK-NEXT: ret i32 [[TMP3]]
;
%tmp2 = and i32 %a, 4294901760 ; 0xfffff00f
%tmp1 = and i32 %a, 4278190080 ; 0xff00f00f
%tmp3 = call i32 @llvm.fshl.i32(i32 %tmp2, i32 %tmp1, i32 17)
ret i32 %tmp3
}
define <2 x i31> @fshr_mask_args_same_vector(<2 x i31> %a) {
; CHECK-LABEL: @fshr_mask_args_same_vector(
; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i31> [[A:%.*]], <i31 1000, i31 1000>
; CHECK-NEXT: [[TMP3:%.*]] = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> [[A]], <2 x i31> [[TMP1]], <2 x i31> <i31 10, i31 10>)
; CHECK-NEXT: ret <2 x i31> [[TMP3]]
;
%tmp1 = and <2 x i31> %a, <i31 1000, i31 1000>
%tmp2 = and <2 x i31> %a, <i31 6442450943, i31 6442450943>
%tmp3 = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %tmp2, <2 x i31> %tmp1, <2 x i31> <i31 10, i31 10>)
ret <2 x i31> %tmp3
}
define <2 x i32> @fshr_mask_args_same_vector2(<2 x i32> %a, <2 x i32> %b) {
; CHECK-LABEL: @fshr_mask_args_same_vector2(
; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[A:%.*]], <i32 1000000, i32 100000>
; CHECK-NEXT: [[TMP3:%.*]] = call <2 x i32> @llvm.fshl.v2i32(<2 x i32> [[TMP1]], <2 x i32> [[TMP1]], <2 x i32> <i32 29, i32 29>)
; CHECK-NEXT: ret <2 x i32> [[TMP3]]
;
%tmp1 = and <2 x i32> %a, <i32 1000000, i32 100000>
%tmp2 = and <2 x i32> %a, <i32 6442450943, i32 6442450943>
%tmp3 = call <2 x i32> @llvm.fshr.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> <i32 3, i32 3>)
ret <2 x i32> %tmp3
}
define <2 x i31> @fshr_mask_args_same_vector3_differnt_but_still_prunable(<2 x i31> %a) {
nikicUnsubmitted
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nit: different

nikic: nit: different
; CHECK-LABEL: @fshr_mask_args_same_vector3_differnt_but_still_prunable(
; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i31> [[A:%.*]], <i31 1000, i31 1000>
; CHECK-NEXT: [[TMP3:%.*]] = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> [[A]], <2 x i31> [[TMP1]], <2 x i31> <i31 10, i31 3>)
; CHECK-NEXT: ret <2 x i31> [[TMP3]]
;
%tmp1 = and <2 x i31> %a, <i31 1000, i31 1000>
%tmp2 = and <2 x i31> %a, <i31 6442450943, i31 6442450943>
%tmp3 = call <2 x i31> @llvm.fshl.v2i31(<2 x i31> %tmp2, <2 x i31> %tmp1, <2 x i31> <i31 10, i31 3>)
ret <2 x i31> %tmp3
}
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