For 8-bit divrems where the remainder is used, we used to generate:
divb %sil shrw $8, %ax movzbl %al, %eax
That was to avoid an H-reg access, which is problematic mainly because
it isn't possible in REX-prefixed instructions.
This patch optimizes that to:
divb %sil movzbl %ah, %eax
To do that, we explicitly extend AH, and extract the L-subreg in the
resulting register. The extension is done using the NOREX variants of
MOVZX. To support signed operations, MOVSX_NOREX is also added.
Further, this introduces a new SDNode type, [us]divrem_ext_hreg, which is
then lowered to a sequence containing a single zext (rather than 2).
The new node isn't ideal, but I'm not aware of any alternatives to avoid redundant extensions.
You slightly change the condition here by removing Subtarget->is64Bit().
I believe this is correct, but you need to add a test case for that.