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[Option B] Create explicit ordered/unordered reduction intrinsics for fadd/fmul.
AbandonedPublic

Authored by sdesmalen on Apr 4 2019, 5:49 AM.

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Summary
NOTE: This is currently only a proposal as referenced in an RFC on llvm-dev mailing list.

This patch creates explicit ordered and unordered reduction intrinsics for
fadd and fmul and adds functionality to auto-upgrade existing LLVM IR
and bitcode to use the new intrinsics.

    
llvm.experimental.vector.reduce.fadd -> llvm.experimental.vector.reduce.ordered.fadd

fast llvm.experimental.vector.reduce.fadd -> llvm.experimental.vector.reduce.unordered.fadd

    
llvm.experimental.vector.reduce.fmul -> llvm.experimental.vector.reduce.ordered.fmul

fast llvm.experimental.vector.reduce.fmul -> llvm.experimental.vector.reduce.unordered.fmul

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Event Timeline

sdesmalen created this revision.Apr 4 2019, 5:49 AM
simoll added a subscriber: simoll.Apr 7 2019, 9:56 PM
sdesmalen abandoned this revision.Jun 7 2019, 1:16 AM

Abandoning this revision to move ahead with D60261 instead.