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[AArch64] Add v8.5-a Memory Tagging STZGM instruction
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Authored by DavidSpickett on Apr 1 2019, 6:44 AM.

Details

Summary

This instruction writes a block of allocation tags
and stores zero to the associated data locations.

It differs from STGM by 1 bit and has the same
arguments.

The specification can be found here:
https://developer.arm.com/docs/ddi0596/c

Diff Detail

Repository
rL LLVM

Event Timeline

DavidSpickett created this revision.Apr 1 2019, 6:44 AM
javed.absar accepted this revision.Apr 1 2019, 7:23 AM
This revision is now accepted and ready to land.Apr 1 2019, 7:23 AM
This revision was automatically updated to reflect the committed changes.