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Differential D59992

[SLP] Add support for commutative icmp/fcmp predicates
ClosedPublic

Authored by RKSimon on Mar 29 2019, 6:56 AM.

Details

Reviewers
ABataev
dtemirbulatov
vporpo
Commits
rG6a75c36ea9bd: [SLP] Add support for commutative icmp/fcmp predicates
rL357266: [SLP] Add support for commutative icmp/fcmp predicates
Summary

For the cases where the icmp/fcmp predicate is commutative, use reorderInputsAccordingToOpcode to collect and commute the operands.

This requires a helper to recognise commutativity in both general Instruction and CmpInstr types - the CmpInst::isCommutative doesn't overload the Instruction::isCommutative method for reasons I'm not clear on (maybe because its based on predicate not opcode?!?).

If at all possible I'd like to get this in before the D57059/D59973 refactors.

Diff Detail

Repository
rL LLVM

Event Timeline

RKSimon created this revision.Mar 29 2019, 6:56 AM
Herald added a project: Restricted Project. · View Herald TranscriptMar 29 2019, 6:56 AM
dtemirbulatov accepted this revision.Mar 29 2019, 8:08 AM

LGTM.

This revision is now accepted and ready to land.Mar 29 2019, 8:08 AM
Closed by commit rL357266: [SLP] Add support for commutative icmp/fcmp predicates (authored by RKSimon). · Explain WhyMar 29 2019, 8:28 AM
This revision was automatically updated to reflect the committed changes.
vporpo mentioned this in D59973: [SLP] Refactoring of the operand reordering code..Mar 29 2019, 8:04 PM

Revision Contents

PathSize
llvm/
trunk/
lib/
Transforms/
Vectorize/
42 lines
test/
Transforms/
SLPVectorizer/
X86/
96 lines

Diff 192833

llvm/trunk/lib/Transforms/Vectorize/SLPVectorizer.cpp

Show First 20 Lines • Show All 200 Lines • ▼ Show 20 Lines
/// \returns True if all of the values in \p VL are identical. /// \returns True if all of the values in \p VL are identical.
static bool isSplat(ArrayRef<Value *> VL) { static bool isSplat(ArrayRef<Value *> VL) {
for (unsigned i = 1, e = VL.size(); i < e; ++i) for (unsigned i = 1, e = VL.size(); i < e; ++i)
if (VL[i] != VL[0]) if (VL[i] != VL[0])
return false; return false;
return true; return true;
} }
/// \returns True if \p I is commutative, handles CmpInst as well as Instruction.
static bool isCommutative(Instruction *I) {
if (auto *IC = dyn_cast<CmpInst>(I))
return IC->isCommutative();
return I->isCommutative();
}
/// Checks if the vector of instructions can be represented as a shuffle, like: /// Checks if the vector of instructions can be represented as a shuffle, like:
/// %x0 = extractelement <4 x i8> %x, i32 0 /// %x0 = extractelement <4 x i8> %x, i32 0
/// %x3 = extractelement <4 x i8> %x, i32 3 /// %x3 = extractelement <4 x i8> %x, i32 3
/// %y1 = extractelement <4 x i8> %y, i32 1 /// %y1 = extractelement <4 x i8> %y, i32 1
/// %y2 = extractelement <4 x i8> %y, i32 2 /// %y2 = extractelement <4 x i8> %y, i32 2
/// %x0x0 = mul i8 %x0, %x0 /// %x0x0 = mul i8 %x0, %x0
/// %x3x3 = mul i8 %x3, %x3 /// %x3x3 = mul i8 %x3, %x3
/// %y1y1 = mul i8 %y1, %y1 /// %y1y1 = mul i8 %y1, %y1
▲ Show 20 Lines • Show All 1,632 Lines • ▼ Show 20 Lines case Instruction::FCmp: {
<< "SLP: Gathering cmp with different predicate.\n"); << "SLP: Gathering cmp with different predicate.\n");
return; return;
} }
} }
newTreeEntry(VL, true, UserTreeIdx, ReuseShuffleIndicies); newTreeEntry(VL, true, UserTreeIdx, ReuseShuffleIndicies);
LLVM_DEBUG(dbgs() << "SLP: added a vector of compares.\n"); LLVM_DEBUG(dbgs() << "SLP: added a vector of compares.\n");
// Collect operands - commute if it uses the swapped predicate.
ValueList Left, Right; ValueList Left, Right;
if (cast<CmpInst>(VL0)->isCommutative()) {
// Commutative predicate - collect + sort operands of the instructions
// so that each side is more likely to have the same opcode.
assert(P0 == SwapP0 && "Commutative Predicate mismatch");
reorderInputsAccordingToOpcode(S, VL, Left, Right);
} else {
// Collect operands - commute if it uses the swapped predicate.
for (Value *V : VL) { for (Value *V : VL) {
auto *Cmp = cast<CmpInst>(V); auto *Cmp = cast<CmpInst>(V);
Value *LHS = Cmp->getOperand(0); Value *LHS = Cmp->getOperand(0);
Value *RHS = Cmp->getOperand(1); Value *RHS = Cmp->getOperand(1);
if (Cmp->getPredicate() != P0) if (Cmp->getPredicate() != P0)
std::swap(LHS, RHS); std::swap(LHS, RHS);
Left.push_back(LHS); Left.push_back(LHS);
Right.push_back(RHS); Right.push_back(RHS);
} }
}
UserTreeIdx.EdgeIdx = 0; UserTreeIdx.EdgeIdx = 0;
buildTree_rec(Left, Depth + 1, UserTreeIdx); buildTree_rec(Left, Depth + 1, UserTreeIdx);
UserTreeIdx.EdgeIdx = 1; UserTreeIdx.EdgeIdx = 1;
buildTree_rec(Right, Depth + 1, UserTreeIdx); buildTree_rec(Right, Depth + 1, UserTreeIdx);
return; return;
} }
case Instruction::Select: case Instruction::Select:
▲ Show 20 Lines • Show All 1,003 Lines • ▼ Show 20 Linesvoid BoUpSLP::reorderInputsAccordingToOpcode(const InstructionsState &S,
// Keep track if we have one side with all the same value (broadcast). // Keep track if we have one side with all the same value (broadcast).
bool SplatLeft = true; bool SplatLeft = true;
bool SplatRight = true; bool SplatRight = true;
for (unsigned i = 1, e = VL.size(); i != e; ++i) { for (unsigned i = 1, e = VL.size(); i != e; ++i) {
Instruction *I = cast<Instruction>(VL[i]); Instruction *I = cast<Instruction>(VL[i]);
// Commute to favor either a splat or maximizing having the same opcodes on // Commute to favor either a splat or maximizing having the same opcodes on
// one side. // one side.
if (I->isCommutative() && if (isCommutative(I) &&
shouldReorderOperands(i, Left, Right, AllSameOpcodeLeft, shouldReorderOperands(i, Left, Right, AllSameOpcodeLeft,
AllSameOpcodeRight, SplatLeft, SplatRight)) AllSameOpcodeRight, SplatLeft, SplatRight))
std::swap(Left[i], Right[i]); std::swap(Left[i], Right[i]);
// Update Splat* and AllSameOpcode* after the insertion. // Update Splat* and AllSameOpcode* after the insertion.
SplatRight = SplatRight && (Right[i - 1] == Right[i]); SplatRight = SplatRight && (Right[i - 1] == Right[i]);
SplatLeft = SplatLeft && (Left[i - 1] == Left[i]); SplatLeft = SplatLeft && (Left[i - 1] == Left[i]);
AllSameOpcodeLeft = AllSameOpcodeLeft && isa<Instruction>(Left[i]) && AllSameOpcodeLeft = AllSameOpcodeLeft && isa<Instruction>(Left[i]) &&
Show All 24 Linesvoid BoUpSLP::reorderInputsAccordingToOpcode(const InstructionsState &S,
// b[2] load b[2] // b[2] load b[2]
// add a[3],c[3] load b[3] // add a[3],c[3] load b[3]
for (unsigned j = 0, e = VL.size() - 1; j < e; ++j) { for (unsigned j = 0, e = VL.size() - 1; j < e; ++j) {
if (LoadInst *L = dyn_cast<LoadInst>(Left[j])) { if (LoadInst *L = dyn_cast<LoadInst>(Left[j])) {
if (LoadInst *L1 = dyn_cast<LoadInst>(Right[j + 1])) { if (LoadInst *L1 = dyn_cast<LoadInst>(Right[j + 1])) {
if (isConsecutiveAccess(L, L1, *DL, *SE)) { if (isConsecutiveAccess(L, L1, *DL, *SE)) {
auto *VL1 = cast<Instruction>(VL[j]); auto *VL1 = cast<Instruction>(VL[j]);
auto *VL2 = cast<Instruction>(VL[j + 1]); auto *VL2 = cast<Instruction>(VL[j + 1]);
if (VL2->isCommutative()) { if (isCommutative(VL2)) {
std::swap(Left[j + 1], Right[j + 1]); std::swap(Left[j + 1], Right[j + 1]);
continue; continue;
} }
if (VL1->isCommutative()) { if (isCommutative(VL1)) {
std::swap(Left[j], Right[j]); std::swap(Left[j], Right[j]);
continue; continue;
} }
} }
} }
} }
if (LoadInst *L = dyn_cast<LoadInst>(Right[j])) { if (LoadInst *L = dyn_cast<LoadInst>(Right[j])) {
if (LoadInst *L1 = dyn_cast<LoadInst>(Left[j + 1])) { if (LoadInst *L1 = dyn_cast<LoadInst>(Left[j + 1])) {
if (isConsecutiveAccess(L, L1, *DL, *SE)) { if (isConsecutiveAccess(L, L1, *DL, *SE)) {
auto *VL1 = cast<Instruction>(VL[j]); auto *VL1 = cast<Instruction>(VL[j]);
auto *VL2 = cast<Instruction>(VL[j + 1]); auto *VL2 = cast<Instruction>(VL[j + 1]);
if (VL2->isCommutative()) { if (isCommutative(VL2)) {
std::swap(Left[j + 1], Right[j + 1]); std::swap(Left[j + 1], Right[j + 1]);
continue; continue;
} }
if (VL1->isCommutative()) { if (isCommutative(VL1)) {
std::swap(Left[j], Right[j]); std::swap(Left[j], Right[j]);
continue; continue;
} }
} }
} }
} }
// else unchanged // else unchanged
} }
▲ Show 20 Lines • Show All 3,573 Lines • Show Last 20 Lines

llvm/trunk/test/Transforms/SLPVectorizer/X86/cmp_commute.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -slp-vectorizer -instcombine -S -mtriple=x86_64--- -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE ; RUN: opt < %s -slp-vectorizer -instcombine -S -mtriple=x86_64--- -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE
; RUN: opt < %s -slp-vectorizer -instcombine -S -mtriple=x86_64--- -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX ; RUN: opt < %s -slp-vectorizer -instcombine -S -mtriple=x86_64--- -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX
; ;
; Check that we can commute operands based on the predicate. ; Check that we can commute operands based on the predicate.
; ;
define <4 x i32> @icmp_eq_v4i32(<4 x i32> %a, i32* %b) { define <4 x i32> @icmp_eq_v4i32(<4 x i32> %a, i32* %b) {
; CHECK-LABEL: @icmp_eq_v4i32( ; CHECK-LABEL: @icmp_eq_v4i32(
; CHECK-NEXT: [[A0:%.*]] = extractelement <4 x i32> [[A:%.*]], i32 0 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[B:%.*]] to <4 x i32>*
; CHECK-NEXT: [[A1:%.*]] = extractelement <4 x i32> [[A]], i32 1 ; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4
; CHECK-NEXT: [[A2:%.*]] = extractelement <4 x i32> [[A]], i32 2 ; CHECK-NEXT: [[TMP3:%.*]] = icmp eq <4 x i32> [[TMP2]], [[A:%.*]]
; CHECK-NEXT: [[A3:%.*]] = extractelement <4 x i32> [[A]], i32 3 ; CHECK-NEXT: [[R:%.*]] = sext <4 x i1> [[TMP3]] to <4 x i32>
; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 1
; CHECK-NEXT: [[P2:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 2
; CHECK-NEXT: [[P3:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 3
; CHECK-NEXT: [[B0:%.*]] = load i32, i32* [[B]], align 4
; CHECK-NEXT: [[B1:%.*]] = load i32, i32* [[P1]], align 4
; CHECK-NEXT: [[B2:%.*]] = load i32, i32* [[P2]], align 4
; CHECK-NEXT: [[B3:%.*]] = load i32, i32* [[P3]], align 4
; CHECK-NEXT: [[C0:%.*]] = icmp eq i32 [[A0]], [[B0]]
; CHECK-NEXT: [[C1:%.*]] = icmp eq i32 [[B1]], [[A1]]
; CHECK-NEXT: [[C2:%.*]] = icmp eq i32 [[B2]], [[A2]]
; CHECK-NEXT: [[C3:%.*]] = icmp eq i32 [[A3]], [[B3]]
; CHECK-NEXT: [[D0:%.*]] = insertelement <4 x i1> undef, i1 [[C0]], i32 0
; CHECK-NEXT: [[D1:%.*]] = insertelement <4 x i1> [[D0]], i1 [[C1]], i32 1
; CHECK-NEXT: [[D2:%.*]] = insertelement <4 x i1> [[D1]], i1 [[C2]], i32 2
; CHECK-NEXT: [[D3:%.*]] = insertelement <4 x i1> [[D2]], i1 [[C3]], i32 3
; CHECK-NEXT: [[R:%.*]] = sext <4 x i1> [[D3]] to <4 x i32>
; CHECK-NEXT: ret <4 x i32> [[R]] ; CHECK-NEXT: ret <4 x i32> [[R]]
; ;
%a0 = extractelement <4 x i32> %a, i32 0 %a0 = extractelement <4 x i32> %a, i32 0
%a1 = extractelement <4 x i32> %a, i32 1 %a1 = extractelement <4 x i32> %a, i32 1
%a2 = extractelement <4 x i32> %a, i32 2 %a2 = extractelement <4 x i32> %a, i32 2
%a3 = extractelement <4 x i32> %a, i32 3 %a3 = extractelement <4 x i32> %a, i32 3
%p0 = getelementptr inbounds i32, i32* %b, i32 0 %p0 = getelementptr inbounds i32, i32* %b, i32 0
%p1 = getelementptr inbounds i32, i32* %b, i32 1 %p1 = getelementptr inbounds i32, i32* %b, i32 1
Show All 12 Lines;
%d2 = insertelement <4 x i1> %d1, i1 %c2, i32 2 %d2 = insertelement <4 x i1> %d1, i1 %c2, i32 2
%d3 = insertelement <4 x i1> %d2, i1 %c3, i32 3 %d3 = insertelement <4 x i1> %d2, i1 %c3, i32 3
%r = sext <4 x i1> %d3 to <4 x i32> %r = sext <4 x i1> %d3 to <4 x i32>
ret <4 x i32> %r ret <4 x i32> %r
} }
define <4 x i32> @icmp_ne_v4i32(<4 x i32> %a, i32* %b) { define <4 x i32> @icmp_ne_v4i32(<4 x i32> %a, i32* %b) {
; CHECK-LABEL: @icmp_ne_v4i32( ; CHECK-LABEL: @icmp_ne_v4i32(
; CHECK-NEXT: [[A0:%.*]] = extractelement <4 x i32> [[A:%.*]], i32 0 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[B:%.*]] to <4 x i32>*
; CHECK-NEXT: [[A1:%.*]] = extractelement <4 x i32> [[A]], i32 1 ; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4
; CHECK-NEXT: [[A2:%.*]] = extractelement <4 x i32> [[A]], i32 2 ; CHECK-NEXT: [[TMP3:%.*]] = icmp ne <4 x i32> [[TMP2]], [[A:%.*]]
; CHECK-NEXT: [[A3:%.*]] = extractelement <4 x i32> [[A]], i32 3 ; CHECK-NEXT: [[R:%.*]] = sext <4 x i1> [[TMP3]] to <4 x i32>
; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 1
; CHECK-NEXT: [[P2:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 2
; CHECK-NEXT: [[P3:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 3
; CHECK-NEXT: [[B0:%.*]] = load i32, i32* [[B]], align 4
; CHECK-NEXT: [[B1:%.*]] = load i32, i32* [[P1]], align 4
; CHECK-NEXT: [[B2:%.*]] = load i32, i32* [[P2]], align 4
; CHECK-NEXT: [[B3:%.*]] = load i32, i32* [[P3]], align 4
; CHECK-NEXT: [[C0:%.*]] = icmp ne i32 [[A0]], [[B0]]
; CHECK-NEXT: [[C1:%.*]] = icmp ne i32 [[B1]], [[A1]]
; CHECK-NEXT: [[C2:%.*]] = icmp ne i32 [[B2]], [[A2]]
; CHECK-NEXT: [[C3:%.*]] = icmp ne i32 [[A3]], [[B3]]
; CHECK-NEXT: [[D0:%.*]] = insertelement <4 x i1> undef, i1 [[C0]], i32 0
; CHECK-NEXT: [[D1:%.*]] = insertelement <4 x i1> [[D0]], i1 [[C1]], i32 1
; CHECK-NEXT: [[D2:%.*]] = insertelement <4 x i1> [[D1]], i1 [[C2]], i32 2
; CHECK-NEXT: [[D3:%.*]] = insertelement <4 x i1> [[D2]], i1 [[C3]], i32 3
; CHECK-NEXT: [[R:%.*]] = sext <4 x i1> [[D3]] to <4 x i32>
; CHECK-NEXT: ret <4 x i32> [[R]] ; CHECK-NEXT: ret <4 x i32> [[R]]
; ;
%a0 = extractelement <4 x i32> %a, i32 0 %a0 = extractelement <4 x i32> %a, i32 0
%a1 = extractelement <4 x i32> %a, i32 1 %a1 = extractelement <4 x i32> %a, i32 1
%a2 = extractelement <4 x i32> %a, i32 2 %a2 = extractelement <4 x i32> %a, i32 2
%a3 = extractelement <4 x i32> %a, i32 3 %a3 = extractelement <4 x i32> %a, i32 3
%p0 = getelementptr inbounds i32, i32* %b, i32 0 %p0 = getelementptr inbounds i32, i32* %b, i32 0
%p1 = getelementptr inbounds i32, i32* %b, i32 1 %p1 = getelementptr inbounds i32, i32* %b, i32 1
Show All 12 Lines;
%d2 = insertelement <4 x i1> %d1, i1 %c2, i32 2 %d2 = insertelement <4 x i1> %d1, i1 %c2, i32 2
%d3 = insertelement <4 x i1> %d2, i1 %c3, i32 3 %d3 = insertelement <4 x i1> %d2, i1 %c3, i32 3
%r = sext <4 x i1> %d3 to <4 x i32> %r = sext <4 x i1> %d3 to <4 x i32>
ret <4 x i32> %r ret <4 x i32> %r
} }
define <4 x i32> @fcmp_oeq_v4i32(<4 x float> %a, float* %b) { define <4 x i32> @fcmp_oeq_v4i32(<4 x float> %a, float* %b) {
; CHECK-LABEL: @fcmp_oeq_v4i32( ; CHECK-LABEL: @fcmp_oeq_v4i32(
; CHECK-NEXT: [[A0:%.*]] = extractelement <4 x float> [[A:%.*]], i32 0 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[B:%.*]] to <4 x float>*
; CHECK-NEXT: [[A1:%.*]] = extractelement <4 x float> [[A]], i32 1 ; CHECK-NEXT: [[TMP2:%.*]] = load <4 x float>, <4 x float>* [[TMP1]], align 4
; CHECK-NEXT: [[A2:%.*]] = extractelement <4 x float> [[A]], i32 2 ; CHECK-NEXT: [[TMP3:%.*]] = fcmp oeq <4 x float> [[TMP2]], [[A:%.*]]
; CHECK-NEXT: [[A3:%.*]] = extractelement <4 x float> [[A]], i32 3 ; CHECK-NEXT: [[R:%.*]] = sext <4 x i1> [[TMP3]] to <4 x i32>
; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 1
; CHECK-NEXT: [[P2:%.*]] = getelementptr inbounds float, float* [[B]], i64 2
; CHECK-NEXT: [[P3:%.*]] = getelementptr inbounds float, float* [[B]], i64 3
; CHECK-NEXT: [[B0:%.*]] = load float, float* [[B]], align 4
; CHECK-NEXT: [[B1:%.*]] = load float, float* [[P1]], align 4
; CHECK-NEXT: [[B2:%.*]] = load float, float* [[P2]], align 4
; CHECK-NEXT: [[B3:%.*]] = load float, float* [[P3]], align 4
; CHECK-NEXT: [[C0:%.*]] = fcmp oeq float [[A0]], [[B0]]
; CHECK-NEXT: [[C1:%.*]] = fcmp oeq float [[B1]], [[A1]]
; CHECK-NEXT: [[C2:%.*]] = fcmp oeq float [[B2]], [[A2]]
; CHECK-NEXT: [[C3:%.*]] = fcmp oeq float [[A3]], [[B3]]
; CHECK-NEXT: [[D0:%.*]] = insertelement <4 x i1> undef, i1 [[C0]], i32 0
; CHECK-NEXT: [[D1:%.*]] = insertelement <4 x i1> [[D0]], i1 [[C1]], i32 1
; CHECK-NEXT: [[D2:%.*]] = insertelement <4 x i1> [[D1]], i1 [[C2]], i32 2
; CHECK-NEXT: [[D3:%.*]] = insertelement <4 x i1> [[D2]], i1 [[C3]], i32 3
; CHECK-NEXT: [[R:%.*]] = sext <4 x i1> [[D3]] to <4 x i32>
; CHECK-NEXT: ret <4 x i32> [[R]] ; CHECK-NEXT: ret <4 x i32> [[R]]
; ;
%a0 = extractelement <4 x float> %a, i32 0 %a0 = extractelement <4 x float> %a, i32 0
%a1 = extractelement <4 x float> %a, i32 1 %a1 = extractelement <4 x float> %a, i32 1
%a2 = extractelement <4 x float> %a, i32 2 %a2 = extractelement <4 x float> %a, i32 2
%a3 = extractelement <4 x float> %a, i32 3 %a3 = extractelement <4 x float> %a, i32 3
%p0 = getelementptr inbounds float, float* %b, i32 0 %p0 = getelementptr inbounds float, float* %b, i32 0
%p1 = getelementptr inbounds float, float* %b, i32 1 %p1 = getelementptr inbounds float, float* %b, i32 1
Show All 12 Lines;
%d2 = insertelement <4 x i1> %d1, i1 %c2, i32 2 %d2 = insertelement <4 x i1> %d1, i1 %c2, i32 2
%d3 = insertelement <4 x i1> %d2, i1 %c3, i32 3 %d3 = insertelement <4 x i1> %d2, i1 %c3, i32 3
%r = sext <4 x i1> %d3 to <4 x i32> %r = sext <4 x i1> %d3 to <4 x i32>
ret <4 x i32> %r ret <4 x i32> %r
} }
define <4 x i32> @fcmp_uno_v4i32(<4 x float> %a, float* %b) { define <4 x i32> @fcmp_uno_v4i32(<4 x float> %a, float* %b) {
; CHECK-LABEL: @fcmp_uno_v4i32( ; CHECK-LABEL: @fcmp_uno_v4i32(
; CHECK-NEXT: [[A0:%.*]] = extractelement <4 x float> [[A:%.*]], i32 0 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[B:%.*]] to <4 x float>*
; CHECK-NEXT: [[A1:%.*]] = extractelement <4 x float> [[A]], i32 1 ; CHECK-NEXT: [[TMP2:%.*]] = load <4 x float>, <4 x float>* [[TMP1]], align 4
; CHECK-NEXT: [[A2:%.*]] = extractelement <4 x float> [[A]], i32 2 ; CHECK-NEXT: [[TMP3:%.*]] = fcmp uno <4 x float> [[TMP2]], [[A:%.*]]
; CHECK-NEXT: [[A3:%.*]] = extractelement <4 x float> [[A]], i32 3 ; CHECK-NEXT: [[R:%.*]] = sext <4 x i1> [[TMP3]] to <4 x i32>
; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 1
; CHECK-NEXT: [[P2:%.*]] = getelementptr inbounds float, float* [[B]], i64 2
; CHECK-NEXT: [[P3:%.*]] = getelementptr inbounds float, float* [[B]], i64 3
; CHECK-NEXT: [[B0:%.*]] = load float, float* [[B]], align 4
; CHECK-NEXT: [[B1:%.*]] = load float, float* [[P1]], align 4
; CHECK-NEXT: [[B2:%.*]] = load float, float* [[P2]], align 4
; CHECK-NEXT: [[B3:%.*]] = load float, float* [[P3]], align 4
; CHECK-NEXT: [[C0:%.*]] = fcmp uno float [[A0]], [[B0]]
; CHECK-NEXT: [[C1:%.*]] = fcmp uno float [[B1]], [[A1]]
; CHECK-NEXT: [[C2:%.*]] = fcmp uno float [[B2]], [[A2]]
; CHECK-NEXT: [[C3:%.*]] = fcmp uno float [[A3]], [[B3]]
; CHECK-NEXT: [[D0:%.*]] = insertelement <4 x i1> undef, i1 [[C0]], i32 0
; CHECK-NEXT: [[D1:%.*]] = insertelement <4 x i1> [[D0]], i1 [[C1]], i32 1
; CHECK-NEXT: [[D2:%.*]] = insertelement <4 x i1> [[D1]], i1 [[C2]], i32 2
; CHECK-NEXT: [[D3:%.*]] = insertelement <4 x i1> [[D2]], i1 [[C3]], i32 3
; CHECK-NEXT: [[R:%.*]] = sext <4 x i1> [[D3]] to <4 x i32>
; CHECK-NEXT: ret <4 x i32> [[R]] ; CHECK-NEXT: ret <4 x i32> [[R]]
; ;
%a0 = extractelement <4 x float> %a, i32 0 %a0 = extractelement <4 x float> %a, i32 0
%a1 = extractelement <4 x float> %a, i32 1 %a1 = extractelement <4 x float> %a, i32 1
%a2 = extractelement <4 x float> %a, i32 2 %a2 = extractelement <4 x float> %a, i32 2
%a3 = extractelement <4 x float> %a, i32 3 %a3 = extractelement <4 x float> %a, i32 3
%p0 = getelementptr inbounds float, float* %b, i32 0 %p0 = getelementptr inbounds float, float* %b, i32 0
%p1 = getelementptr inbounds float, float* %b, i32 1 %p1 = getelementptr inbounds float, float* %b, i32 1
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