[HIP] Support gpu arch gfx906+sram-ecc

[yaxunl]

Summary

Add a new gpu arch gfx906+sram-ecc for HIP.

It is similar to gfx906 but implies target feature sram-ecc enabled,
whereas gfx906 implies target sram-ecc disabled. Corresponding
option -mattr=[+|-]sram-ecc will be passed to llc based on the
gpu arch.

[tra]

lib/Basic/Cuda.cpp

113

Wording nit:
Does it mean +(SRAM, ECC) or +SRAM, -ECC ?

From the rest of the changes I guess it's the former, but the syntax used can easily be interpreted as the later.

Perhaps change the feature name to sram_ecc and GPU name to something less verbose. gfx906se ?

[yaxunl]

lib/Basic/Cuda.cpp

113

It actually means +(SRAM-ECC).

There is actually documentation about what features are supported and their format

https://llvm.org/docs/AMDGPUUsage.html#code-object-target-identification
https://llvm.org/docs/AMDGPUUsage.html#amdgpu-target-features

Since the name has been used in runtime, we cannot change that.

Not all combinations are useful, therefore this patch only supports the one that is known to be useful.

I am considering a more generic approach, but so far I do not see its necessity yet.

[arsenm]

This should not be a new device name. This is also not how the features should be passed to the backend. These should be added to the function IR directly

include/clang/Basic/Cuda.h

enum class CudaArch {
   GFX801,
   GFX802,
   GFX803,
   GFX810,
   GFX900,
   GFX902,
   GFX904,
   GFX906,
+  GFX906_SRAM_ECC,
   GFX909,
   LAST,
 };
 const char *CudaArchToString(CudaArch A);
 
 // The input should have the form "sm_20".
 CudaArch StringToCudaArch(llvm::StringRef S);
 

lib/Basic/Cuda.cpp

const char *CudaArchToString(CudaArch A) {
   case CudaArch::GFX900: // vega, instinct
     return "gfx900";
   case CudaArch::GFX902: // TBA
     return "gfx902";
   case CudaArch::GFX904: // TBA
     return "gfx904";
   case CudaArch::GFX906: // TBA
     return "gfx906";
+  case CudaArch::GFX906_SRAM_ECC: // TBA
+    return "gfx906+sram-ecc";
   case CudaArch::GFX909: // TBA
     return "gfx909";
   }
   llvm_unreachable("invalid enum");
 }
 
 CudaArch StringToCudaArch(llvm::StringRef S) {
   return llvm::StringSwitch<CudaArch>(S)
return llvm::StringSwitch<CudaArch>(S)
       .Case("gfx801", CudaArch::GFX801)
       .Case("gfx802", CudaArch::GFX802)
       .Case("gfx803", CudaArch::GFX803)
       .Case("gfx810", CudaArch::GFX810)
       .Case("gfx900", CudaArch::GFX900)
       .Case("gfx902", CudaArch::GFX902)
       .Case("gfx904", CudaArch::GFX904)
       .Case("gfx906", CudaArch::GFX906)
+      .Case("gfx906+sram-ecc", CudaArch::GFX906_SRAM_ECC)
       .Case("gfx909", CudaArch::GFX909)
       .Default(CudaArch::UNKNOWN);
 }
 
 const char *CudaVirtualArchToString(CudaVirtualArch A) {
   switch (A) {
   case CudaVirtualArch::UNKNOWN:
     return "unknown";
CudaVirtualArch VirtualArchForCudaArch(CudaArch A) {
   case CudaArch::GFX801:
   case CudaArch::GFX802:
   case CudaArch::GFX803:
   case CudaArch::GFX810:
   case CudaArch::GFX900:
   case CudaArch::GFX902:
   case CudaArch::GFX904:
   case CudaArch::GFX906:
+  case CudaArch::GFX906_SRAM_ECC:
   case CudaArch::GFX909:
     return CudaVirtualArch::COMPUTE_AMDGCN;
   }
   llvm_unreachable("invalid enum");
 }
 
 CudaVersion MinVersionForCudaArch(CudaArch A) {
   switch (A) {
CudaVersion MinVersionForCudaArch(CudaArch A) {
   case CudaArch::GFX801:
   case CudaArch::GFX802:
   case CudaArch::GFX803:
   case CudaArch::GFX810:
   case CudaArch::GFX900:
   case CudaArch::GFX902:
   case CudaArch::GFX904:
   case CudaArch::GFX906:
+  case CudaArch::GFX906_SRAM_ECC:
   case CudaArch::GFX909:
     return CudaVersion::CUDA_70;
   }
   llvm_unreachable("invalid enum");
 }
 
 CudaVersion MaxVersionForCudaArch(CudaArch A) {
   switch (A) {

lib/Basic/Targets/NVPTX.cpp

std::string CUDAArchCode = [this] {
       case CudaArch::GFX801:
       case CudaArch::GFX802:
       case CudaArch::GFX803:
       case CudaArch::GFX810:
       case CudaArch::GFX900:
       case CudaArch::GFX902:
       case CudaArch::GFX904:
       case CudaArch::GFX906:
+      case CudaArch::GFX906_SRAM_ECC:
       case CudaArch::GFX909:
       case CudaArch::LAST:
         break;
       case CudaArch::UNKNOWN:
         assert(false && "No GPU arch when compiling CUDA device code.");
         return "";
       case CudaArch::SM_20:
         return "200";

lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp

if (Clause->getClauseKind() == OMPC_unified_shared_memory) {
       case CudaArch::GFX801:
       case CudaArch::GFX802:
       case CudaArch::GFX803:
       case CudaArch::GFX810:
       case CudaArch::GFX900:
       case CudaArch::GFX902:
       case CudaArch::GFX904:
       case CudaArch::GFX906:
+      case CudaArch::GFX906_SRAM_ECC:
       case CudaArch::GFX909:
       case CudaArch::UNKNOWN:
         break;
       case CudaArch::LAST:
         llvm_unreachable("Unexpected Cuda arch.");
       }
     }
   }
static std::pair<unsigned, unsigned> getSMsBlocksPerSM(CodeGenModule &CGM) {
   case CudaArch::GFX801:
   case CudaArch::GFX802:
   case CudaArch::GFX803:
   case CudaArch::GFX810:
   case CudaArch::GFX900:
   case CudaArch::GFX902:
   case CudaArch::GFX904:
   case CudaArch::GFX906:
+  case CudaArch::GFX906_SRAM_ECC:
   case CudaArch::GFX909:
   case CudaArch::UNKNOWN:
     break;
   case CudaArch::LAST:
     llvm_unreachable("Unexpected Cuda arch.");
   }
   llvm_unreachable("Unexpected NVPTX target without ptx feature.");
 }

lib/Driver/ToolChains/HIP.cpp

 #if _WIN32 || _WIN64
 #define NULL_FILE "nul"
 #else
 #define NULL_FILE "/dev/null"
 #endif
 
 namespace {
 
+void stripFeatureString(StringRef &Arch) {
+  Arch = Arch.take_until([](char c) { return c == '+'; });
+}
+
+StringRef getFeatureString(StringRef Arch) {
+  return Arch.drop_until([](char c) { return c == '+'; });
+}
+
 static void addBCLib(Compilation &C, const ArgList &Args,
                      ArgStringList &CmdArgs, ArgStringList LibraryPaths,
                      StringRef BCName) {
   StringRef FullName;
   for (std::string LibraryPath : LibraryPaths) {
     SmallString<128> Path(LibraryPath);
     llvm::sys::path::append(Path, BCName);
     FullName = Path;
const char *AMDGCN::Linker::constructLLVMLinkCommand(
   C.addCommand(llvm::make_unique<Command>(JA, *this, Exec, CmdArgs, Inputs));
   return OutputFileName;
 }
 
 const char *AMDGCN::Linker::constructOptCommand(
     Compilation &C, const JobAction &JA, const InputInfoList &Inputs,
     const llvm::opt::ArgList &Args, llvm::StringRef SubArchName,
     llvm::StringRef OutputFilePrefix, const char *InputFileName) const {
+  stripFeatureString(SubArchName);
   // Construct opt command.
   ArgStringList OptArgs;
   // The input to opt is the output from llvm-link.
   OptArgs.push_back(InputFileName);
   // Pass optimization arg to opt.
   if (Arg *A = Args.getLastArg(options::OPT_O_Group)) {
     StringRef OOpt = "3";
     if (A->getOption().matches(options::OPT_O4) ||
const char *AMDGCN::Linker::constructOptCommand(
   C.addCommand(llvm::make_unique<Command>(JA, *this, OptExec, OptArgs, Inputs));
   return OutputFileName;
 }
 
 const char *AMDGCN::Linker::constructLlcCommand(
     Compilation &C, const JobAction &JA, const InputInfoList &Inputs,
     const llvm::opt::ArgList &Args, llvm::StringRef SubArchName,
     llvm::StringRef OutputFilePrefix, const char *InputFileName) const {
+
+  // Only two gpu archs for gfx906 are accepted: gfx906 and gfx906+sram-ecc.
+  // gfx906 implies sram-ecc off, whereas gfx906+sram-ecc implies sram-ecc on.
+  StringRef Feature = getFeatureString(SubArchName);
+  stripFeatureString(SubArchName);
+  assert(Feature.empty() ||
+         (SubArchName == "gfx906" && Feature == "+sram-ecc"));
+  if (SubArchName == "gfx906" && Feature.empty())
+    Feature = "-sram-ecc";
+
   // Construct llc command.
   ArgStringList LlcArgs{InputFileName, "-mtriple=amdgcn-amd-amdhsa",
                         "-filetype=obj", "-mattr=-code-object-v3",
                         Args.MakeArgString("-mcpu=" + SubArchName)};
 
+  if (!Feature.empty())
+    LlcArgs.push_back(Args.MakeArgString("-mattr=" + Feature));
+
   // Extract all the -m options
   std::vector<llvm::StringRef> Features;
   handleTargetFeaturesGroup(
     Args, Features, options::OPT_m_amdgpu_Features_Group);
 
   // Add features to mattr such as xnack
   std::string MAttrString = "-mattr=";
   for(auto OneFeature : Features) {
if (A->getOption().matches(options::OPT_Xarch__)) {
       XarchArg->setBaseArg(A);
       A = XarchArg.release();
       DAL->AddSynthesizedArg(A);
     }
     DAL->append(A);
   }
 
   if (!BoundArch.empty()) {
+    stripFeatureString(BoundArch);
     DAL->eraseArg(options::OPT_march_EQ);
     DAL->AddJoinedArg(nullptr, Opts.getOption(options::OPT_march_EQ), BoundArch);
   }
 
   return DAL;
 }
 
 Tool *HIPToolChain::buildLinker() const {

test/Driver/hip-toolchain-sram-ecc.hip

+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// REQUIRES: amdgpu-registered-target
+
+// RUN: %clang -### -target x86_64-linux-gnu \
+// RUN:   -x hip --cuda-gpu-arch=gfx906 --cuda-gpu-arch=gfx906+sram-ecc \
+// RUN:   %s 2>&1 | FileCheck %s
+
+// CHECK: [[CLANG:".*clang.*"]] "-cc1" "-triple" "amdgcn-amd-amdhsa"
+// CHECK-SAME: "-aux-triple" "x86_64-unknown-linux-gnu"
+// CHECK-SAME: "-emit-llvm-bc"
+// CHECK-SAME: {{.*}} "-target-cpu" "gfx906"
+
+// CHECK: [[OPT:".*opt"]] {{".*-gfx906-linked.*bc"}} "-mtriple=amdgcn-amd-amdhsa"
+// CHECK-SAME: "-mcpu=gfx906"
+// CHECK-SAME: "-o" [[OPT_906_BC:".*-gfx906-optimized.*bc"]]
+
+// CHECK: [[LLC: ".*llc"]] [[OPT_906_BC]]
+// CHECK-SAME: "-mtriple=amdgcn-amd-amdhsa" "-filetype=obj"
+// CHECK-SAME: {{.*}} "-mcpu=gfx906"
+// CHECK-SAME: "-mattr=-sram-ecc" "-o" {{".*-gfx906-.*o"}}
+
+// CHECK: [[CLANG]] "-cc1" "-triple" "amdgcn-amd-amdhsa"
+// CHECK-SAME: "-aux-triple" "x86_64-unknown-linux-gnu"
+// CHECK-SAME: "-emit-llvm-bc"
+// CHECK-SAME: {{.*}} "-target-cpu" "gfx906"
+
+// CHECK: [[OPT]] {{".*-gfx906\+sram-ecc.*bc"}} "-mtriple=amdgcn-amd-amdhsa"
+// CHECK-SAME: "-mcpu=gfx906"
+// CHECK-SAME: "-o" [[OPT_906ECC_BC:".*-gfx906\+sram-ecc.*bc"]]
+
+// CHECK: [[LLC]] [[OPT_906ECC_BC]]
+// CHECK-SAME: "-mtriple=amdgcn-amd-amdhsa" "-filetype=obj"
+// CHECK-SAME: {{.*}} "-mcpu=gfx906"
+// CHECK-SAME: "-mattr=+sram-ecc" "-o" {{".*-gfx906\+sram-ecc.*o"}}
+
+// CHECK: {{".*clang-offload-bundler"}}
+// CHECK-SAME: "-targets=host-x86_64-unknown-linux,hip-amdgcn-amd-amdhsa-gfx906,hip-amdgcn-amd-amdhsa-gfx906+sram-ecc"