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[X86] Correct scheduler information for rotate by constant for Haswell, Broadwell, and Skylake.
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Authored by craig.topper on Mar 7 2019, 12:41 AM.

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Summary

Rotate with explicit immediate is a single uop from Haswell on. An immediate of 1 has a dependency on the previous writer of flags, but the other immediate values do not.

The implicit rotate by 1 instruction is 2 uops. But the flags are merged after the rotate uop so the data result does not see the flag dependency. But I don't think we have any way of modeling that.

RORX is 1 uop without the load. 2 uops with the load. We currently model these with WriteShift/WriteShiftLd.

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rL LLVM

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craig.topper created this revision.Mar 7 2019, 12:41 AM
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andreadb accepted this revision.Mar 7 2019, 3:09 AM

LGTM

This revision is now accepted and ready to land.Mar 7 2019, 3:09 AM
This revision was automatically updated to reflect the committed changes.