[SelectionDAG] Teach GetDemandedBits to look at the known zeros of the LHS when handling ISD::AND

[craig.topper]

Summary

If the LHS has known zeros, then the RHS immediate mask might have been simplified to remove those bits.

This patch adds a call to computeKnownBits to get the known zeroes to handle that possibility. I left an early out to skip the call if all of the demanded bits are set in the mask.

[RKSimon]

LGTM

llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(V.getOperand(1))) {
       APInt NewMask = Mask << Amt;
       if (SDValue SimplifyLHS = GetDemandedBits(V.getOperand(0), NewMask))
         return getNode(ISD::SRL, SDLoc(V), V.getValueType(), SimplifyLHS,
                        V.getOperand(1));
     }
     break;
   case ISD::AND: {
     // X & -1 -> X (ignoring bits which aren't demanded).
-    ConstantSDNode *AndVal = isConstOrConstSplat(V.getOperand(1));
-    if (AndVal && Mask.isSubsetOf(AndVal->getAPIntValue()))
+    // Also handle the case where masked out bits in X are known to be zero.
+    if (ConstantSDNode *RHSC = isConstOrConstSplat(V.getOperand(1))) {
+      const APInt &AndVal = RHSC->getAPIntValue();
+      if (Mask.isSubsetOf(AndVal) ||
+          Mask.isSubsetOf(computeKnownBits(V.getOperand(0)).Zero | AndVal))
         return V.getOperand(0);
+    }
     break;
   }
   case ISD::ANY_EXTEND: {
     SDValue Src = V.getOperand(0);
     unsigned SrcBitWidth = Src.getScalarValueSizeInBits();
     // Being conservative here - only peek through if we only demand bits in the
     // non-extended source (even though the extended bits are technically undef).
     if (Mask.getActiveBits() > SrcBitWidth)

llvm/trunk/test/CodeGen/X86/bt.ll

 ; Make sure we can simplify bt when the shift amount has known zeros in it
 ; which cause the and mask to have bits removed.
 define zeroext i1 @demanded_with_known_zeroes(i32 %bit, i32 %bits) {
 ; X86-LABEL: demanded_with_known_zeroes:
 ; X86:       # %bb.0: # %entry
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    movb {{[0-9]+}}(%esp), %cl
 ; X86-NEXT:    shlb $2, %cl
-; X86-NEXT:    andb $28, %cl
 ; X86-NEXT:    movzbl %cl, %ecx
 ; X86-NEXT:    btl %ecx, %eax
 ; X86-NEXT:    setb %al
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: demanded_with_known_zeroes:
 ; X64:       # %bb.0: # %entry
 ; X64-NEXT:    shlb $2, %dil
-; X64-NEXT:    andb $28, %dil
 ; X64-NEXT:    movzbl %dil, %eax
 ; X64-NEXT:    btl %eax, %esi
 ; X64-NEXT:    setb %al
 ; X64-NEXT:    retq
 entry:
   %bit2 = shl i32 %bit, 2
   %and = and i32 %bit2, 31
   %shl = shl i32 1, %and
   %and1 = and i32 %shl, %bits
   %tobool = icmp ne i32 %and1, 0
   ret i1 %tobool
 }