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Differential D57788

[X86] Don't set exception mask bits when modifying FPCW to change rounding mode for fp->int conversion
ClosedPublic

Authored by craig.topper on Feb 5 2019, 1:59 PM.

Details

Reviewers
andrew.w.kaylor
efriedma
RKSimon
spatel
Commits
rGdb2f084aa9dc: [X86] Don't set exception mask bits when modifying FPCW to change rounding mode…
rL354178: [X86] Don't set exception mask bits when modifying FPCW to change rounding mode…
Summary

When we need to do an fp->int conversion using x87 instructions, we need to temporarily change the rounding mode to 0b11 and perform a store. To do this we save the old value of the fpcw to the stack, then set the fpcw to 0xc7f, do the store, then restore fpcw. But the 0xc7f value forces the exception mask bits 1. While this is what they would be in the default FP environment, as we move to support changing the FP environments, we shouldn't make this assumption.

This patch changes the code to explicitly OR 0xc00 with the old value so that only the rounding mode is changed. Unfortunately, this requires an additional stack temporaries one to hold the old value and one to hold the new value. Without two stack temporaries we would need an additional GPR. We already need one to do the OR operation in. This is similar to what gcc and icc do for this operation. Though they are both better at reusing the stack temporaries when there are multiple truncates in a function(or at least in a basic block)

Diff Detail

Repository
rL LLVM

Event Timeline

craig.topper created this revision.Feb 5 2019, 1:59 PM
Herald added a subscriber: eraman. · View Herald TranscriptFeb 5 2019, 1:59 PM
craig.topper added a comment.Feb 14 2019, 10:28 PM

Ping

RKSimon accepted this revision.Feb 15 2019, 4:26 AM

LGTM with one minor

lib/Target/X86/X86ISelLowering.cpp
30071 ↗(On Diff #185395)

Explain what the bits represent

This revision is now accepted and ready to land.Feb 15 2019, 4:26 AM
Closed by commit rL354178: [X86] Don't set exception mask bits when modifying FPCW to change rounding mode… (authored by ctopper). · Explain WhyFeb 15 2019, 1:59 PM
This revision was automatically updated to reflect the committed changes.
Herald added a project: Restricted Project. · View Herald TranscriptFeb 15 2019, 1:59 PM
dholbert added a subscriber: dholbert.Feb 19 2019, 1:44 PM

BTW, this seems to have caused a regression -- see https://bugs.llvm.org/show_bug.cgi?id=40779

Revision Contents

PathSize
llvm/
trunk/
lib/
Target/
X86/
38 lines
test/
CodeGen/
X86/
10 lines
156 lines
10 lines
18 lines
44 lines
12 lines
220 lines
18 lines
8 lines
8 lines

Diff 187082

llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 30,097 Lines • ▼ Show 20 LinesX86TargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
case X86::FP64_TO_INT16_IN_MEM: case X86::FP64_TO_INT16_IN_MEM:
case X86::FP64_TO_INT32_IN_MEM: case X86::FP64_TO_INT32_IN_MEM:
case X86::FP64_TO_INT64_IN_MEM: case X86::FP64_TO_INT64_IN_MEM:
case X86::FP80_TO_INT16_IN_MEM: case X86::FP80_TO_INT16_IN_MEM:
case X86::FP80_TO_INT32_IN_MEM: case X86::FP80_TO_INT32_IN_MEM:
case X86::FP80_TO_INT64_IN_MEM: { case X86::FP80_TO_INT64_IN_MEM: {
// Change the floating point control register to use "round towards zero" // Change the floating point control register to use "round towards zero"
// mode when truncating to an integer value. // mode when truncating to an integer value.
int CWFrameIdx = MF->getFrameInfo().CreateStackObject(2, 2, false); int OrigCWFrameIdx = MF->getFrameInfo().CreateStackObject(2, 2, false);
addFrameReference(BuildMI(*BB, MI, DL, addFrameReference(BuildMI(*BB, MI, DL,
TII->get(X86::FNSTCW16m)), CWFrameIdx); TII->get(X86::FNSTCW16m)), OrigCWFrameIdx);
// Load the old value of the high byte of the control word... // Load the old value of the control word...
unsigned OldCW = unsigned OldCW =
MF->getRegInfo().createVirtualRegister(&X86::GR32RegClass);
addFrameReference(BuildMI(*BB, MI, DL, TII->get(X86::MOVZX32rm16), OldCW),
OrigCWFrameIdx);
// OR 0b11 into bit 10 and 11. 0b11 is the encoding for round toward zero.
unsigned NewCW =
MF->getRegInfo().createVirtualRegister(&X86::GR32RegClass);
BuildMI(*BB, MI, DL, TII->get(X86::OR32ri), NewCW)
.addReg(OldCW, RegState::Kill).addImm(0xC00);
// Extract to 16 bits.
unsigned NewCW16 =
MF->getRegInfo().createVirtualRegister(&X86::GR16RegClass); MF->getRegInfo().createVirtualRegister(&X86::GR16RegClass);
addFrameReference(BuildMI(*BB, MI, DL, TII->get(X86::MOV16rm), OldCW), BuildMI(*BB, MI, DL, TII->get(TargetOpcode::COPY), NewCW16)
CWFrameIdx); .addReg(NewCW, RegState::Kill, X86::sub_16bit);
// Set the high part to be round to zero... // Prepare memory for FLDCW.
addFrameReference(BuildMI(*BB, MI, DL, TII->get(X86::MOV16mi)), CWFrameIdx) int NewCWFrameIdx = MF->getFrameInfo().CreateStackObject(2, 2, false);
.addImm(0xC7F); addFrameReference(BuildMI(*BB, MI, DL, TII->get(X86::MOV16mr)),
NewCWFrameIdx)
.addReg(NewCW16, RegState::Kill);
// Reload the modified control word now... // Reload the modified control word now...
addFrameReference(BuildMI(*BB, MI, DL, addFrameReference(BuildMI(*BB, MI, DL,
TII->get(X86::FLDCW16m)), CWFrameIdx); TII->get(X86::FLDCW16m)), NewCWFrameIdx);
// Restore the memory image of control word to original value
addFrameReference(BuildMI(*BB, MI, DL, TII->get(X86::MOV16mr)), CWFrameIdx)
.addReg(OldCW);
// Get the X86 opcode to use. // Get the X86 opcode to use.
unsigned Opc; unsigned Opc;
switch (MI.getOpcode()) { switch (MI.getOpcode()) {
default: llvm_unreachable("illegal opcode!"); default: llvm_unreachable("illegal opcode!");
case X86::FP32_TO_INT16_IN_MEM: Opc = X86::IST_Fp16m32; break; case X86::FP32_TO_INT16_IN_MEM: Opc = X86::IST_Fp16m32; break;
case X86::FP32_TO_INT32_IN_MEM: Opc = X86::IST_Fp32m32; break; case X86::FP32_TO_INT32_IN_MEM: Opc = X86::IST_Fp32m32; break;
case X86::FP32_TO_INT64_IN_MEM: Opc = X86::IST_Fp64m32; break; case X86::FP32_TO_INT64_IN_MEM: Opc = X86::IST_Fp64m32; break;
case X86::FP64_TO_INT16_IN_MEM: Opc = X86::IST_Fp16m64; break; case X86::FP64_TO_INT16_IN_MEM: Opc = X86::IST_Fp16m64; break;
case X86::FP64_TO_INT32_IN_MEM: Opc = X86::IST_Fp32m64; break; case X86::FP64_TO_INT32_IN_MEM: Opc = X86::IST_Fp32m64; break;
case X86::FP64_TO_INT64_IN_MEM: Opc = X86::IST_Fp64m64; break; case X86::FP64_TO_INT64_IN_MEM: Opc = X86::IST_Fp64m64; break;
case X86::FP80_TO_INT16_IN_MEM: Opc = X86::IST_Fp16m80; break; case X86::FP80_TO_INT16_IN_MEM: Opc = X86::IST_Fp16m80; break;
case X86::FP80_TO_INT32_IN_MEM: Opc = X86::IST_Fp32m80; break; case X86::FP80_TO_INT32_IN_MEM: Opc = X86::IST_Fp32m80; break;
case X86::FP80_TO_INT64_IN_MEM: Opc = X86::IST_Fp64m80; break; case X86::FP80_TO_INT64_IN_MEM: Opc = X86::IST_Fp64m80; break;
} }
X86AddressMode AM = getAddressFromInstr(&MI, 0); X86AddressMode AM = getAddressFromInstr(&MI, 0);
addFullAddress(BuildMI(*BB, MI, DL, TII->get(Opc)), AM) addFullAddress(BuildMI(*BB, MI, DL, TII->get(Opc)), AM)
.addReg(MI.getOperand(X86::AddrNumOperands).getReg()); .addReg(MI.getOperand(X86::AddrNumOperands).getReg());
// Reload the original control word now. // Reload the original control word now.
addFrameReference(BuildMI(*BB, MI, DL, addFrameReference(BuildMI(*BB, MI, DL,
TII->get(X86::FLDCW16m)), CWFrameIdx); TII->get(X86::FLDCW16m)), OrigCWFrameIdx);
MI.eraseFromParent(); // The pseudo instruction is gone now. MI.eraseFromParent(); // The pseudo instruction is gone now.
return BB; return BB;
} }
// Thread synchronization. // Thread synchronization.
case X86::MONITOR: case X86::MONITOR:
return emitMonitor(MI, BB, Subtarget, X86::MONITORrrr); return emitMonitor(MI, BB, Subtarget, X86::MONITORrrr);
case X86::MONITORX: case X86::MONITORX:
▲ Show 20 Lines • Show All 13,219 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/X86/bswap_tree2.ll

Show First 20 Lines • Show All 97 Lines • ▼ Show 20 Lines
} }
; Invalid pattern involving a unary op ; Invalid pattern involving a unary op
define i32 @test3(float %x) nounwind { define i32 @test3(float %x) nounwind {
; CHECK-LABEL: test3: ; CHECK-LABEL: test3:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: subl $8, %esp ; CHECK-NEXT: subl $8, %esp
; CHECK-NEXT: flds {{[0-9]+}}(%esp) ; CHECK-NEXT: flds {{[0-9]+}}(%esp)
; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp) ; CHECK-NEXT: fnstcw (%esp)
; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; CHECK-NEXT: movzwl (%esp), %eax
; CHECK-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; CHECK-NEXT: orl $3072, %eax # imm = 0xC00
; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp) ; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp)
; CHECK-NEXT: fistpl {{[0-9]+}}(%esp)
; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) ; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
; CHECK-NEXT: fistpl {{[0-9]+}}(%esp)
; CHECK-NEXT: fldcw (%esp)
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movl %ecx, %edx ; CHECK-NEXT: movl %ecx, %edx
; CHECK-NEXT: shll $8, %edx ; CHECK-NEXT: shll $8, %edx
; CHECK-NEXT: movl %ecx, %eax ; CHECK-NEXT: movl %ecx, %eax
; CHECK-NEXT: shrl $8, %eax ; CHECK-NEXT: shrl $8, %eax
; CHECK-NEXT: andl $65280, %ecx # imm = 0xFF00 ; CHECK-NEXT: andl $65280, %ecx # imm = 0xFF00
; CHECK-NEXT: andl $-16777216, %edx # imm = 0xFF000000 ; CHECK-NEXT: andl $-16777216, %edx # imm = 0xFF000000
; CHECK-NEXT: andl $16711680, %eax # imm = 0xFF0000 ; CHECK-NEXT: andl $16711680, %eax # imm = 0xFF0000
Show All 31 Lines

llvm/trunk/test/CodeGen/X86/fp-cvt.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i386-unknown | FileCheck %s --check-prefixes=X86,X86-X87 ; RUN: llc < %s -mtriple=i386-unknown | FileCheck %s --check-prefixes=X86,X86-X87
; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64,X64-X87 ; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64,X64-X87
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=X64,X64-SSSE3 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=X64,X64-SSSE3
; ;
; fptosi ; fptosi
; ;
define i16 @fptosi_i16_fp80(x86_fp80 %a0) nounwind { define i16 @fptosi_i16_fp80(x86_fp80 %a0) nounwind {
; X86-LABEL: fptosi_i16_fp80: ; X86-LABEL: fptosi_i16_fp80:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: pushl %eax ; X86-NEXT: subl $8, %esp
; X86-NEXT: fldt {{[0-9]+}}(%esp) ; X86-NEXT: fldt {{[0-9]+}}(%esp)
; X86-NEXT: fnstcw (%esp) ; X86-NEXT: fnstcw {{[0-9]+}}(%esp)
; X86-NEXT: movzwl (%esp), %eax ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movw $3199, (%esp) # imm = 0xC7F ; X86-NEXT: orl $3072, %eax # imm = 0xC00
; X86-NEXT: fldcw (%esp) ; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X86-NEXT: movw %ax, (%esp) ; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: fistps {{[0-9]+}}(%esp) ; X86-NEXT: fistps {{[0-9]+}}(%esp)
; X86-NEXT: fldcw (%esp) ; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: popl %ecx ; X86-NEXT: addl $8, %esp
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-X87-LABEL: fptosi_i16_fp80: ; X64-X87-LABEL: fptosi_i16_fp80:
; X64-X87: # %bb.0: ; X64-X87: # %bb.0:
; X64-X87-NEXT: fldt {{[0-9]+}}(%rsp) ; X64-X87-NEXT: fldt {{[0-9]+}}(%rsp)
; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax ; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
; X64-X87-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F ; X64-X87-NEXT: orl $3072, %eax # imm = 0xC00
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movw %ax, -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fistps -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fistps -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax ; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
; X64-X87-NEXT: retq ; X64-X87-NEXT: retq
; ;
; X64-SSSE3-LABEL: fptosi_i16_fp80: ; X64-SSSE3-LABEL: fptosi_i16_fp80:
; X64-SSSE3: # %bb.0: ; X64-SSSE3: # %bb.0:
; X64-SSSE3-NEXT: fldt {{[0-9]+}}(%rsp) ; X64-SSSE3-NEXT: fldt {{[0-9]+}}(%rsp)
; X64-SSSE3-NEXT: fisttps -{{[0-9]+}}(%rsp) ; X64-SSSE3-NEXT: fisttps -{{[0-9]+}}(%rsp)
; X64-SSSE3-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax ; X64-SSSE3-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
; X64-SSSE3-NEXT: retq ; X64-SSSE3-NEXT: retq
%1 = fptosi x86_fp80 %a0 to i16 %1 = fptosi x86_fp80 %a0 to i16
ret i16 %1 ret i16 %1
} }
define i16 @fptosi_i16_fp80_ld(x86_fp80 *%a0) nounwind { define i16 @fptosi_i16_fp80_ld(x86_fp80 *%a0) nounwind {
; X86-LABEL: fptosi_i16_fp80_ld: ; X86-LABEL: fptosi_i16_fp80_ld:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: pushl %eax ; X86-NEXT: subl $8, %esp
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: fldt (%eax) ; X86-NEXT: fldt (%eax)
; X86-NEXT: fnstcw (%esp) ; X86-NEXT: fnstcw {{[0-9]+}}(%esp)
; X86-NEXT: movzwl (%esp), %eax ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movw $3199, (%esp) # imm = 0xC7F ; X86-NEXT: orl $3072, %eax # imm = 0xC00
; X86-NEXT: fldcw (%esp) ; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X86-NEXT: movw %ax, (%esp) ; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: fistps {{[0-9]+}}(%esp) ; X86-NEXT: fistps {{[0-9]+}}(%esp)
; X86-NEXT: fldcw (%esp) ; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: popl %ecx ; X86-NEXT: addl $8, %esp
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-X87-LABEL: fptosi_i16_fp80_ld: ; X64-X87-LABEL: fptosi_i16_fp80_ld:
; X64-X87: # %bb.0: ; X64-X87: # %bb.0:
; X64-X87-NEXT: fldt (%rdi) ; X64-X87-NEXT: fldt (%rdi)
; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax ; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
; X64-X87-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F ; X64-X87-NEXT: orl $3072, %eax # imm = 0xC00
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movw %ax, -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fistps -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fistps -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax ; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
; X64-X87-NEXT: retq ; X64-X87-NEXT: retq
; ;
; X64-SSSE3-LABEL: fptosi_i16_fp80_ld: ; X64-SSSE3-LABEL: fptosi_i16_fp80_ld:
; X64-SSSE3: # %bb.0: ; X64-SSSE3: # %bb.0:
; X64-SSSE3-NEXT: fldt (%rdi) ; X64-SSSE3-NEXT: fldt (%rdi)
; X64-SSSE3-NEXT: fisttps -{{[0-9]+}}(%rsp) ; X64-SSSE3-NEXT: fisttps -{{[0-9]+}}(%rsp)
; X64-SSSE3-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax ; X64-SSSE3-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
; X64-SSSE3-NEXT: retq ; X64-SSSE3-NEXT: retq
%1 = load x86_fp80, x86_fp80 *%a0 %1 = load x86_fp80, x86_fp80 *%a0
%2 = fptosi x86_fp80 %1 to i16 %2 = fptosi x86_fp80 %1 to i16
ret i16 %2 ret i16 %2
} }
define i32 @fptosi_i32_fp80(x86_fp80 %a0) nounwind { define i32 @fptosi_i32_fp80(x86_fp80 %a0) nounwind {
; X86-LABEL: fptosi_i32_fp80: ; X86-LABEL: fptosi_i32_fp80:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: subl $8, %esp ; X86-NEXT: subl $8, %esp
; X86-NEXT: fldt {{[0-9]+}}(%esp) ; X86-NEXT: fldt {{[0-9]+}}(%esp)
; X86-NEXT: fnstcw {{[0-9]+}}(%esp) ; X86-NEXT: fnstcw (%esp)
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movzwl (%esp), %eax
; X86-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; X86-NEXT: orl $3072, %eax # imm = 0xC00
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: movw %ax, {{[0-9]+}}(%esp) ; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X86-NEXT: fistpl {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp) ; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: fistpl {{[0-9]+}}(%esp)
; X86-NEXT: fldcw (%esp)
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl $8, %esp ; X86-NEXT: addl $8, %esp
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-X87-LABEL: fptosi_i32_fp80: ; X64-X87-LABEL: fptosi_i32_fp80:
; X64-X87: # %bb.0: ; X64-X87: # %bb.0:
; X64-X87-NEXT: fldt {{[0-9]+}}(%rsp) ; X64-X87-NEXT: fldt {{[0-9]+}}(%rsp)
; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax ; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
; X64-X87-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F ; X64-X87-NEXT: orl $3072, %eax # imm = 0xC00
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movw %ax, -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fistpl -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fistpl -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movl -{{[0-9]+}}(%rsp), %eax ; X64-X87-NEXT: movl -{{[0-9]+}}(%rsp), %eax
; X64-X87-NEXT: retq ; X64-X87-NEXT: retq
; ;
; X64-SSSE3-LABEL: fptosi_i32_fp80: ; X64-SSSE3-LABEL: fptosi_i32_fp80:
; X64-SSSE3: # %bb.0: ; X64-SSSE3: # %bb.0:
; X64-SSSE3-NEXT: fldt {{[0-9]+}}(%rsp) ; X64-SSSE3-NEXT: fldt {{[0-9]+}}(%rsp)
; X64-SSSE3-NEXT: fisttpl -{{[0-9]+}}(%rsp) ; X64-SSSE3-NEXT: fisttpl -{{[0-9]+}}(%rsp)
; X64-SSSE3-NEXT: movl -{{[0-9]+}}(%rsp), %eax ; X64-SSSE3-NEXT: movl -{{[0-9]+}}(%rsp), %eax
; X64-SSSE3-NEXT: retq ; X64-SSSE3-NEXT: retq
%1 = fptosi x86_fp80 %a0 to i32 %1 = fptosi x86_fp80 %a0 to i32
ret i32 %1 ret i32 %1
} }
define i32 @fptosi_i32_fp80_ld(x86_fp80 *%a0) nounwind { define i32 @fptosi_i32_fp80_ld(x86_fp80 *%a0) nounwind {
; X86-LABEL: fptosi_i32_fp80_ld: ; X86-LABEL: fptosi_i32_fp80_ld:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: subl $8, %esp ; X86-NEXT: subl $8, %esp
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: fldt (%eax) ; X86-NEXT: fldt (%eax)
; X86-NEXT: fnstcw {{[0-9]+}}(%esp) ; X86-NEXT: fnstcw (%esp)
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movzwl (%esp), %eax
; X86-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; X86-NEXT: orl $3072, %eax # imm = 0xC00
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: movw %ax, {{[0-9]+}}(%esp) ; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X86-NEXT: fistpl {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp) ; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: fistpl {{[0-9]+}}(%esp)
; X86-NEXT: fldcw (%esp)
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl $8, %esp ; X86-NEXT: addl $8, %esp
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-X87-LABEL: fptosi_i32_fp80_ld: ; X64-X87-LABEL: fptosi_i32_fp80_ld:
; X64-X87: # %bb.0: ; X64-X87: # %bb.0:
; X64-X87-NEXT: fldt (%rdi) ; X64-X87-NEXT: fldt (%rdi)
; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax ; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
; X64-X87-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F ; X64-X87-NEXT: orl $3072, %eax # imm = 0xC00
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movw %ax, -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fistpl -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fistpl -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movl -{{[0-9]+}}(%rsp), %eax ; X64-X87-NEXT: movl -{{[0-9]+}}(%rsp), %eax
; X64-X87-NEXT: retq ; X64-X87-NEXT: retq
; ;
; X64-SSSE3-LABEL: fptosi_i32_fp80_ld: ; X64-SSSE3-LABEL: fptosi_i32_fp80_ld:
; X64-SSSE3: # %bb.0: ; X64-SSSE3: # %bb.0:
; X64-SSSE3-NEXT: fldt (%rdi) ; X64-SSSE3-NEXT: fldt (%rdi)
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; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: pushl %ebp ; X86-NEXT: pushl %ebp
; X86-NEXT: movl %esp, %ebp ; X86-NEXT: movl %esp, %ebp
; X86-NEXT: andl $-8, %esp ; X86-NEXT: andl $-8, %esp
; X86-NEXT: subl $16, %esp ; X86-NEXT: subl $16, %esp
; X86-NEXT: fldt 8(%ebp) ; X86-NEXT: fldt 8(%ebp)
; X86-NEXT: fnstcw {{[0-9]+}}(%esp) ; X86-NEXT: fnstcw {{[0-9]+}}(%esp)
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; X86-NEXT: orl $3072, %eax # imm = 0xC00
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: movw %ax, {{[0-9]+}}(%esp) ; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: fistpll {{[0-9]+}}(%esp) ; X86-NEXT: fistpll {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp) ; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl %ebp, %esp ; X86-NEXT: movl %ebp, %esp
; X86-NEXT: popl %ebp ; X86-NEXT: popl %ebp
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-X87-LABEL: fptosi_i64_fp80: ; X64-X87-LABEL: fptosi_i64_fp80:
; X64-X87: # %bb.0: ; X64-X87: # %bb.0:
; X64-X87-NEXT: fldt {{[0-9]+}}(%rsp) ; X64-X87-NEXT: fldt {{[0-9]+}}(%rsp)
; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax ; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
; X64-X87-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F ; X64-X87-NEXT: orl $3072, %eax # imm = 0xC00
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movw %ax, -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fistpll -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fistpll -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movq -{{[0-9]+}}(%rsp), %rax ; X64-X87-NEXT: movq -{{[0-9]+}}(%rsp), %rax
; X64-X87-NEXT: retq ; X64-X87-NEXT: retq
; ;
; X64-SSSE3-LABEL: fptosi_i64_fp80: ; X64-SSSE3-LABEL: fptosi_i64_fp80:
; X64-SSSE3: # %bb.0: ; X64-SSSE3: # %bb.0:
; X64-SSSE3-NEXT: fldt {{[0-9]+}}(%rsp) ; X64-SSSE3-NEXT: fldt {{[0-9]+}}(%rsp)
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; X86-NEXT: pushl %ebp ; X86-NEXT: pushl %ebp
; X86-NEXT: movl %esp, %ebp ; X86-NEXT: movl %esp, %ebp
; X86-NEXT: andl $-8, %esp ; X86-NEXT: andl $-8, %esp
; X86-NEXT: subl $16, %esp ; X86-NEXT: subl $16, %esp
; X86-NEXT: movl 8(%ebp), %eax ; X86-NEXT: movl 8(%ebp), %eax
; X86-NEXT: fldt (%eax) ; X86-NEXT: fldt (%eax)
; X86-NEXT: fnstcw {{[0-9]+}}(%esp) ; X86-NEXT: fnstcw {{[0-9]+}}(%esp)
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; X86-NEXT: orl $3072, %eax # imm = 0xC00
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: movw %ax, {{[0-9]+}}(%esp) ; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: fistpll {{[0-9]+}}(%esp) ; X86-NEXT: fistpll {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp) ; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl %ebp, %esp ; X86-NEXT: movl %ebp, %esp
; X86-NEXT: popl %ebp ; X86-NEXT: popl %ebp
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-X87-LABEL: fptosi_i64_fp80_ld: ; X64-X87-LABEL: fptosi_i64_fp80_ld:
; X64-X87: # %bb.0: ; X64-X87: # %bb.0:
; X64-X87-NEXT: fldt (%rdi) ; X64-X87-NEXT: fldt (%rdi)
; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax ; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
; X64-X87-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F ; X64-X87-NEXT: orl $3072, %eax # imm = 0xC00
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movw %ax, -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fistpll -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fistpll -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movq -{{[0-9]+}}(%rsp), %rax ; X64-X87-NEXT: movq -{{[0-9]+}}(%rsp), %rax
; X64-X87-NEXT: retq ; X64-X87-NEXT: retq
; ;
; X64-SSSE3-LABEL: fptosi_i64_fp80_ld: ; X64-SSSE3-LABEL: fptosi_i64_fp80_ld:
; X64-SSSE3: # %bb.0: ; X64-SSSE3: # %bb.0:
; X64-SSSE3-NEXT: fldt (%rdi) ; X64-SSSE3-NEXT: fldt (%rdi)
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; fptoui ; fptoui
; ;
define i16 @fptoui_i16_fp80(x86_fp80 %a0) nounwind { define i16 @fptoui_i16_fp80(x86_fp80 %a0) nounwind {
; X86-LABEL: fptoui_i16_fp80: ; X86-LABEL: fptoui_i16_fp80:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: subl $8, %esp ; X86-NEXT: subl $8, %esp
; X86-NEXT: fldt {{[0-9]+}}(%esp) ; X86-NEXT: fldt {{[0-9]+}}(%esp)
; X86-NEXT: fnstcw {{[0-9]+}}(%esp) ; X86-NEXT: fnstcw (%esp)
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movzwl (%esp), %eax
; X86-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; X86-NEXT: orl $3072, %eax # imm = 0xC00
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: movw %ax, {{[0-9]+}}(%esp) ; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X86-NEXT: fistpl {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp) ; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: fistpl {{[0-9]+}}(%esp)
; X86-NEXT: fldcw (%esp)
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax ; X86-NEXT: # kill: def $ax killed $ax killed $eax
; X86-NEXT: addl $8, %esp ; X86-NEXT: addl $8, %esp
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-X87-LABEL: fptoui_i16_fp80: ; X64-X87-LABEL: fptoui_i16_fp80:
; X64-X87: # %bb.0: ; X64-X87: # %bb.0:
; X64-X87-NEXT: fldt {{[0-9]+}}(%rsp) ; X64-X87-NEXT: fldt {{[0-9]+}}(%rsp)
; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax ; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
; X64-X87-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F ; X64-X87-NEXT: orl $3072, %eax # imm = 0xC00
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movw %ax, -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fistpl -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fistpl -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movl -{{[0-9]+}}(%rsp), %eax ; X64-X87-NEXT: movl -{{[0-9]+}}(%rsp), %eax
; X64-X87-NEXT: # kill: def $ax killed $ax killed $eax ; X64-X87-NEXT: # kill: def $ax killed $ax killed $eax
; X64-X87-NEXT: retq ; X64-X87-NEXT: retq
; ;
; X64-SSSE3-LABEL: fptoui_i16_fp80: ; X64-SSSE3-LABEL: fptoui_i16_fp80:
; X64-SSSE3: # %bb.0: ; X64-SSSE3: # %bb.0:
; X64-SSSE3-NEXT: fldt {{[0-9]+}}(%rsp) ; X64-SSSE3-NEXT: fldt {{[0-9]+}}(%rsp)
; X64-SSSE3-NEXT: fisttpl -{{[0-9]+}}(%rsp) ; X64-SSSE3-NEXT: fisttpl -{{[0-9]+}}(%rsp)
; X64-SSSE3-NEXT: movl -{{[0-9]+}}(%rsp), %eax ; X64-SSSE3-NEXT: movl -{{[0-9]+}}(%rsp), %eax
; X64-SSSE3-NEXT: # kill: def $ax killed $ax killed $eax ; X64-SSSE3-NEXT: # kill: def $ax killed $ax killed $eax
; X64-SSSE3-NEXT: retq ; X64-SSSE3-NEXT: retq
%1 = fptoui x86_fp80 %a0 to i16 %1 = fptoui x86_fp80 %a0 to i16
ret i16 %1 ret i16 %1
} }
define i16 @fptoui_i16_fp80_ld(x86_fp80 *%a0) nounwind { define i16 @fptoui_i16_fp80_ld(x86_fp80 *%a0) nounwind {
; X86-LABEL: fptoui_i16_fp80_ld: ; X86-LABEL: fptoui_i16_fp80_ld:
; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: subl $8, %esp ; X86-NEXT: subl $8, %esp
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: fldt (%eax) ; X86-NEXT: fldt (%eax)
; X86-NEXT: fnstcw {{[0-9]+}}(%esp) ; X86-NEXT: fnstcw (%esp)
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movzwl (%esp), %eax
; X86-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; X86-NEXT: orl $3072, %eax # imm = 0xC00
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: movw %ax, {{[0-9]+}}(%esp) ; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X86-NEXT: fistpl {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp) ; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: fistpl {{[0-9]+}}(%esp)
; X86-NEXT: fldcw (%esp)
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax ; X86-NEXT: # kill: def $ax killed $ax killed $eax
; X86-NEXT: addl $8, %esp ; X86-NEXT: addl $8, %esp
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-X87-LABEL: fptoui_i16_fp80_ld: ; X64-X87-LABEL: fptoui_i16_fp80_ld:
; X64-X87: # %bb.0: ; X64-X87: # %bb.0:
; X64-X87-NEXT: fldt (%rdi) ; X64-X87-NEXT: fldt (%rdi)
; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax ; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
; X64-X87-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F ; X64-X87-NEXT: orl $3072, %eax # imm = 0xC00
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movw %ax, -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fistpl -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fistpl -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movl -{{[0-9]+}}(%rsp), %eax ; X64-X87-NEXT: movl -{{[0-9]+}}(%rsp), %eax
; X64-X87-NEXT: # kill: def $ax killed $ax killed $eax ; X64-X87-NEXT: # kill: def $ax killed $ax killed $eax
; X64-X87-NEXT: retq ; X64-X87-NEXT: retq
; ;
; X64-SSSE3-LABEL: fptoui_i16_fp80_ld: ; X64-SSSE3-LABEL: fptoui_i16_fp80_ld:
; X64-SSSE3: # %bb.0: ; X64-SSSE3: # %bb.0:
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; X86: # %bb.0: ; X86: # %bb.0:
; X86-NEXT: pushl %ebp ; X86-NEXT: pushl %ebp
; X86-NEXT: movl %esp, %ebp ; X86-NEXT: movl %esp, %ebp
; X86-NEXT: andl $-8, %esp ; X86-NEXT: andl $-8, %esp
; X86-NEXT: subl $16, %esp ; X86-NEXT: subl $16, %esp
; X86-NEXT: fldt 8(%ebp) ; X86-NEXT: fldt 8(%ebp)
; X86-NEXT: fnstcw {{[0-9]+}}(%esp) ; X86-NEXT: fnstcw {{[0-9]+}}(%esp)
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; X86-NEXT: orl $3072, %eax # imm = 0xC00
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: movw %ax, {{[0-9]+}}(%esp) ; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: fistpll {{[0-9]+}}(%esp) ; X86-NEXT: fistpll {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp) ; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %ebp, %esp ; X86-NEXT: movl %ebp, %esp
; X86-NEXT: popl %ebp ; X86-NEXT: popl %ebp
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-X87-LABEL: fptoui_i32_fp80: ; X64-X87-LABEL: fptoui_i32_fp80:
; X64-X87: # %bb.0: ; X64-X87: # %bb.0:
; X64-X87-NEXT: fldt {{[0-9]+}}(%rsp) ; X64-X87-NEXT: fldt {{[0-9]+}}(%rsp)
; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax ; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
; X64-X87-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F ; X64-X87-NEXT: orl $3072, %eax # imm = 0xC00
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movw %ax, -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fistpll -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fistpll -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movl -{{[0-9]+}}(%rsp), %eax ; X64-X87-NEXT: movl -{{[0-9]+}}(%rsp), %eax
; X64-X87-NEXT: retq ; X64-X87-NEXT: retq
; ;
; X64-SSSE3-LABEL: fptoui_i32_fp80: ; X64-SSSE3-LABEL: fptoui_i32_fp80:
; X64-SSSE3: # %bb.0: ; X64-SSSE3: # %bb.0:
; X64-SSSE3-NEXT: fldt {{[0-9]+}}(%rsp) ; X64-SSSE3-NEXT: fldt {{[0-9]+}}(%rsp)
Show All 10 Lines
; X86-NEXT: pushl %ebp ; X86-NEXT: pushl %ebp
; X86-NEXT: movl %esp, %ebp ; X86-NEXT: movl %esp, %ebp
; X86-NEXT: andl $-8, %esp ; X86-NEXT: andl $-8, %esp
; X86-NEXT: subl $16, %esp ; X86-NEXT: subl $16, %esp
; X86-NEXT: movl 8(%ebp), %eax ; X86-NEXT: movl 8(%ebp), %eax
; X86-NEXT: fldt (%eax) ; X86-NEXT: fldt (%eax)
; X86-NEXT: fnstcw {{[0-9]+}}(%esp) ; X86-NEXT: fnstcw {{[0-9]+}}(%esp)
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; X86-NEXT: orl $3072, %eax # imm = 0xC00
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: movw %ax, {{[0-9]+}}(%esp) ; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: fistpll {{[0-9]+}}(%esp) ; X86-NEXT: fistpll {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp) ; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %ebp, %esp ; X86-NEXT: movl %ebp, %esp
; X86-NEXT: popl %ebp ; X86-NEXT: popl %ebp
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-X87-LABEL: fptoui_i32_fp80_ld: ; X64-X87-LABEL: fptoui_i32_fp80_ld:
; X64-X87: # %bb.0: ; X64-X87: # %bb.0:
; X64-X87-NEXT: fldt (%rdi) ; X64-X87-NEXT: fldt (%rdi)
; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax ; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
; X64-X87-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F ; X64-X87-NEXT: orl $3072, %eax # imm = 0xC00
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movw %ax, -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fistpll -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fistpll -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movl -{{[0-9]+}}(%rsp), %eax ; X64-X87-NEXT: movl -{{[0-9]+}}(%rsp), %eax
; X64-X87-NEXT: retq ; X64-X87-NEXT: retq
; ;
; X64-SSSE3-LABEL: fptoui_i32_fp80_ld: ; X64-SSSE3-LABEL: fptoui_i32_fp80_ld:
; X64-SSSE3: # %bb.0: ; X64-SSSE3: # %bb.0:
; X64-SSSE3-NEXT: fldt (%rdi) ; X64-SSSE3-NEXT: fldt (%rdi)
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; X86-NEXT: ja .LBB10_2 ; X86-NEXT: ja .LBB10_2
; X86-NEXT: # %bb.1: ; X86-NEXT: # %bb.1:
; X86-NEXT: fstp %st(1) ; X86-NEXT: fstp %st(1)
; X86-NEXT: fldz ; X86-NEXT: fldz
; X86-NEXT: .LBB10_2: ; X86-NEXT: .LBB10_2:
; X86-NEXT: fstp %st(0) ; X86-NEXT: fstp %st(0)
; X86-NEXT: fnstcw {{[0-9]+}}(%esp) ; X86-NEXT: fnstcw {{[0-9]+}}(%esp)
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; X86-NEXT: xorl %edx, %edx
; X86-NEXT: fldcw {{[0-9]+}}(%esp) ; X86-NEXT: orl $3072, %eax # imm = 0xC00
; X86-NEXT: movw %ax, {{[0-9]+}}(%esp) ; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: fistpll {{[0-9]+}}(%esp) ; X86-NEXT: fistpll {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp) ; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: setbe %al ; X86-NEXT: setbe %dl
; X86-NEXT: movzbl %al, %edx
; X86-NEXT: shll $31, %edx ; X86-NEXT: shll $31, %edx
; X86-NEXT: xorl {{[0-9]+}}(%esp), %edx ; X86-NEXT: xorl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %ebp, %esp ; X86-NEXT: movl %ebp, %esp
; X86-NEXT: popl %ebp ; X86-NEXT: popl %ebp
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-X87-LABEL: fptoui_i64_fp80: ; X64-X87-LABEL: fptoui_i64_fp80:
; X64-X87: # %bb.0: ; X64-X87: # %bb.0:
; X64-X87-NEXT: fldt {{[0-9]+}}(%rsp) ; X64-X87-NEXT: fldt {{[0-9]+}}(%rsp)
; X64-X87-NEXT: flds {{.*}}(%rip) ; X64-X87-NEXT: flds {{.*}}(%rip)
; X64-X87-NEXT: fld %st(1) ; X64-X87-NEXT: fld %st(1)
; X64-X87-NEXT: fsub %st(1), %st ; X64-X87-NEXT: fsub %st(1), %st
; X64-X87-NEXT: xorl %eax, %eax
; X64-X87-NEXT: fxch %st(1) ; X64-X87-NEXT: fxch %st(1)
; X64-X87-NEXT: fucompi %st(2), %st ; X64-X87-NEXT: fucompi %st(2), %st
; X64-X87-NEXT: fcmovnbe %st(1), %st ; X64-X87-NEXT: fcmovnbe %st(1), %st
; X64-X87-NEXT: fstp %st(1) ; X64-X87-NEXT: fstp %st(1)
; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %ecx ; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %ecx
; X64-X87-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F ; X64-X87-NEXT: xorl %eax, %eax
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: orl $3072, %ecx # imm = 0xC00
; X64-X87-NEXT: movw %cx, -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: movw %cx, -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fistpll -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fistpll -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: setbe %al ; X64-X87-NEXT: setbe %al
; X64-X87-NEXT: shlq $63, %rax ; X64-X87-NEXT: shlq $63, %rax
; X64-X87-NEXT: xorq -{{[0-9]+}}(%rsp), %rax ; X64-X87-NEXT: xorq -{{[0-9]+}}(%rsp), %rax
; X64-X87-NEXT: retq ; X64-X87-NEXT: retq
; ;
; X64-SSSE3-LABEL: fptoui_i64_fp80: ; X64-SSSE3-LABEL: fptoui_i64_fp80:
Show All 36 Lines
; X86-NEXT: ja .LBB11_2 ; X86-NEXT: ja .LBB11_2
; X86-NEXT: # %bb.1: ; X86-NEXT: # %bb.1:
; X86-NEXT: fstp %st(1) ; X86-NEXT: fstp %st(1)
; X86-NEXT: fldz ; X86-NEXT: fldz
; X86-NEXT: .LBB11_2: ; X86-NEXT: .LBB11_2:
; X86-NEXT: fstp %st(0) ; X86-NEXT: fstp %st(0)
; X86-NEXT: fnstcw {{[0-9]+}}(%esp) ; X86-NEXT: fnstcw {{[0-9]+}}(%esp)
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; X86-NEXT: xorl %edx, %edx
; X86-NEXT: fldcw {{[0-9]+}}(%esp) ; X86-NEXT: orl $3072, %eax # imm = 0xC00
; X86-NEXT: movw %ax, {{[0-9]+}}(%esp) ; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: fistpll {{[0-9]+}}(%esp) ; X86-NEXT: fistpll {{[0-9]+}}(%esp)
; X86-NEXT: fldcw {{[0-9]+}}(%esp) ; X86-NEXT: fldcw {{[0-9]+}}(%esp)
; X86-NEXT: setbe %al ; X86-NEXT: setbe %dl
; X86-NEXT: movzbl %al, %edx
; X86-NEXT: shll $31, %edx ; X86-NEXT: shll $31, %edx
; X86-NEXT: xorl {{[0-9]+}}(%esp), %edx ; X86-NEXT: xorl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %ebp, %esp ; X86-NEXT: movl %ebp, %esp
; X86-NEXT: popl %ebp ; X86-NEXT: popl %ebp
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-X87-LABEL: fptoui_i64_fp80_ld: ; X64-X87-LABEL: fptoui_i64_fp80_ld:
; X64-X87: # %bb.0: ; X64-X87: # %bb.0:
; X64-X87-NEXT: fldt (%rdi) ; X64-X87-NEXT: fldt (%rdi)
; X64-X87-NEXT: flds {{.*}}(%rip) ; X64-X87-NEXT: flds {{.*}}(%rip)
; X64-X87-NEXT: fld %st(1) ; X64-X87-NEXT: fld %st(1)
; X64-X87-NEXT: fsub %st(1), %st ; X64-X87-NEXT: fsub %st(1), %st
; X64-X87-NEXT: xorl %eax, %eax
; X64-X87-NEXT: fxch %st(1) ; X64-X87-NEXT: fxch %st(1)
; X64-X87-NEXT: fucompi %st(2), %st ; X64-X87-NEXT: fucompi %st(2), %st
; X64-X87-NEXT: fcmovnbe %st(1), %st ; X64-X87-NEXT: fcmovnbe %st(1), %st
; X64-X87-NEXT: fstp %st(1) ; X64-X87-NEXT: fstp %st(1)
; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %ecx ; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %ecx
; X64-X87-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F ; X64-X87-NEXT: xorl %eax, %eax
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: orl $3072, %ecx # imm = 0xC00
; X64-X87-NEXT: movw %cx, -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: movw %cx, -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fistpll -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fistpll -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp)
; X64-X87-NEXT: setbe %al ; X64-X87-NEXT: setbe %al
; X64-X87-NEXT: shlq $63, %rax ; X64-X87-NEXT: shlq $63, %rax
; X64-X87-NEXT: xorq -{{[0-9]+}}(%rsp), %rax ; X64-X87-NEXT: xorq -{{[0-9]+}}(%rsp), %rax
; X64-X87-NEXT: retq ; X64-X87-NEXT: retq
; ;
; X64-SSSE3-LABEL: fptoui_i64_fp80_ld: ; X64-SSSE3-LABEL: fptoui_i64_fp80_ld:
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llvm/trunk/test/CodeGen/X86/inline-asm-fpstack.ll

Show First 20 Lines • Show All 449 Lines • ▼ Show 20 Lines
; CHECK-NEXT: ## %bb.1: ## %sw.bb4.i ; CHECK-NEXT: ## %bb.1: ## %sw.bb4.i
; CHECK-NEXT: ## InlineAsm Start ; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: frndint ; CHECK-NEXT: frndint
; CHECK-NEXT: ## InlineAsm End ; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: ## InlineAsm Start ; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: fldcw (%eax) ; CHECK-NEXT: fldcw (%eax)
; CHECK-NEXT: ## InlineAsm End ; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: LBB20_2: ## %_Z5tointRKe.exit ; CHECK-NEXT: LBB20_2: ## %_Z5tointRKe.exit
; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp) ; CHECK-NEXT: fnstcw (%esp)
; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; CHECK-NEXT: movzwl (%esp), %eax
; CHECK-NEXT: movw $3199, {{[0-9]+}}(%esp) ## imm = 0xC7F ; CHECK-NEXT: orl $3072, %eax ## imm = 0xC00
; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp) ; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp)
; CHECK-NEXT: fistpl {{[0-9]+}}(%esp)
; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) ; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
; CHECK-NEXT: fistpl {{[0-9]+}}(%esp)
; CHECK-NEXT: fldcw (%esp)
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp) ; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp)
; CHECK-NEXT: fildl {{[0-9]+}}(%esp) ; CHECK-NEXT: fildl {{[0-9]+}}(%esp)
; CHECK-NEXT: movl L_fpu$non_lazy_ptr, %eax ; CHECK-NEXT: movl L_fpu$non_lazy_ptr, %eax
; CHECK-NEXT: fstpt 128(%eax) ; CHECK-NEXT: fstpt 128(%eax)
; CHECK-NEXT: addl $12, %esp ; CHECK-NEXT: addl $12, %esp
; CHECK-NEXT: retl ; CHECK-NEXT: retl
entry: entry:
Show All 36 Lines

llvm/trunk/test/CodeGen/X86/pr34080-2.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i386-unknown-openbsd6.2 | FileCheck %s ; RUN: llc < %s -mtriple=i386-unknown-openbsd6.2 | FileCheck %s
%struct.DateTime = type { i64, i32, i32, i32, i32, i32, double, i8 } %struct.DateTime = type { i64, i32, i32, i32, i32, i32, double, i8 }
define void @computeJD(%struct.DateTime*) nounwind { define void @computeJD(%struct.DateTime*) nounwind {
; CHECK-LABEL: computeJD: ; CHECK-LABEL: computeJD:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: pushl %ebp ; CHECK-NEXT: pushl %ebp
; CHECK-NEXT: movl %esp, %ebp ; CHECK-NEXT: movl %esp, %ebp
; CHECK-NEXT: pushl %ebx ; CHECK-NEXT: pushl %ebx
; CHECK-NEXT: pushl %edi ; CHECK-NEXT: pushl %edi
; CHECK-NEXT: pushl %esi ; CHECK-NEXT: pushl %esi
; CHECK-NEXT: andl $-8, %esp ; CHECK-NEXT: andl $-8, %esp
; CHECK-NEXT: subl $32, %esp ; CHECK-NEXT: subl $40, %esp
; CHECK-NEXT: movl 8(%ebp), %ebx ; CHECK-NEXT: movl 8(%ebp), %ebx
; CHECK-NEXT: movl 8(%ebx), %esi ; CHECK-NEXT: movl 8(%ebx), %esi
; CHECK-NEXT: xorl %eax, %eax ; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl $3, 12(%ebx) ; CHECK-NEXT: cmpl $3, 12(%ebx)
; CHECK-NEXT: setl %al ; CHECK-NEXT: setl %al
; CHECK-NEXT: subl %eax, %esi ; CHECK-NEXT: subl %eax, %esi
; CHECK-NEXT: movl $-1374389535, %ecx # imm = 0xAE147AE1 ; CHECK-NEXT: movl $-1374389535, %ecx # imm = 0xAE147AE1
; CHECK-NEXT: movl %esi, %eax ; CHECK-NEXT: movl %esi, %eax
Show All 23 Lines
; CHECK-NEXT: addl %edi, %ecx ; CHECK-NEXT: addl %edi, %ecx
; CHECK-NEXT: leal 257(%ecx,%edx), %eax ; CHECK-NEXT: leal 257(%ecx,%edx), %eax
; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp) ; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp)
; CHECK-NEXT: fildl {{[0-9]+}}(%esp) ; CHECK-NEXT: fildl {{[0-9]+}}(%esp)
; CHECK-NEXT: fadds {{\.LCPI.*}} ; CHECK-NEXT: fadds {{\.LCPI.*}}
; CHECK-NEXT: fmuls {{\.LCPI.*}} ; CHECK-NEXT: fmuls {{\.LCPI.*}}
; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp) ; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp)
; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; CHECK-NEXT: orl $3072, %eax # imm = 0xC00
; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp) ; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp)
; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
; CHECK-NEXT: fistpll {{[0-9]+}}(%esp) ; CHECK-NEXT: fistpll {{[0-9]+}}(%esp)
; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) ; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
; CHECK-NEXT: movb $1, 36(%ebx) ; CHECK-NEXT: movb $1, 36(%ebx)
; CHECK-NEXT: imull $3600000, 20(%ebx), %eax # imm = 0x36EE80 ; CHECK-NEXT: imull $3600000, 20(%ebx), %eax # imm = 0x36EE80
; CHECK-NEXT: imull $60000, 24(%ebx), %ecx # imm = 0xEA60 ; CHECK-NEXT: imull $60000, 24(%ebx), %ecx # imm = 0xEA60
; CHECK-NEXT: addl %eax, %ecx ; CHECK-NEXT: addl %eax, %ecx
; CHECK-NEXT: fldl 28(%ebx) ; CHECK-NEXT: fldl 28(%ebx)
; CHECK-NEXT: fmuls {{\.LCPI.*}} ; CHECK-NEXT: fmuls {{\.LCPI.*}}
; CHECK-NEXT: fnstcw (%esp) ; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp)
; CHECK-NEXT: movzwl (%esp), %eax ; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movw $3199, (%esp) # imm = 0xC7F ; CHECK-NEXT: orl $3072, %eax # imm = 0xC00
; CHECK-NEXT: fldcw (%esp) ; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp)
; CHECK-NEXT: movw %ax, (%esp)
; CHECK-NEXT: movl %ecx, %eax ; CHECK-NEXT: movl %ecx, %eax
; CHECK-NEXT: sarl $31, %eax ; CHECK-NEXT: sarl $31, %eax
; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
; CHECK-NEXT: fistpll {{[0-9]+}}(%esp) ; CHECK-NEXT: fistpll {{[0-9]+}}(%esp)
; CHECK-NEXT: fldcw (%esp) ; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
; CHECK-NEXT: addl {{[0-9]+}}(%esp), %ecx ; CHECK-NEXT: addl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: adcl {{[0-9]+}}(%esp), %eax ; CHECK-NEXT: adcl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: addl {{[0-9]+}}(%esp), %ecx ; CHECK-NEXT: addl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: adcl {{[0-9]+}}(%esp), %eax ; CHECK-NEXT: adcl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl %ecx, (%ebx) ; CHECK-NEXT: movl %ecx, (%ebx)
; CHECK-NEXT: movl %eax, 4(%ebx) ; CHECK-NEXT: movl %eax, 4(%ebx)
; CHECK-NEXT: leal -12(%ebp), %esp ; CHECK-NEXT: leal -12(%ebp), %esp
; CHECK-NEXT: popl %esi ; CHECK-NEXT: popl %esi
▲ Show 20 Lines • Show All 54 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/X86/pr34080.ll

Show All 11 Lines
; SSE2-NEXT: pushq %rbp ; SSE2-NEXT: pushq %rbp
; SSE2-NEXT: .cfi_def_cfa_offset 16 ; SSE2-NEXT: .cfi_def_cfa_offset 16
; SSE2-NEXT: .cfi_offset %rbp, -16 ; SSE2-NEXT: .cfi_offset %rbp, -16
; SSE2-NEXT: movq %rsp, %rbp ; SSE2-NEXT: movq %rsp, %rbp
; SSE2-NEXT: .cfi_def_cfa_register %rbp ; SSE2-NEXT: .cfi_def_cfa_register %rbp
; SSE2-NEXT: fldt 16(%rbp) ; SSE2-NEXT: fldt 16(%rbp)
; SSE2-NEXT: fnstcw -4(%rbp) ; SSE2-NEXT: fnstcw -4(%rbp)
; SSE2-NEXT: movzwl -4(%rbp), %eax ; SSE2-NEXT: movzwl -4(%rbp), %eax
; SSE2-NEXT: movw $3199, -4(%rbp) ## imm = 0xC7F ; SSE2-NEXT: orl $3072, %eax ## imm = 0xC00
; SSE2-NEXT: fldcw -4(%rbp) ; SSE2-NEXT: movw %ax, -8(%rbp)
; SSE2-NEXT: movw %ax, -4(%rbp) ; SSE2-NEXT: fldcw -8(%rbp)
; SSE2-NEXT: fistl -8(%rbp) ; SSE2-NEXT: fistl -12(%rbp)
; SSE2-NEXT: fldcw -4(%rbp) ; SSE2-NEXT: fldcw -4(%rbp)
; SSE2-NEXT: cvtsi2sdl -8(%rbp), %xmm0 ; SSE2-NEXT: cvtsi2sdl -12(%rbp), %xmm0
; SSE2-NEXT: movsd %xmm0, -64(%rbp) ; SSE2-NEXT: movsd %xmm0, -64(%rbp)
; SSE2-NEXT: movsd %xmm0, -32(%rbp) ; SSE2-NEXT: movsd %xmm0, -32(%rbp)
; SSE2-NEXT: fsubl -32(%rbp) ; SSE2-NEXT: fsubl -32(%rbp)
; SSE2-NEXT: flds {{.*}}(%rip) ; SSE2-NEXT: flds {{.*}}(%rip)
; SSE2-NEXT: fmul %st, %st(1) ; SSE2-NEXT: fmul %st, %st(1)
; SSE2-NEXT: fnstcw -2(%rbp) ; SSE2-NEXT: fnstcw -2(%rbp)
; SSE2-NEXT: movzwl -2(%rbp), %eax ; SSE2-NEXT: movzwl -2(%rbp), %eax
; SSE2-NEXT: movw $3199, -2(%rbp) ## imm = 0xC7F ; SSE2-NEXT: orl $3072, %eax ## imm = 0xC00
; SSE2-NEXT: fldcw -2(%rbp) ; SSE2-NEXT: movw %ax, -6(%rbp)
; SSE2-NEXT: movw %ax, -2(%rbp) ; SSE2-NEXT: fldcw -6(%rbp)
; SSE2-NEXT: fxch %st(1) ; SSE2-NEXT: fxch %st(1)
; SSE2-NEXT: fistl -12(%rbp) ; SSE2-NEXT: fistl -16(%rbp)
; SSE2-NEXT: fldcw -2(%rbp) ; SSE2-NEXT: fldcw -2(%rbp)
; SSE2-NEXT: xorps %xmm0, %xmm0 ; SSE2-NEXT: xorps %xmm0, %xmm0
; SSE2-NEXT: cvtsi2sdl -12(%rbp), %xmm0 ; SSE2-NEXT: cvtsi2sdl -16(%rbp), %xmm0
; SSE2-NEXT: movsd %xmm0, -56(%rbp) ; SSE2-NEXT: movsd %xmm0, -56(%rbp)
; SSE2-NEXT: movsd %xmm0, -24(%rbp) ; SSE2-NEXT: movsd %xmm0, -24(%rbp)
; SSE2-NEXT: fsubl -24(%rbp) ; SSE2-NEXT: fsubl -24(%rbp)
; SSE2-NEXT: fmulp %st, %st(1) ; SSE2-NEXT: fmulp %st, %st(1)
; SSE2-NEXT: fstpl -48(%rbp) ; SSE2-NEXT: fstpl -48(%rbp)
; SSE2-NEXT: popq %rbp ; SSE2-NEXT: popq %rbp
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSE2-SCHEDULE-LABEL: _Z1fe: ; SSE2-SCHEDULE-LABEL: _Z1fe:
; SSE2-SCHEDULE: ## %bb.0: ## %entry ; SSE2-SCHEDULE: ## %bb.0: ## %entry
; SSE2-SCHEDULE-NEXT: pushq %rbp ; SSE2-SCHEDULE-NEXT: pushq %rbp
; SSE2-SCHEDULE-NEXT: .cfi_def_cfa_offset 16 ; SSE2-SCHEDULE-NEXT: .cfi_def_cfa_offset 16
; SSE2-SCHEDULE-NEXT: .cfi_offset %rbp, -16 ; SSE2-SCHEDULE-NEXT: .cfi_offset %rbp, -16
; SSE2-SCHEDULE-NEXT: movq %rsp, %rbp ; SSE2-SCHEDULE-NEXT: movq %rsp, %rbp
; SSE2-SCHEDULE-NEXT: .cfi_def_cfa_register %rbp ; SSE2-SCHEDULE-NEXT: .cfi_def_cfa_register %rbp
; SSE2-SCHEDULE-NEXT: fnstcw -4(%rbp)
; SSE2-SCHEDULE-NEXT: fldt 16(%rbp) ; SSE2-SCHEDULE-NEXT: fldt 16(%rbp)
; SSE2-SCHEDULE-NEXT: fnstcw -4(%rbp)
; SSE2-SCHEDULE-NEXT: movzwl -4(%rbp), %eax ; SSE2-SCHEDULE-NEXT: movzwl -4(%rbp), %eax
; SSE2-SCHEDULE-NEXT: movw $3199, -4(%rbp) ## imm = 0xC7F ; SSE2-SCHEDULE-NEXT: orl $3072, %eax ## imm = 0xC00
; SSE2-SCHEDULE-NEXT: fldcw -4(%rbp) ; SSE2-SCHEDULE-NEXT: movw %ax, -8(%rbp)
; SSE2-SCHEDULE-NEXT: movw %ax, -4(%rbp) ; SSE2-SCHEDULE-NEXT: fldcw -8(%rbp)
; SSE2-SCHEDULE-NEXT: fistl -8(%rbp) ; SSE2-SCHEDULE-NEXT: fistl -12(%rbp)
; SSE2-SCHEDULE-NEXT: fldcw -4(%rbp) ; SSE2-SCHEDULE-NEXT: fldcw -4(%rbp)
; SSE2-SCHEDULE-NEXT: cvtsi2sdl -8(%rbp), %xmm0 ; SSE2-SCHEDULE-NEXT: cvtsi2sdl -12(%rbp), %xmm0
; SSE2-SCHEDULE-NEXT: movsd %xmm0, -64(%rbp) ; SSE2-SCHEDULE-NEXT: movsd %xmm0, -64(%rbp)
; SSE2-SCHEDULE-NEXT: movsd %xmm0, -32(%rbp) ; SSE2-SCHEDULE-NEXT: movsd %xmm0, -32(%rbp)
; SSE2-SCHEDULE-NEXT: fsubl -32(%rbp) ; SSE2-SCHEDULE-NEXT: fsubl -32(%rbp)
; SSE2-SCHEDULE-NEXT: flds {{.*}}(%rip) ; SSE2-SCHEDULE-NEXT: flds {{.*}}(%rip)
; SSE2-SCHEDULE-NEXT: fnstcw -2(%rbp)
; SSE2-SCHEDULE-NEXT: fmul %st, %st(1) ; SSE2-SCHEDULE-NEXT: fmul %st, %st(1)
; SSE2-SCHEDULE-NEXT: fnstcw -2(%rbp)
; SSE2-SCHEDULE-NEXT: movzwl -2(%rbp), %eax ; SSE2-SCHEDULE-NEXT: movzwl -2(%rbp), %eax
; SSE2-SCHEDULE-NEXT: movw $3199, -2(%rbp) ## imm = 0xC7F ; SSE2-SCHEDULE-NEXT: orl $3072, %eax ## imm = 0xC00
; SSE2-SCHEDULE-NEXT: fldcw -2(%rbp) ; SSE2-SCHEDULE-NEXT: movw %ax, -6(%rbp)
; SSE2-SCHEDULE-NEXT: movw %ax, -2(%rbp) ; SSE2-SCHEDULE-NEXT: fldcw -6(%rbp)
; SSE2-SCHEDULE-NEXT: fxch %st(1) ; SSE2-SCHEDULE-NEXT: fxch %st(1)
; SSE2-SCHEDULE-NEXT: fistl -12(%rbp) ; SSE2-SCHEDULE-NEXT: fistl -16(%rbp)
; SSE2-SCHEDULE-NEXT: fldcw -2(%rbp) ; SSE2-SCHEDULE-NEXT: fldcw -2(%rbp)
; SSE2-SCHEDULE-NEXT: xorps %xmm0, %xmm0 ; SSE2-SCHEDULE-NEXT: xorps %xmm0, %xmm0
; SSE2-SCHEDULE-NEXT: cvtsi2sdl -12(%rbp), %xmm0 ; SSE2-SCHEDULE-NEXT: cvtsi2sdl -16(%rbp), %xmm0
; SSE2-SCHEDULE-NEXT: movsd %xmm0, -56(%rbp) ; SSE2-SCHEDULE-NEXT: movsd %xmm0, -56(%rbp)
; SSE2-SCHEDULE-NEXT: movsd %xmm0, -24(%rbp) ; SSE2-SCHEDULE-NEXT: movsd %xmm0, -24(%rbp)
; SSE2-SCHEDULE-NEXT: fsubl -24(%rbp) ; SSE2-SCHEDULE-NEXT: fsubl -24(%rbp)
; SSE2-SCHEDULE-NEXT: fmulp %st, %st(1) ; SSE2-SCHEDULE-NEXT: fmulp %st, %st(1)
; SSE2-SCHEDULE-NEXT: fstpl -48(%rbp) ; SSE2-SCHEDULE-NEXT: fstpl -48(%rbp)
; SSE2-SCHEDULE-NEXT: popq %rbp ; SSE2-SCHEDULE-NEXT: popq %rbp
; SSE2-SCHEDULE-NEXT: retq ; SSE2-SCHEDULE-NEXT: retq
; ;
▲ Show 20 Lines • Show All 80 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/X86/pr40529.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-linux -mcpu=x86-64 | FileCheck %s ; RUN: llc < %s -mtriple=x86_64-unknown-linux -mcpu=x86-64 | FileCheck %s
define x86_fp80 @rem_pio2l_min(x86_fp80 %z) { define x86_fp80 @rem_pio2l_min(x86_fp80 %z) {
; CHECK-LABEL: rem_pio2l_min: ; CHECK-LABEL: rem_pio2l_min:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; CHECK-NEXT: fldt {{[0-9]+}}(%rsp) ; CHECK-NEXT: fldt {{[0-9]+}}(%rsp)
; CHECK-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F ; CHECK-NEXT: orl $3072, %eax # imm = 0xC00
; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movw %ax, -{{[0-9]+}}(%rsp) ; CHECK-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp)
; CHECK-NEXT: fistl -{{[0-9]+}}(%rsp) ; CHECK-NEXT: fistl -{{[0-9]+}}(%rsp)
; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp) ; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movl -{{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl -{{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movl %eax, -{{[0-9]+}}(%rsp) ; CHECK-NEXT: movl %eax, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: fisubl -{{[0-9]+}}(%rsp) ; CHECK-NEXT: fisubl -{{[0-9]+}}(%rsp)
; CHECK-NEXT: flds {{.*}}(%rip) ; CHECK-NEXT: flds {{.*}}(%rip)
; CHECK-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; CHECK-NEXT: fmul %st, %st(1) ; CHECK-NEXT: fmul %st, %st(1)
; CHECK-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F ; CHECK-NEXT: orl $3072, %eax # imm = 0xC00
; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movw %ax, -{{[0-9]+}}(%rsp) ; CHECK-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp)
; CHECK-NEXT: fxch %st(1) ; CHECK-NEXT: fxch %st(1)
; CHECK-NEXT: fistl -{{[0-9]+}}(%rsp) ; CHECK-NEXT: fistl -{{[0-9]+}}(%rsp)
; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp) ; CHECK-NEXT: fldcw -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movl -{{[0-9]+}}(%rsp), %eax ; CHECK-NEXT: movl -{{[0-9]+}}(%rsp), %eax
; CHECK-NEXT: movl %eax, -{{[0-9]+}}(%rsp) ; CHECK-NEXT: movl %eax, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: fisubl -{{[0-9]+}}(%rsp) ; CHECK-NEXT: fisubl -{{[0-9]+}}(%rsp)
; CHECK-NEXT: fmulp %st, %st(1) ; CHECK-NEXT: fmulp %st, %st(1)
; CHECK-NEXT: retq ; CHECK-NEXT: retq
Show All 11 Lines

llvm/trunk/test/CodeGen/X86/scalar-fp-to-i64.ll

Show First 20 Lines • Show All 192 Lines • ▼ Show 20 Lines
; SSE2_32_WIN: # %bb.0: ; SSE2_32_WIN: # %bb.0:
; SSE2_32_WIN-NEXT: pushl %ebp ; SSE2_32_WIN-NEXT: pushl %ebp
; SSE2_32_WIN-NEXT: movl %esp, %ebp ; SSE2_32_WIN-NEXT: movl %esp, %ebp
; SSE2_32_WIN-NEXT: andl $-8, %esp ; SSE2_32_WIN-NEXT: andl $-8, %esp
; SSE2_32_WIN-NEXT: subl $24, %esp ; SSE2_32_WIN-NEXT: subl $24, %esp
; SSE2_32_WIN-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; SSE2_32_WIN-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; SSE2_32_WIN-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero ; SSE2_32_WIN-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; SSE2_32_WIN-NEXT: movaps %xmm0, %xmm2 ; SSE2_32_WIN-NEXT: movaps %xmm0, %xmm2
; SSE2_32_WIN-NEXT: cmpltss %xmm1, %xmm2 ; SSE2_32_WIN-NEXT: subss %xmm1, %xmm2
; SSE2_32_WIN-NEXT: movaps %xmm2, %xmm3 ; SSE2_32_WIN-NEXT: movaps %xmm0, %xmm3
; SSE2_32_WIN-NEXT: andps %xmm0, %xmm2 ; SSE2_32_WIN-NEXT: cmpltss %xmm1, %xmm3
; SSE2_32_WIN-NEXT: xorl %edx, %edx ; SSE2_32_WIN-NEXT: movaps %xmm3, %xmm4
; SSE2_32_WIN-NEXT: ucomiss %xmm0, %xmm1 ; SSE2_32_WIN-NEXT: andnps %xmm2, %xmm4
; SSE2_32_WIN-NEXT: subss %xmm1, %xmm0 ; SSE2_32_WIN-NEXT: andps %xmm0, %xmm3
; SSE2_32_WIN-NEXT: andnps %xmm0, %xmm3 ; SSE2_32_WIN-NEXT: orps %xmm4, %xmm3
; SSE2_32_WIN-NEXT: orps %xmm3, %xmm2 ; SSE2_32_WIN-NEXT: movss %xmm3, {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: movss %xmm2, {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: flds {{[0-9]+}}(%esp) ; SSE2_32_WIN-NEXT: flds {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fnstcw {{[0-9]+}}(%esp) ; SSE2_32_WIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; SSE2_32_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; SSE2_32_WIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; SSE2_32_WIN-NEXT: orl $3072, %eax # imm = 0xC00
; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp) ; SSE2_32_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fistpll {{[0-9]+}}(%esp) ; SSE2_32_WIN-NEXT: fistpll {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp) ; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: xorl %edx, %edx
; SSE2_32_WIN-NEXT: ucomiss %xmm0, %xmm1
; SSE2_32_WIN-NEXT: setbe %dl ; SSE2_32_WIN-NEXT: setbe %dl
; SSE2_32_WIN-NEXT: shll $31, %edx ; SSE2_32_WIN-NEXT: shll $31, %edx
; SSE2_32_WIN-NEXT: xorl {{[0-9]+}}(%esp), %edx ; SSE2_32_WIN-NEXT: xorl {{[0-9]+}}(%esp), %edx
; SSE2_32_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax ; SSE2_32_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax
; SSE2_32_WIN-NEXT: movl %ebp, %esp ; SSE2_32_WIN-NEXT: movl %ebp, %esp
; SSE2_32_WIN-NEXT: popl %ebp ; SSE2_32_WIN-NEXT: popl %ebp
; SSE2_32_WIN-NEXT: retl ; SSE2_32_WIN-NEXT: retl
; ;
; SSE2_32_LIN-LABEL: f_to_u64: ; SSE2_32_LIN-LABEL: f_to_u64:
; SSE2_32_LIN: # %bb.0: ; SSE2_32_LIN: # %bb.0:
; SSE2_32_LIN-NEXT: subl $28, %esp ; SSE2_32_LIN-NEXT: subl $28, %esp
; SSE2_32_LIN-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; SSE2_32_LIN-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; SSE2_32_LIN-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero ; SSE2_32_LIN-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; SSE2_32_LIN-NEXT: movaps %xmm0, %xmm2 ; SSE2_32_LIN-NEXT: movaps %xmm0, %xmm2
; SSE2_32_LIN-NEXT: cmpltss %xmm1, %xmm2 ; SSE2_32_LIN-NEXT: subss %xmm1, %xmm2
; SSE2_32_LIN-NEXT: movaps %xmm2, %xmm3 ; SSE2_32_LIN-NEXT: movaps %xmm0, %xmm3
; SSE2_32_LIN-NEXT: andps %xmm0, %xmm2 ; SSE2_32_LIN-NEXT: cmpltss %xmm1, %xmm3
; SSE2_32_LIN-NEXT: xorl %edx, %edx ; SSE2_32_LIN-NEXT: movaps %xmm3, %xmm4
; SSE2_32_LIN-NEXT: ucomiss %xmm0, %xmm1 ; SSE2_32_LIN-NEXT: andnps %xmm2, %xmm4
; SSE2_32_LIN-NEXT: subss %xmm1, %xmm0 ; SSE2_32_LIN-NEXT: andps %xmm0, %xmm3
; SSE2_32_LIN-NEXT: andnps %xmm0, %xmm3 ; SSE2_32_LIN-NEXT: orps %xmm4, %xmm3
; SSE2_32_LIN-NEXT: orps %xmm3, %xmm2 ; SSE2_32_LIN-NEXT: movss %xmm3, {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: movss %xmm2, {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: flds {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: flds {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fnstcw {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; SSE2_32_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; SSE2_32_LIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; SSE2_32_LIN-NEXT: orl $3072, %eax # imm = 0xC00
; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fistpll {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: fistpll {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: xorl %edx, %edx
; SSE2_32_LIN-NEXT: ucomiss %xmm0, %xmm1
; SSE2_32_LIN-NEXT: setbe %dl ; SSE2_32_LIN-NEXT: setbe %dl
; SSE2_32_LIN-NEXT: shll $31, %edx ; SSE2_32_LIN-NEXT: shll $31, %edx
; SSE2_32_LIN-NEXT: xorl {{[0-9]+}}(%esp), %edx ; SSE2_32_LIN-NEXT: xorl {{[0-9]+}}(%esp), %edx
; SSE2_32_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax ; SSE2_32_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax
; SSE2_32_LIN-NEXT: addl $28, %esp ; SSE2_32_LIN-NEXT: addl $28, %esp
; SSE2_32_LIN-NEXT: retl ; SSE2_32_LIN-NEXT: retl
; ;
; SSE2_64-LABEL: f_to_u64: ; SSE2_64-LABEL: f_to_u64:
Show All 27 Lines
; X87_WIN-NEXT: ja LBB0_2 ; X87_WIN-NEXT: ja LBB0_2
; X87_WIN-NEXT: # %bb.1: ; X87_WIN-NEXT: # %bb.1:
; X87_WIN-NEXT: fstp %st(1) ; X87_WIN-NEXT: fstp %st(1)
; X87_WIN-NEXT: fldz ; X87_WIN-NEXT: fldz
; X87_WIN-NEXT: LBB0_2: ; X87_WIN-NEXT: LBB0_2:
; X87_WIN-NEXT: fstp %st(0) ; X87_WIN-NEXT: fstp %st(0)
; X87_WIN-NEXT: fnstcw {{[0-9]+}}(%esp) ; X87_WIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; X87_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X87_WIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; X87_WIN-NEXT: xorl %edx, %edx
; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp) ; X87_WIN-NEXT: orl $3072, %eax # imm = 0xC00
; X87_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp) ; X87_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: fistpll {{[0-9]+}}(%esp) ; X87_WIN-NEXT: fistpll {{[0-9]+}}(%esp)
; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp) ; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: setbe %al ; X87_WIN-NEXT: setbe %dl
; X87_WIN-NEXT: movzbl %al, %edx
; X87_WIN-NEXT: shll $31, %edx ; X87_WIN-NEXT: shll $31, %edx
; X87_WIN-NEXT: xorl {{[0-9]+}}(%esp), %edx ; X87_WIN-NEXT: xorl {{[0-9]+}}(%esp), %edx
; X87_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax ; X87_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax
; X87_WIN-NEXT: movl %ebp, %esp ; X87_WIN-NEXT: movl %ebp, %esp
; X87_WIN-NEXT: popl %ebp ; X87_WIN-NEXT: popl %ebp
; X87_WIN-NEXT: retl ; X87_WIN-NEXT: retl
; ;
; X87_LIN-LABEL: f_to_u64: ; X87_LIN-LABEL: f_to_u64:
Show All 11 Lines
; X87_LIN-NEXT: ja .LBB0_2 ; X87_LIN-NEXT: ja .LBB0_2
; X87_LIN-NEXT: # %bb.1: ; X87_LIN-NEXT: # %bb.1:
; X87_LIN-NEXT: fstp %st(1) ; X87_LIN-NEXT: fstp %st(1)
; X87_LIN-NEXT: fldz ; X87_LIN-NEXT: fldz
; X87_LIN-NEXT: .LBB0_2: ; X87_LIN-NEXT: .LBB0_2:
; X87_LIN-NEXT: fstp %st(0) ; X87_LIN-NEXT: fstp %st(0)
; X87_LIN-NEXT: fnstcw {{[0-9]+}}(%esp) ; X87_LIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; X87_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X87_LIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; X87_LIN-NEXT: xorl %edx, %edx
; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp) ; X87_LIN-NEXT: orl $3072, %eax # imm = 0xC00
; X87_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp) ; X87_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fistpll {{[0-9]+}}(%esp) ; X87_LIN-NEXT: fistpll {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp) ; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: setbe %al ; X87_LIN-NEXT: setbe %dl
; X87_LIN-NEXT: movzbl %al, %edx
; X87_LIN-NEXT: shll $31, %edx ; X87_LIN-NEXT: shll $31, %edx
; X87_LIN-NEXT: xorl {{[0-9]+}}(%esp), %edx ; X87_LIN-NEXT: xorl {{[0-9]+}}(%esp), %edx
; X87_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax ; X87_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax
; X87_LIN-NEXT: addl $20, %esp ; X87_LIN-NEXT: addl $20, %esp
; X87_LIN-NEXT: retl ; X87_LIN-NEXT: retl
%r = fptoui float %a to i64 %r = fptoui float %a to i64
ret i64 %r ret i64 %r
} }
▲ Show 20 Lines • Show All 107 Lines • ▼ Show 20 Lines
; SSE2_32_WIN-NEXT: movl %esp, %ebp ; SSE2_32_WIN-NEXT: movl %esp, %ebp
; SSE2_32_WIN-NEXT: andl $-8, %esp ; SSE2_32_WIN-NEXT: andl $-8, %esp
; SSE2_32_WIN-NEXT: subl $24, %esp ; SSE2_32_WIN-NEXT: subl $24, %esp
; SSE2_32_WIN-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; SSE2_32_WIN-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; SSE2_32_WIN-NEXT: movss %xmm0, {{[0-9]+}}(%esp) ; SSE2_32_WIN-NEXT: movss %xmm0, {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: flds {{[0-9]+}}(%esp) ; SSE2_32_WIN-NEXT: flds {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fnstcw {{[0-9]+}}(%esp) ; SSE2_32_WIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; SSE2_32_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; SSE2_32_WIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; SSE2_32_WIN-NEXT: orl $3072, %eax # imm = 0xC00
; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp) ; SSE2_32_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fistpll {{[0-9]+}}(%esp) ; SSE2_32_WIN-NEXT: fistpll {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp) ; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax ; SSE2_32_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax
; SSE2_32_WIN-NEXT: movl {{[0-9]+}}(%esp), %edx ; SSE2_32_WIN-NEXT: movl {{[0-9]+}}(%esp), %edx
; SSE2_32_WIN-NEXT: movl %ebp, %esp ; SSE2_32_WIN-NEXT: movl %ebp, %esp
; SSE2_32_WIN-NEXT: popl %ebp ; SSE2_32_WIN-NEXT: popl %ebp
; SSE2_32_WIN-NEXT: retl ; SSE2_32_WIN-NEXT: retl
; ;
; SSE2_32_LIN-LABEL: f_to_s64: ; SSE2_32_LIN-LABEL: f_to_s64:
; SSE2_32_LIN: # %bb.0: ; SSE2_32_LIN: # %bb.0:
; SSE2_32_LIN-NEXT: subl $28, %esp ; SSE2_32_LIN-NEXT: subl $28, %esp
; SSE2_32_LIN-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; SSE2_32_LIN-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; SSE2_32_LIN-NEXT: movss %xmm0, {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: movss %xmm0, {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: flds {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: flds {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fnstcw {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; SSE2_32_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; SSE2_32_LIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; SSE2_32_LIN-NEXT: orl $3072, %eax # imm = 0xC00
; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fistpll {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: fistpll {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax ; SSE2_32_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax
; SSE2_32_LIN-NEXT: movl {{[0-9]+}}(%esp), %edx ; SSE2_32_LIN-NEXT: movl {{[0-9]+}}(%esp), %edx
; SSE2_32_LIN-NEXT: addl $28, %esp ; SSE2_32_LIN-NEXT: addl $28, %esp
; SSE2_32_LIN-NEXT: retl ; SSE2_32_LIN-NEXT: retl
; ;
; SSE2_64-LABEL: f_to_s64: ; SSE2_64-LABEL: f_to_s64:
; SSE2_64: # %bb.0: ; SSE2_64: # %bb.0:
; SSE2_64-NEXT: cvttss2si %xmm0, %rax ; SSE2_64-NEXT: cvttss2si %xmm0, %rax
; SSE2_64-NEXT: retq ; SSE2_64-NEXT: retq
; ;
; X87_WIN-LABEL: f_to_s64: ; X87_WIN-LABEL: f_to_s64:
; X87_WIN: # %bb.0: ; X87_WIN: # %bb.0:
; X87_WIN-NEXT: pushl %ebp ; X87_WIN-NEXT: pushl %ebp
; X87_WIN-NEXT: movl %esp, %ebp ; X87_WIN-NEXT: movl %esp, %ebp
; X87_WIN-NEXT: andl $-8, %esp ; X87_WIN-NEXT: andl $-8, %esp
; X87_WIN-NEXT: subl $16, %esp ; X87_WIN-NEXT: subl $16, %esp
; X87_WIN-NEXT: flds 8(%ebp) ; X87_WIN-NEXT: flds 8(%ebp)
; X87_WIN-NEXT: fnstcw {{[0-9]+}}(%esp) ; X87_WIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; X87_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X87_WIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; X87_WIN-NEXT: orl $3072, %eax # imm = 0xC00
; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp) ; X87_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: fistpll {{[0-9]+}}(%esp) ; X87_WIN-NEXT: fistpll {{[0-9]+}}(%esp)
; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp) ; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax ; X87_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax
; X87_WIN-NEXT: movl {{[0-9]+}}(%esp), %edx ; X87_WIN-NEXT: movl {{[0-9]+}}(%esp), %edx
; X87_WIN-NEXT: movl %ebp, %esp ; X87_WIN-NEXT: movl %ebp, %esp
; X87_WIN-NEXT: popl %ebp ; X87_WIN-NEXT: popl %ebp
; X87_WIN-NEXT: retl ; X87_WIN-NEXT: retl
; ;
; X87_LIN-LABEL: f_to_s64: ; X87_LIN-LABEL: f_to_s64:
; X87_LIN: # %bb.0: ; X87_LIN: # %bb.0:
; X87_LIN-NEXT: subl $20, %esp ; X87_LIN-NEXT: subl $20, %esp
; X87_LIN-NEXT: flds {{[0-9]+}}(%esp) ; X87_LIN-NEXT: flds {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fnstcw {{[0-9]+}}(%esp) ; X87_LIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; X87_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X87_LIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; X87_LIN-NEXT: orl $3072, %eax # imm = 0xC00
; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp) ; X87_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fistpll {{[0-9]+}}(%esp) ; X87_LIN-NEXT: fistpll {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp) ; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax ; X87_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax
; X87_LIN-NEXT: movl {{[0-9]+}}(%esp), %edx ; X87_LIN-NEXT: movl {{[0-9]+}}(%esp), %edx
; X87_LIN-NEXT: addl $20, %esp ; X87_LIN-NEXT: addl $20, %esp
; X87_LIN-NEXT: retl ; X87_LIN-NEXT: retl
%r = fptosi float %a to i64 %r = fptosi float %a to i64
ret i64 %r ret i64 %r
▲ Show 20 Lines • Show All 154 Lines • ▼ Show 20 Lines
; SSE2_32_WIN: # %bb.0: ; SSE2_32_WIN: # %bb.0:
; SSE2_32_WIN-NEXT: pushl %ebp ; SSE2_32_WIN-NEXT: pushl %ebp
; SSE2_32_WIN-NEXT: movl %esp, %ebp ; SSE2_32_WIN-NEXT: movl %esp, %ebp
; SSE2_32_WIN-NEXT: andl $-8, %esp ; SSE2_32_WIN-NEXT: andl $-8, %esp
; SSE2_32_WIN-NEXT: subl $24, %esp ; SSE2_32_WIN-NEXT: subl $24, %esp
; SSE2_32_WIN-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; SSE2_32_WIN-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; SSE2_32_WIN-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; SSE2_32_WIN-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; SSE2_32_WIN-NEXT: movapd %xmm0, %xmm2 ; SSE2_32_WIN-NEXT: movapd %xmm0, %xmm2
; SSE2_32_WIN-NEXT: cmpltsd %xmm1, %xmm2 ; SSE2_32_WIN-NEXT: subsd %xmm1, %xmm2
; SSE2_32_WIN-NEXT: movapd %xmm2, %xmm3 ; SSE2_32_WIN-NEXT: movapd %xmm0, %xmm3
; SSE2_32_WIN-NEXT: andpd %xmm0, %xmm2 ; SSE2_32_WIN-NEXT: cmpltsd %xmm1, %xmm3
; SSE2_32_WIN-NEXT: xorl %edx, %edx ; SSE2_32_WIN-NEXT: movapd %xmm3, %xmm4
; SSE2_32_WIN-NEXT: ucomisd %xmm0, %xmm1 ; SSE2_32_WIN-NEXT: andnpd %xmm2, %xmm4
; SSE2_32_WIN-NEXT: subsd %xmm1, %xmm0 ; SSE2_32_WIN-NEXT: andpd %xmm0, %xmm3
; SSE2_32_WIN-NEXT: andnpd %xmm0, %xmm3 ; SSE2_32_WIN-NEXT: orpd %xmm4, %xmm3
; SSE2_32_WIN-NEXT: orpd %xmm3, %xmm2 ; SSE2_32_WIN-NEXT: movsd %xmm3, {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: movsd %xmm2, {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fldl {{[0-9]+}}(%esp) ; SSE2_32_WIN-NEXT: fldl {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fnstcw {{[0-9]+}}(%esp) ; SSE2_32_WIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; SSE2_32_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; SSE2_32_WIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; SSE2_32_WIN-NEXT: orl $3072, %eax # imm = 0xC00
; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp) ; SSE2_32_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fistpll {{[0-9]+}}(%esp) ; SSE2_32_WIN-NEXT: fistpll {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp) ; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: xorl %edx, %edx
; SSE2_32_WIN-NEXT: ucomisd %xmm0, %xmm1
; SSE2_32_WIN-NEXT: setbe %dl ; SSE2_32_WIN-NEXT: setbe %dl
; SSE2_32_WIN-NEXT: shll $31, %edx ; SSE2_32_WIN-NEXT: shll $31, %edx
; SSE2_32_WIN-NEXT: xorl {{[0-9]+}}(%esp), %edx ; SSE2_32_WIN-NEXT: xorl {{[0-9]+}}(%esp), %edx
; SSE2_32_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax ; SSE2_32_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax
; SSE2_32_WIN-NEXT: movl %ebp, %esp ; SSE2_32_WIN-NEXT: movl %ebp, %esp
; SSE2_32_WIN-NEXT: popl %ebp ; SSE2_32_WIN-NEXT: popl %ebp
; SSE2_32_WIN-NEXT: retl ; SSE2_32_WIN-NEXT: retl
; ;
; SSE2_32_LIN-LABEL: d_to_u64: ; SSE2_32_LIN-LABEL: d_to_u64:
; SSE2_32_LIN: # %bb.0: ; SSE2_32_LIN: # %bb.0:
; SSE2_32_LIN-NEXT: subl $28, %esp ; SSE2_32_LIN-NEXT: subl $28, %esp
; SSE2_32_LIN-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; SSE2_32_LIN-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; SSE2_32_LIN-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; SSE2_32_LIN-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; SSE2_32_LIN-NEXT: movapd %xmm0, %xmm2 ; SSE2_32_LIN-NEXT: movapd %xmm0, %xmm2
; SSE2_32_LIN-NEXT: cmpltsd %xmm1, %xmm2 ; SSE2_32_LIN-NEXT: subsd %xmm1, %xmm2
; SSE2_32_LIN-NEXT: movapd %xmm2, %xmm3 ; SSE2_32_LIN-NEXT: movapd %xmm0, %xmm3
; SSE2_32_LIN-NEXT: andpd %xmm0, %xmm2 ; SSE2_32_LIN-NEXT: cmpltsd %xmm1, %xmm3
; SSE2_32_LIN-NEXT: xorl %edx, %edx ; SSE2_32_LIN-NEXT: movapd %xmm3, %xmm4
; SSE2_32_LIN-NEXT: ucomisd %xmm0, %xmm1 ; SSE2_32_LIN-NEXT: andnpd %xmm2, %xmm4
; SSE2_32_LIN-NEXT: subsd %xmm1, %xmm0 ; SSE2_32_LIN-NEXT: andpd %xmm0, %xmm3
; SSE2_32_LIN-NEXT: andnpd %xmm0, %xmm3 ; SSE2_32_LIN-NEXT: orpd %xmm4, %xmm3
; SSE2_32_LIN-NEXT: orpd %xmm3, %xmm2 ; SSE2_32_LIN-NEXT: movsd %xmm3, {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: movsd %xmm2, {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fldl {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: fldl {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fnstcw {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; SSE2_32_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; SSE2_32_LIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; SSE2_32_LIN-NEXT: orl $3072, %eax # imm = 0xC00
; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fistpll {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: fistpll {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: xorl %edx, %edx
; SSE2_32_LIN-NEXT: ucomisd %xmm0, %xmm1
; SSE2_32_LIN-NEXT: setbe %dl ; SSE2_32_LIN-NEXT: setbe %dl
; SSE2_32_LIN-NEXT: shll $31, %edx ; SSE2_32_LIN-NEXT: shll $31, %edx
; SSE2_32_LIN-NEXT: xorl {{[0-9]+}}(%esp), %edx ; SSE2_32_LIN-NEXT: xorl {{[0-9]+}}(%esp), %edx
; SSE2_32_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax ; SSE2_32_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax
; SSE2_32_LIN-NEXT: addl $28, %esp ; SSE2_32_LIN-NEXT: addl $28, %esp
; SSE2_32_LIN-NEXT: retl ; SSE2_32_LIN-NEXT: retl
; ;
; SSE2_64-LABEL: d_to_u64: ; SSE2_64-LABEL: d_to_u64:
Show All 27 Lines
; X87_WIN-NEXT: ja LBB2_2 ; X87_WIN-NEXT: ja LBB2_2
; X87_WIN-NEXT: # %bb.1: ; X87_WIN-NEXT: # %bb.1:
; X87_WIN-NEXT: fstp %st(1) ; X87_WIN-NEXT: fstp %st(1)
; X87_WIN-NEXT: fldz ; X87_WIN-NEXT: fldz
; X87_WIN-NEXT: LBB2_2: ; X87_WIN-NEXT: LBB2_2:
; X87_WIN-NEXT: fstp %st(0) ; X87_WIN-NEXT: fstp %st(0)
; X87_WIN-NEXT: fnstcw {{[0-9]+}}(%esp) ; X87_WIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; X87_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X87_WIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; X87_WIN-NEXT: xorl %edx, %edx
; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp) ; X87_WIN-NEXT: orl $3072, %eax # imm = 0xC00
; X87_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp) ; X87_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: fistpll {{[0-9]+}}(%esp) ; X87_WIN-NEXT: fistpll {{[0-9]+}}(%esp)
; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp) ; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: setbe %al ; X87_WIN-NEXT: setbe %dl
; X87_WIN-NEXT: movzbl %al, %edx
; X87_WIN-NEXT: shll $31, %edx ; X87_WIN-NEXT: shll $31, %edx
; X87_WIN-NEXT: xorl {{[0-9]+}}(%esp), %edx ; X87_WIN-NEXT: xorl {{[0-9]+}}(%esp), %edx
; X87_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax ; X87_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax
; X87_WIN-NEXT: movl %ebp, %esp ; X87_WIN-NEXT: movl %ebp, %esp
; X87_WIN-NEXT: popl %ebp ; X87_WIN-NEXT: popl %ebp
; X87_WIN-NEXT: retl ; X87_WIN-NEXT: retl
; ;
; X87_LIN-LABEL: d_to_u64: ; X87_LIN-LABEL: d_to_u64:
Show All 11 Lines
; X87_LIN-NEXT: ja .LBB2_2 ; X87_LIN-NEXT: ja .LBB2_2
; X87_LIN-NEXT: # %bb.1: ; X87_LIN-NEXT: # %bb.1:
; X87_LIN-NEXT: fstp %st(1) ; X87_LIN-NEXT: fstp %st(1)
; X87_LIN-NEXT: fldz ; X87_LIN-NEXT: fldz
; X87_LIN-NEXT: .LBB2_2: ; X87_LIN-NEXT: .LBB2_2:
; X87_LIN-NEXT: fstp %st(0) ; X87_LIN-NEXT: fstp %st(0)
; X87_LIN-NEXT: fnstcw {{[0-9]+}}(%esp) ; X87_LIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; X87_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X87_LIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; X87_LIN-NEXT: xorl %edx, %edx
; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp) ; X87_LIN-NEXT: orl $3072, %eax # imm = 0xC00
; X87_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp) ; X87_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fistpll {{[0-9]+}}(%esp) ; X87_LIN-NEXT: fistpll {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp) ; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: setbe %al ; X87_LIN-NEXT: setbe %dl
; X87_LIN-NEXT: movzbl %al, %edx
; X87_LIN-NEXT: shll $31, %edx ; X87_LIN-NEXT: shll $31, %edx
; X87_LIN-NEXT: xorl {{[0-9]+}}(%esp), %edx ; X87_LIN-NEXT: xorl {{[0-9]+}}(%esp), %edx
; X87_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax ; X87_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax
; X87_LIN-NEXT: addl $20, %esp ; X87_LIN-NEXT: addl $20, %esp
; X87_LIN-NEXT: retl ; X87_LIN-NEXT: retl
%r = fptoui double %a to i64 %r = fptoui double %a to i64
ret i64 %r ret i64 %r
} }
▲ Show 20 Lines • Show All 107 Lines • ▼ Show 20 Lines
; SSE2_32_WIN-NEXT: movl %esp, %ebp ; SSE2_32_WIN-NEXT: movl %esp, %ebp
; SSE2_32_WIN-NEXT: andl $-8, %esp ; SSE2_32_WIN-NEXT: andl $-8, %esp
; SSE2_32_WIN-NEXT: subl $24, %esp ; SSE2_32_WIN-NEXT: subl $24, %esp
; SSE2_32_WIN-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; SSE2_32_WIN-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; SSE2_32_WIN-NEXT: movsd %xmm0, {{[0-9]+}}(%esp) ; SSE2_32_WIN-NEXT: movsd %xmm0, {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fldl {{[0-9]+}}(%esp) ; SSE2_32_WIN-NEXT: fldl {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fnstcw {{[0-9]+}}(%esp) ; SSE2_32_WIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; SSE2_32_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; SSE2_32_WIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; SSE2_32_WIN-NEXT: orl $3072, %eax # imm = 0xC00
; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp) ; SSE2_32_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fistpll {{[0-9]+}}(%esp) ; SSE2_32_WIN-NEXT: fistpll {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp) ; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax ; SSE2_32_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax
; SSE2_32_WIN-NEXT: movl {{[0-9]+}}(%esp), %edx ; SSE2_32_WIN-NEXT: movl {{[0-9]+}}(%esp), %edx
; SSE2_32_WIN-NEXT: movl %ebp, %esp ; SSE2_32_WIN-NEXT: movl %ebp, %esp
; SSE2_32_WIN-NEXT: popl %ebp ; SSE2_32_WIN-NEXT: popl %ebp
; SSE2_32_WIN-NEXT: retl ; SSE2_32_WIN-NEXT: retl
; ;
; SSE2_32_LIN-LABEL: d_to_s64: ; SSE2_32_LIN-LABEL: d_to_s64:
; SSE2_32_LIN: # %bb.0: ; SSE2_32_LIN: # %bb.0:
; SSE2_32_LIN-NEXT: subl $28, %esp ; SSE2_32_LIN-NEXT: subl $28, %esp
; SSE2_32_LIN-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; SSE2_32_LIN-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; SSE2_32_LIN-NEXT: movsd %xmm0, {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: movsd %xmm0, {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fldl {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: fldl {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fnstcw {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; SSE2_32_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; SSE2_32_LIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; SSE2_32_LIN-NEXT: orl $3072, %eax # imm = 0xC00
; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fistpll {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: fistpll {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax ; SSE2_32_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax
; SSE2_32_LIN-NEXT: movl {{[0-9]+}}(%esp), %edx ; SSE2_32_LIN-NEXT: movl {{[0-9]+}}(%esp), %edx
; SSE2_32_LIN-NEXT: addl $28, %esp ; SSE2_32_LIN-NEXT: addl $28, %esp
; SSE2_32_LIN-NEXT: retl ; SSE2_32_LIN-NEXT: retl
; ;
; SSE2_64-LABEL: d_to_s64: ; SSE2_64-LABEL: d_to_s64:
; SSE2_64: # %bb.0: ; SSE2_64: # %bb.0:
; SSE2_64-NEXT: cvttsd2si %xmm0, %rax ; SSE2_64-NEXT: cvttsd2si %xmm0, %rax
; SSE2_64-NEXT: retq ; SSE2_64-NEXT: retq
; ;
; X87_WIN-LABEL: d_to_s64: ; X87_WIN-LABEL: d_to_s64:
; X87_WIN: # %bb.0: ; X87_WIN: # %bb.0:
; X87_WIN-NEXT: pushl %ebp ; X87_WIN-NEXT: pushl %ebp
; X87_WIN-NEXT: movl %esp, %ebp ; X87_WIN-NEXT: movl %esp, %ebp
; X87_WIN-NEXT: andl $-8, %esp ; X87_WIN-NEXT: andl $-8, %esp
; X87_WIN-NEXT: subl $16, %esp ; X87_WIN-NEXT: subl $16, %esp
; X87_WIN-NEXT: fldl 8(%ebp) ; X87_WIN-NEXT: fldl 8(%ebp)
; X87_WIN-NEXT: fnstcw {{[0-9]+}}(%esp) ; X87_WIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; X87_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X87_WIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; X87_WIN-NEXT: orl $3072, %eax # imm = 0xC00
; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp) ; X87_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: fistpll {{[0-9]+}}(%esp) ; X87_WIN-NEXT: fistpll {{[0-9]+}}(%esp)
; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp) ; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax ; X87_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax
; X87_WIN-NEXT: movl {{[0-9]+}}(%esp), %edx ; X87_WIN-NEXT: movl {{[0-9]+}}(%esp), %edx
; X87_WIN-NEXT: movl %ebp, %esp ; X87_WIN-NEXT: movl %ebp, %esp
; X87_WIN-NEXT: popl %ebp ; X87_WIN-NEXT: popl %ebp
; X87_WIN-NEXT: retl ; X87_WIN-NEXT: retl
; ;
; X87_LIN-LABEL: d_to_s64: ; X87_LIN-LABEL: d_to_s64:
; X87_LIN: # %bb.0: ; X87_LIN: # %bb.0:
; X87_LIN-NEXT: subl $20, %esp ; X87_LIN-NEXT: subl $20, %esp
; X87_LIN-NEXT: fldl {{[0-9]+}}(%esp) ; X87_LIN-NEXT: fldl {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fnstcw {{[0-9]+}}(%esp) ; X87_LIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; X87_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X87_LIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; X87_LIN-NEXT: orl $3072, %eax # imm = 0xC00
; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp) ; X87_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fistpll {{[0-9]+}}(%esp) ; X87_LIN-NEXT: fistpll {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp) ; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax ; X87_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax
; X87_LIN-NEXT: movl {{[0-9]+}}(%esp), %edx ; X87_LIN-NEXT: movl {{[0-9]+}}(%esp), %edx
; X87_LIN-NEXT: addl $20, %esp ; X87_LIN-NEXT: addl $20, %esp
; X87_LIN-NEXT: retl ; X87_LIN-NEXT: retl
%r = fptosi double %a to i64 %r = fptosi double %a to i64
ret i64 %r ret i64 %r
▲ Show 20 Lines • Show All 165 Lines • ▼ Show 20 Lines
; SSE2_32_WIN-NEXT: pushl %ebp ; SSE2_32_WIN-NEXT: pushl %ebp
; SSE2_32_WIN-NEXT: movl %esp, %ebp ; SSE2_32_WIN-NEXT: movl %esp, %ebp
; SSE2_32_WIN-NEXT: andl $-8, %esp ; SSE2_32_WIN-NEXT: andl $-8, %esp
; SSE2_32_WIN-NEXT: subl $16, %esp ; SSE2_32_WIN-NEXT: subl $16, %esp
; SSE2_32_WIN-NEXT: fldt 8(%ebp) ; SSE2_32_WIN-NEXT: fldt 8(%ebp)
; SSE2_32_WIN-NEXT: flds __real@5f000000 ; SSE2_32_WIN-NEXT: flds __real@5f000000
; SSE2_32_WIN-NEXT: fld %st(1) ; SSE2_32_WIN-NEXT: fld %st(1)
; SSE2_32_WIN-NEXT: fsub %st(1), %st ; SSE2_32_WIN-NEXT: fsub %st(1), %st
; SSE2_32_WIN-NEXT: xorl %edx, %edx
; SSE2_32_WIN-NEXT: fxch %st(1) ; SSE2_32_WIN-NEXT: fxch %st(1)
; SSE2_32_WIN-NEXT: fucompi %st(2), %st ; SSE2_32_WIN-NEXT: fucompi %st(2), %st
; SSE2_32_WIN-NEXT: fcmovnbe %st(1), %st ; SSE2_32_WIN-NEXT: fcmovnbe %st(1), %st
; SSE2_32_WIN-NEXT: fstp %st(1) ; SSE2_32_WIN-NEXT: fstp %st(1)
; SSE2_32_WIN-NEXT: fnstcw {{[0-9]+}}(%esp) ; SSE2_32_WIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; SSE2_32_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; SSE2_32_WIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; SSE2_32_WIN-NEXT: xorl %edx, %edx
; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp) ; SSE2_32_WIN-NEXT: orl $3072, %eax # imm = 0xC00
; SSE2_32_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp) ; SSE2_32_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fistpll {{[0-9]+}}(%esp) ; SSE2_32_WIN-NEXT: fistpll {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp) ; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: setbe %dl ; SSE2_32_WIN-NEXT: setbe %dl
; SSE2_32_WIN-NEXT: shll $31, %edx ; SSE2_32_WIN-NEXT: shll $31, %edx
; SSE2_32_WIN-NEXT: xorl {{[0-9]+}}(%esp), %edx ; SSE2_32_WIN-NEXT: xorl {{[0-9]+}}(%esp), %edx
; SSE2_32_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax ; SSE2_32_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax
; SSE2_32_WIN-NEXT: movl %ebp, %esp ; SSE2_32_WIN-NEXT: movl %ebp, %esp
; SSE2_32_WIN-NEXT: popl %ebp ; SSE2_32_WIN-NEXT: popl %ebp
; SSE2_32_WIN-NEXT: retl ; SSE2_32_WIN-NEXT: retl
; ;
; SSE2_32_LIN-LABEL: x_to_u64: ; SSE2_32_LIN-LABEL: x_to_u64:
; SSE2_32_LIN: # %bb.0: ; SSE2_32_LIN: # %bb.0:
; SSE2_32_LIN-NEXT: subl $20, %esp ; SSE2_32_LIN-NEXT: subl $20, %esp
; SSE2_32_LIN-NEXT: fldt {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: fldt {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: flds {{\.LCPI.*}} ; SSE2_32_LIN-NEXT: flds {{\.LCPI.*}}
; SSE2_32_LIN-NEXT: fld %st(1) ; SSE2_32_LIN-NEXT: fld %st(1)
; SSE2_32_LIN-NEXT: fsub %st(1), %st ; SSE2_32_LIN-NEXT: fsub %st(1), %st
; SSE2_32_LIN-NEXT: xorl %edx, %edx
; SSE2_32_LIN-NEXT: fxch %st(1) ; SSE2_32_LIN-NEXT: fxch %st(1)
; SSE2_32_LIN-NEXT: fucompi %st(2), %st ; SSE2_32_LIN-NEXT: fucompi %st(2), %st
; SSE2_32_LIN-NEXT: fcmovnbe %st(1), %st ; SSE2_32_LIN-NEXT: fcmovnbe %st(1), %st
; SSE2_32_LIN-NEXT: fstp %st(1) ; SSE2_32_LIN-NEXT: fstp %st(1)
; SSE2_32_LIN-NEXT: fnstcw {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; SSE2_32_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; SSE2_32_LIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; SSE2_32_LIN-NEXT: xorl %edx, %edx
; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: orl $3072, %eax # imm = 0xC00
; SSE2_32_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fistpll {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: fistpll {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: setbe %dl ; SSE2_32_LIN-NEXT: setbe %dl
; SSE2_32_LIN-NEXT: shll $31, %edx ; SSE2_32_LIN-NEXT: shll $31, %edx
; SSE2_32_LIN-NEXT: xorl {{[0-9]+}}(%esp), %edx ; SSE2_32_LIN-NEXT: xorl {{[0-9]+}}(%esp), %edx
; SSE2_32_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax ; SSE2_32_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax
; SSE2_32_LIN-NEXT: addl $20, %esp ; SSE2_32_LIN-NEXT: addl $20, %esp
; SSE2_32_LIN-NEXT: retl ; SSE2_32_LIN-NEXT: retl
; ;
; SSE2_64_WIN-LABEL: x_to_u64: ; SSE2_64_WIN-LABEL: x_to_u64:
; SSE2_64_WIN: # %bb.0: ; SSE2_64_WIN: # %bb.0:
; SSE2_64_WIN-NEXT: subq $16, %rsp ; SSE2_64_WIN-NEXT: subq $16, %rsp
; SSE2_64_WIN-NEXT: fldt (%rcx) ; SSE2_64_WIN-NEXT: fldt (%rcx)
; SSE2_64_WIN-NEXT: flds __real@{{.*}}(%rip) ; SSE2_64_WIN-NEXT: flds __real@{{.*}}(%rip)
; SSE2_64_WIN-NEXT: fld %st(1) ; SSE2_64_WIN-NEXT: fld %st(1)
; SSE2_64_WIN-NEXT: fsub %st(1), %st ; SSE2_64_WIN-NEXT: fsub %st(1), %st
; SSE2_64_WIN-NEXT: xorl %eax, %eax
; SSE2_64_WIN-NEXT: fxch %st(1) ; SSE2_64_WIN-NEXT: fxch %st(1)
; SSE2_64_WIN-NEXT: fucompi %st(2), %st ; SSE2_64_WIN-NEXT: fucompi %st(2), %st
; SSE2_64_WIN-NEXT: fcmovnbe %st(1), %st ; SSE2_64_WIN-NEXT: fcmovnbe %st(1), %st
; SSE2_64_WIN-NEXT: fstp %st(1) ; SSE2_64_WIN-NEXT: fstp %st(1)
; SSE2_64_WIN-NEXT: fnstcw {{[0-9]+}}(%rsp) ; SSE2_64_WIN-NEXT: fnstcw {{[0-9]+}}(%rsp)
; SSE2_64_WIN-NEXT: movzwl {{[0-9]+}}(%rsp), %ecx ; SSE2_64_WIN-NEXT: movzwl {{[0-9]+}}(%rsp), %ecx
; SSE2_64_WIN-NEXT: movw $3199, {{[0-9]+}}(%rsp) # imm = 0xC7F ; SSE2_64_WIN-NEXT: xorl %eax, %eax
; SSE2_64_WIN-NEXT: fldcw {{[0-9]+}}(%rsp) ; SSE2_64_WIN-NEXT: orl $3072, %ecx # imm = 0xC00
; SSE2_64_WIN-NEXT: movw %cx, {{[0-9]+}}(%rsp) ; SSE2_64_WIN-NEXT: movw %cx, {{[0-9]+}}(%rsp)
; SSE2_64_WIN-NEXT: fldcw {{[0-9]+}}(%rsp)
; SSE2_64_WIN-NEXT: fistpll {{[0-9]+}}(%rsp) ; SSE2_64_WIN-NEXT: fistpll {{[0-9]+}}(%rsp)
; SSE2_64_WIN-NEXT: fldcw {{[0-9]+}}(%rsp) ; SSE2_64_WIN-NEXT: fldcw {{[0-9]+}}(%rsp)
; SSE2_64_WIN-NEXT: setbe %al ; SSE2_64_WIN-NEXT: setbe %al
; SSE2_64_WIN-NEXT: shlq $63, %rax ; SSE2_64_WIN-NEXT: shlq $63, %rax
; SSE2_64_WIN-NEXT: xorq {{[0-9]+}}(%rsp), %rax ; SSE2_64_WIN-NEXT: xorq {{[0-9]+}}(%rsp), %rax
; SSE2_64_WIN-NEXT: addq $16, %rsp ; SSE2_64_WIN-NEXT: addq $16, %rsp
; SSE2_64_WIN-NEXT: retq ; SSE2_64_WIN-NEXT: retq
; ;
; SSE2_64_LIN-LABEL: x_to_u64: ; SSE2_64_LIN-LABEL: x_to_u64:
; SSE2_64_LIN: # %bb.0: ; SSE2_64_LIN: # %bb.0:
; SSE2_64_LIN-NEXT: fldt {{[0-9]+}}(%rsp) ; SSE2_64_LIN-NEXT: fldt {{[0-9]+}}(%rsp)
; SSE2_64_LIN-NEXT: flds {{.*}}(%rip) ; SSE2_64_LIN-NEXT: flds {{.*}}(%rip)
; SSE2_64_LIN-NEXT: fld %st(1) ; SSE2_64_LIN-NEXT: fld %st(1)
; SSE2_64_LIN-NEXT: fsub %st(1), %st ; SSE2_64_LIN-NEXT: fsub %st(1), %st
; SSE2_64_LIN-NEXT: xorl %eax, %eax
; SSE2_64_LIN-NEXT: fxch %st(1) ; SSE2_64_LIN-NEXT: fxch %st(1)
; SSE2_64_LIN-NEXT: fucompi %st(2), %st ; SSE2_64_LIN-NEXT: fucompi %st(2), %st
; SSE2_64_LIN-NEXT: fcmovnbe %st(1), %st ; SSE2_64_LIN-NEXT: fcmovnbe %st(1), %st
; SSE2_64_LIN-NEXT: fstp %st(1) ; SSE2_64_LIN-NEXT: fstp %st(1)
; SSE2_64_LIN-NEXT: fnstcw -{{[0-9]+}}(%rsp) ; SSE2_64_LIN-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; SSE2_64_LIN-NEXT: movzwl -{{[0-9]+}}(%rsp), %ecx ; SSE2_64_LIN-NEXT: movzwl -{{[0-9]+}}(%rsp), %ecx
; SSE2_64_LIN-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F ; SSE2_64_LIN-NEXT: xorl %eax, %eax
; SSE2_64_LIN-NEXT: fldcw -{{[0-9]+}}(%rsp) ; SSE2_64_LIN-NEXT: orl $3072, %ecx # imm = 0xC00
; SSE2_64_LIN-NEXT: movw %cx, -{{[0-9]+}}(%rsp) ; SSE2_64_LIN-NEXT: movw %cx, -{{[0-9]+}}(%rsp)
; SSE2_64_LIN-NEXT: fldcw -{{[0-9]+}}(%rsp)
; SSE2_64_LIN-NEXT: fistpll -{{[0-9]+}}(%rsp) ; SSE2_64_LIN-NEXT: fistpll -{{[0-9]+}}(%rsp)
; SSE2_64_LIN-NEXT: fldcw -{{[0-9]+}}(%rsp) ; SSE2_64_LIN-NEXT: fldcw -{{[0-9]+}}(%rsp)
; SSE2_64_LIN-NEXT: setbe %al ; SSE2_64_LIN-NEXT: setbe %al
; SSE2_64_LIN-NEXT: shlq $63, %rax ; SSE2_64_LIN-NEXT: shlq $63, %rax
; SSE2_64_LIN-NEXT: xorq -{{[0-9]+}}(%rsp), %rax ; SSE2_64_LIN-NEXT: xorq -{{[0-9]+}}(%rsp), %rax
; SSE2_64_LIN-NEXT: retq ; SSE2_64_LIN-NEXT: retq
; ;
; X87_WIN-LABEL: x_to_u64: ; X87_WIN-LABEL: x_to_u64:
Show All 14 Lines
; X87_WIN-NEXT: ja LBB4_2 ; X87_WIN-NEXT: ja LBB4_2
; X87_WIN-NEXT: # %bb.1: ; X87_WIN-NEXT: # %bb.1:
; X87_WIN-NEXT: fstp %st(1) ; X87_WIN-NEXT: fstp %st(1)
; X87_WIN-NEXT: fldz ; X87_WIN-NEXT: fldz
; X87_WIN-NEXT: LBB4_2: ; X87_WIN-NEXT: LBB4_2:
; X87_WIN-NEXT: fstp %st(0) ; X87_WIN-NEXT: fstp %st(0)
; X87_WIN-NEXT: fnstcw {{[0-9]+}}(%esp) ; X87_WIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; X87_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X87_WIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; X87_WIN-NEXT: xorl %edx, %edx
; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp) ; X87_WIN-NEXT: orl $3072, %eax # imm = 0xC00
; X87_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp) ; X87_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: fistpll {{[0-9]+}}(%esp) ; X87_WIN-NEXT: fistpll {{[0-9]+}}(%esp)
; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp) ; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: setbe %al ; X87_WIN-NEXT: setbe %dl
; X87_WIN-NEXT: movzbl %al, %edx
; X87_WIN-NEXT: shll $31, %edx ; X87_WIN-NEXT: shll $31, %edx
; X87_WIN-NEXT: xorl {{[0-9]+}}(%esp), %edx ; X87_WIN-NEXT: xorl {{[0-9]+}}(%esp), %edx
; X87_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax ; X87_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax
; X87_WIN-NEXT: movl %ebp, %esp ; X87_WIN-NEXT: movl %ebp, %esp
; X87_WIN-NEXT: popl %ebp ; X87_WIN-NEXT: popl %ebp
; X87_WIN-NEXT: retl ; X87_WIN-NEXT: retl
; ;
; X87_LIN-LABEL: x_to_u64: ; X87_LIN-LABEL: x_to_u64:
Show All 11 Lines
; X87_LIN-NEXT: ja .LBB4_2 ; X87_LIN-NEXT: ja .LBB4_2
; X87_LIN-NEXT: # %bb.1: ; X87_LIN-NEXT: # %bb.1:
; X87_LIN-NEXT: fstp %st(1) ; X87_LIN-NEXT: fstp %st(1)
; X87_LIN-NEXT: fldz ; X87_LIN-NEXT: fldz
; X87_LIN-NEXT: .LBB4_2: ; X87_LIN-NEXT: .LBB4_2:
; X87_LIN-NEXT: fstp %st(0) ; X87_LIN-NEXT: fstp %st(0)
; X87_LIN-NEXT: fnstcw {{[0-9]+}}(%esp) ; X87_LIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; X87_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X87_LIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; X87_LIN-NEXT: xorl %edx, %edx
; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp) ; X87_LIN-NEXT: orl $3072, %eax # imm = 0xC00
; X87_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp) ; X87_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fistpll {{[0-9]+}}(%esp) ; X87_LIN-NEXT: fistpll {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp) ; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: setbe %al ; X87_LIN-NEXT: setbe %dl
; X87_LIN-NEXT: movzbl %al, %edx
; X87_LIN-NEXT: shll $31, %edx ; X87_LIN-NEXT: shll $31, %edx
; X87_LIN-NEXT: xorl {{[0-9]+}}(%esp), %edx ; X87_LIN-NEXT: xorl {{[0-9]+}}(%esp), %edx
; X87_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax ; X87_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax
; X87_LIN-NEXT: addl $20, %esp ; X87_LIN-NEXT: addl $20, %esp
; X87_LIN-NEXT: retl ; X87_LIN-NEXT: retl
%r = fptoui x86_fp80 %a to i64 %r = fptoui x86_fp80 %a to i64
ret i64 %r ret i64 %r
} }
▲ Show 20 Lines • Show All 83 Lines • ▼ Show 20 Lines
; SSE2_32_WIN: # %bb.0: ; SSE2_32_WIN: # %bb.0:
; SSE2_32_WIN-NEXT: pushl %ebp ; SSE2_32_WIN-NEXT: pushl %ebp
; SSE2_32_WIN-NEXT: movl %esp, %ebp ; SSE2_32_WIN-NEXT: movl %esp, %ebp
; SSE2_32_WIN-NEXT: andl $-8, %esp ; SSE2_32_WIN-NEXT: andl $-8, %esp
; SSE2_32_WIN-NEXT: subl $16, %esp ; SSE2_32_WIN-NEXT: subl $16, %esp
; SSE2_32_WIN-NEXT: fldt 8(%ebp) ; SSE2_32_WIN-NEXT: fldt 8(%ebp)
; SSE2_32_WIN-NEXT: fnstcw {{[0-9]+}}(%esp) ; SSE2_32_WIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; SSE2_32_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; SSE2_32_WIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; SSE2_32_WIN-NEXT: orl $3072, %eax # imm = 0xC00
; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp) ; SSE2_32_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fistpll {{[0-9]+}}(%esp) ; SSE2_32_WIN-NEXT: fistpll {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp) ; SSE2_32_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax ; SSE2_32_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax
; SSE2_32_WIN-NEXT: movl {{[0-9]+}}(%esp), %edx ; SSE2_32_WIN-NEXT: movl {{[0-9]+}}(%esp), %edx
; SSE2_32_WIN-NEXT: movl %ebp, %esp ; SSE2_32_WIN-NEXT: movl %ebp, %esp
; SSE2_32_WIN-NEXT: popl %ebp ; SSE2_32_WIN-NEXT: popl %ebp
; SSE2_32_WIN-NEXT: retl ; SSE2_32_WIN-NEXT: retl
; ;
; SSE2_32_LIN-LABEL: x_to_s64: ; SSE2_32_LIN-LABEL: x_to_s64:
; SSE2_32_LIN: # %bb.0: ; SSE2_32_LIN: # %bb.0:
; SSE2_32_LIN-NEXT: subl $20, %esp ; SSE2_32_LIN-NEXT: subl $20, %esp
; SSE2_32_LIN-NEXT: fldt {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: fldt {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fnstcw {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; SSE2_32_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; SSE2_32_LIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; SSE2_32_LIN-NEXT: orl $3072, %eax # imm = 0xC00
; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fistpll {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: fistpll {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp) ; SSE2_32_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; SSE2_32_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax ; SSE2_32_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax
; SSE2_32_LIN-NEXT: movl {{[0-9]+}}(%esp), %edx ; SSE2_32_LIN-NEXT: movl {{[0-9]+}}(%esp), %edx
; SSE2_32_LIN-NEXT: addl $20, %esp ; SSE2_32_LIN-NEXT: addl $20, %esp
; SSE2_32_LIN-NEXT: retl ; SSE2_32_LIN-NEXT: retl
; ;
; SSE2_64_WIN-LABEL: x_to_s64: ; SSE2_64_WIN-LABEL: x_to_s64:
; SSE2_64_WIN: # %bb.0: ; SSE2_64_WIN: # %bb.0:
; SSE2_64_WIN-NEXT: subq $16, %rsp ; SSE2_64_WIN-NEXT: subq $16, %rsp
; SSE2_64_WIN-NEXT: fldt (%rcx) ; SSE2_64_WIN-NEXT: fldt (%rcx)
; SSE2_64_WIN-NEXT: fnstcw {{[0-9]+}}(%rsp) ; SSE2_64_WIN-NEXT: fnstcw {{[0-9]+}}(%rsp)
; SSE2_64_WIN-NEXT: movzwl {{[0-9]+}}(%rsp), %eax ; SSE2_64_WIN-NEXT: movzwl {{[0-9]+}}(%rsp), %eax
; SSE2_64_WIN-NEXT: movw $3199, {{[0-9]+}}(%rsp) # imm = 0xC7F ; SSE2_64_WIN-NEXT: orl $3072, %eax # imm = 0xC00
; SSE2_64_WIN-NEXT: fldcw {{[0-9]+}}(%rsp)
; SSE2_64_WIN-NEXT: movw %ax, {{[0-9]+}}(%rsp) ; SSE2_64_WIN-NEXT: movw %ax, {{[0-9]+}}(%rsp)
; SSE2_64_WIN-NEXT: fldcw {{[0-9]+}}(%rsp)
; SSE2_64_WIN-NEXT: fistpll {{[0-9]+}}(%rsp) ; SSE2_64_WIN-NEXT: fistpll {{[0-9]+}}(%rsp)
; SSE2_64_WIN-NEXT: fldcw {{[0-9]+}}(%rsp) ; SSE2_64_WIN-NEXT: fldcw {{[0-9]+}}(%rsp)
; SSE2_64_WIN-NEXT: movq {{[0-9]+}}(%rsp), %rax ; SSE2_64_WIN-NEXT: movq {{[0-9]+}}(%rsp), %rax
; SSE2_64_WIN-NEXT: addq $16, %rsp ; SSE2_64_WIN-NEXT: addq $16, %rsp
; SSE2_64_WIN-NEXT: retq ; SSE2_64_WIN-NEXT: retq
; ;
; SSE2_64_LIN-LABEL: x_to_s64: ; SSE2_64_LIN-LABEL: x_to_s64:
; SSE2_64_LIN: # %bb.0: ; SSE2_64_LIN: # %bb.0:
; SSE2_64_LIN-NEXT: fldt {{[0-9]+}}(%rsp) ; SSE2_64_LIN-NEXT: fldt {{[0-9]+}}(%rsp)
; SSE2_64_LIN-NEXT: fnstcw -{{[0-9]+}}(%rsp) ; SSE2_64_LIN-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; SSE2_64_LIN-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax ; SSE2_64_LIN-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
; SSE2_64_LIN-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F ; SSE2_64_LIN-NEXT: orl $3072, %eax # imm = 0xC00
; SSE2_64_LIN-NEXT: fldcw -{{[0-9]+}}(%rsp)
; SSE2_64_LIN-NEXT: movw %ax, -{{[0-9]+}}(%rsp) ; SSE2_64_LIN-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
; SSE2_64_LIN-NEXT: fldcw -{{[0-9]+}}(%rsp)
; SSE2_64_LIN-NEXT: fistpll -{{[0-9]+}}(%rsp) ; SSE2_64_LIN-NEXT: fistpll -{{[0-9]+}}(%rsp)
; SSE2_64_LIN-NEXT: fldcw -{{[0-9]+}}(%rsp) ; SSE2_64_LIN-NEXT: fldcw -{{[0-9]+}}(%rsp)
; SSE2_64_LIN-NEXT: movq -{{[0-9]+}}(%rsp), %rax ; SSE2_64_LIN-NEXT: movq -{{[0-9]+}}(%rsp), %rax
; SSE2_64_LIN-NEXT: retq ; SSE2_64_LIN-NEXT: retq
; ;
; X87_WIN-LABEL: x_to_s64: ; X87_WIN-LABEL: x_to_s64:
; X87_WIN: # %bb.0: ; X87_WIN: # %bb.0:
; X87_WIN-NEXT: pushl %ebp ; X87_WIN-NEXT: pushl %ebp
; X87_WIN-NEXT: movl %esp, %ebp ; X87_WIN-NEXT: movl %esp, %ebp
; X87_WIN-NEXT: andl $-8, %esp ; X87_WIN-NEXT: andl $-8, %esp
; X87_WIN-NEXT: subl $16, %esp ; X87_WIN-NEXT: subl $16, %esp
; X87_WIN-NEXT: fldt 8(%ebp) ; X87_WIN-NEXT: fldt 8(%ebp)
; X87_WIN-NEXT: fnstcw {{[0-9]+}}(%esp) ; X87_WIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; X87_WIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X87_WIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; X87_WIN-NEXT: orl $3072, %eax # imm = 0xC00
; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp) ; X87_WIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: fistpll {{[0-9]+}}(%esp) ; X87_WIN-NEXT: fistpll {{[0-9]+}}(%esp)
; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp) ; X87_WIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax ; X87_WIN-NEXT: movl {{[0-9]+}}(%esp), %eax
; X87_WIN-NEXT: movl {{[0-9]+}}(%esp), %edx ; X87_WIN-NEXT: movl {{[0-9]+}}(%esp), %edx
; X87_WIN-NEXT: movl %ebp, %esp ; X87_WIN-NEXT: movl %ebp, %esp
; X87_WIN-NEXT: popl %ebp ; X87_WIN-NEXT: popl %ebp
; X87_WIN-NEXT: retl ; X87_WIN-NEXT: retl
; ;
; X87_LIN-LABEL: x_to_s64: ; X87_LIN-LABEL: x_to_s64:
; X87_LIN: # %bb.0: ; X87_LIN: # %bb.0:
; X87_LIN-NEXT: subl $20, %esp ; X87_LIN-NEXT: subl $20, %esp
; X87_LIN-NEXT: fldt {{[0-9]+}}(%esp) ; X87_LIN-NEXT: fldt {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fnstcw {{[0-9]+}}(%esp) ; X87_LIN-NEXT: fnstcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; X87_LIN-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X87_LIN-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F ; X87_LIN-NEXT: orl $3072, %eax # imm = 0xC00
; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp) ; X87_LIN-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fistpll {{[0-9]+}}(%esp) ; X87_LIN-NEXT: fistpll {{[0-9]+}}(%esp)
; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp) ; X87_LIN-NEXT: fldcw {{[0-9]+}}(%esp)
; X87_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax ; X87_LIN-NEXT: movl {{[0-9]+}}(%esp), %eax
; X87_LIN-NEXT: movl {{[0-9]+}}(%esp), %edx ; X87_LIN-NEXT: movl {{[0-9]+}}(%esp), %edx
; X87_LIN-NEXT: addl $20, %esp ; X87_LIN-NEXT: addl $20, %esp
; X87_LIN-NEXT: retl ; X87_LIN-NEXT: retl
%r = fptosi x86_fp80 %a to i64 %r = fptosi x86_fp80 %a to i64
ret i64 %r ret i64 %r
▲ Show 20 Lines • Show All 255 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/X86/trunc-to-bool.ll

Show First 20 Lines • Show All 75 Lines • ▼ Show 20 Linescond_true:
ret i32 21 ret i32 21
cond_false: cond_false:
ret i32 42 ret i32 42
} }
define i32 @test5(double %d) nounwind { define i32 @test5(double %d) nounwind {
; CHECK-LABEL: test5: ; CHECK-LABEL: test5:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: pushl %eax ; CHECK-NEXT: subl $8, %esp
; CHECK-NEXT: fldl {{[0-9]+}}(%esp) ; CHECK-NEXT: fldl {{[0-9]+}}(%esp)
; CHECK-NEXT: fnstcw (%esp) ; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp)
; CHECK-NEXT: movzwl (%esp), %eax ; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movw $3199, (%esp) # imm = 0xC7F ; CHECK-NEXT: orl $3072, %eax # imm = 0xC00
; CHECK-NEXT: fldcw (%esp) ; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp)
; CHECK-NEXT: movw %ax, (%esp) ; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
; CHECK-NEXT: fistps {{[0-9]+}}(%esp) ; CHECK-NEXT: fistps {{[0-9]+}}(%esp)
; CHECK-NEXT: fldcw (%esp) ; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
; CHECK-NEXT: testb $1, {{[0-9]+}}(%esp) ; CHECK-NEXT: testb $1, {{[0-9]+}}(%esp)
; CHECK-NEXT: je .LBB4_2 ; CHECK-NEXT: je .LBB4_2
; CHECK-NEXT: # %bb.1: # %cond_true ; CHECK-NEXT: # %bb.1: # %cond_true
; CHECK-NEXT: movl $21, %eax ; CHECK-NEXT: movl $21, %eax
; CHECK-NEXT: popl %ecx ; CHECK-NEXT: addl $8, %esp
; CHECK-NEXT: retl ; CHECK-NEXT: retl
; CHECK-NEXT: .LBB4_2: # %cond_false ; CHECK-NEXT: .LBB4_2: # %cond_false
; CHECK-NEXT: movl $42, %eax ; CHECK-NEXT: movl $42, %eax
; CHECK-NEXT: popl %ecx ; CHECK-NEXT: addl $8, %esp
; CHECK-NEXT: retl ; CHECK-NEXT: retl
%tmp = fptosi double %d to i1 %tmp = fptosi double %d to i1
br i1 %tmp, label %cond_true, label %cond_false br i1 %tmp, label %cond_true, label %cond_false
cond_true: cond_true:
ret i32 21 ret i32 21
cond_false: cond_false:
ret i32 42 ret i32 42
} }

llvm/trunk/test/CodeGen/X86/vec_fp_to_int-widen.ll

Show First 20 Lines • Show All 2,218 Lines • ▼ Show 20 Lines
define <4 x i32> @fptosi_2f80_to_4i32(<2 x x86_fp80> %a) nounwind { define <4 x i32> @fptosi_2f80_to_4i32(<2 x x86_fp80> %a) nounwind {
; SSE-LABEL: fptosi_2f80_to_4i32: ; SSE-LABEL: fptosi_2f80_to_4i32:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: fldt {{[0-9]+}}(%rsp) ; SSE-NEXT: fldt {{[0-9]+}}(%rsp)
; SSE-NEXT: fldt {{[0-9]+}}(%rsp) ; SSE-NEXT: fldt {{[0-9]+}}(%rsp)
; SSE-NEXT: fnstcw -{{[0-9]+}}(%rsp) ; SSE-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; SSE-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax ; SSE-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
; SSE-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F ; SSE-NEXT: orl $3072, %eax # imm = 0xC00
; SSE-NEXT: fldcw -{{[0-9]+}}(%rsp)
; SSE-NEXT: movw %ax, -{{[0-9]+}}(%rsp) ; SSE-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
; SSE-NEXT: fldcw -{{[0-9]+}}(%rsp)
; SSE-NEXT: fistpl -{{[0-9]+}}(%rsp) ; SSE-NEXT: fistpl -{{[0-9]+}}(%rsp)
; SSE-NEXT: fldcw -{{[0-9]+}}(%rsp) ; SSE-NEXT: fldcw -{{[0-9]+}}(%rsp)
; SSE-NEXT: fnstcw -{{[0-9]+}}(%rsp) ; SSE-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; SSE-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax ; SSE-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
; SSE-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F ; SSE-NEXT: orl $3072, %eax # imm = 0xC00
; SSE-NEXT: fldcw -{{[0-9]+}}(%rsp)
; SSE-NEXT: movw %ax, -{{[0-9]+}}(%rsp) ; SSE-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
; SSE-NEXT: fldcw -{{[0-9]+}}(%rsp)
; SSE-NEXT: fistpl -{{[0-9]+}}(%rsp) ; SSE-NEXT: fistpl -{{[0-9]+}}(%rsp)
; SSE-NEXT: fldcw -{{[0-9]+}}(%rsp) ; SSE-NEXT: fldcw -{{[0-9]+}}(%rsp)
; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero ; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; SSE-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero ; SSE-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] ; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
; SSE-NEXT: movq {{.*#+}} xmm0 = xmm1[0],zero ; SSE-NEXT: movq {{.*#+}} xmm0 = xmm1[0],zero
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
▲ Show 20 Lines • Show All 402 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/X86/vec_fp_to_int.ll

Show First 20 Lines • Show All 2,288 Lines • ▼ Show 20 Lines
define <4 x i32> @fptosi_2f80_to_4i32(<2 x x86_fp80> %a) nounwind { define <4 x i32> @fptosi_2f80_to_4i32(<2 x x86_fp80> %a) nounwind {
; SSE-LABEL: fptosi_2f80_to_4i32: ; SSE-LABEL: fptosi_2f80_to_4i32:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: fldt {{[0-9]+}}(%rsp) ; SSE-NEXT: fldt {{[0-9]+}}(%rsp)
; SSE-NEXT: fldt {{[0-9]+}}(%rsp) ; SSE-NEXT: fldt {{[0-9]+}}(%rsp)
; SSE-NEXT: fnstcw -{{[0-9]+}}(%rsp) ; SSE-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; SSE-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax ; SSE-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
; SSE-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F ; SSE-NEXT: orl $3072, %eax # imm = 0xC00
; SSE-NEXT: fldcw -{{[0-9]+}}(%rsp)
; SSE-NEXT: movw %ax, -{{[0-9]+}}(%rsp) ; SSE-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
; SSE-NEXT: fldcw -{{[0-9]+}}(%rsp)
; SSE-NEXT: fistpll -{{[0-9]+}}(%rsp) ; SSE-NEXT: fistpll -{{[0-9]+}}(%rsp)
; SSE-NEXT: fldcw -{{[0-9]+}}(%rsp) ; SSE-NEXT: fldcw -{{[0-9]+}}(%rsp)
; SSE-NEXT: fnstcw -{{[0-9]+}}(%rsp) ; SSE-NEXT: fnstcw -{{[0-9]+}}(%rsp)
; SSE-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax ; SSE-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
; SSE-NEXT: movw $3199, -{{[0-9]+}}(%rsp) # imm = 0xC7F ; SSE-NEXT: orl $3072, %eax # imm = 0xC00
; SSE-NEXT: fldcw -{{[0-9]+}}(%rsp)
; SSE-NEXT: movw %ax, -{{[0-9]+}}(%rsp) ; SSE-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
; SSE-NEXT: fldcw -{{[0-9]+}}(%rsp)
; SSE-NEXT: fistpll -{{[0-9]+}}(%rsp) ; SSE-NEXT: fistpll -{{[0-9]+}}(%rsp)
; SSE-NEXT: fldcw -{{[0-9]+}}(%rsp) ; SSE-NEXT: fldcw -{{[0-9]+}}(%rsp)
; SSE-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; SSE-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; SSE-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0] ; SSE-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; SSE-NEXT: xorps %xmm1, %xmm1 ; SSE-NEXT: xorps %xmm1, %xmm1
; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[2,3] ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[2,3]
; SSE-NEXT: retq ; SSE-NEXT: retq
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