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Differential D57376

X86Parser: Fix potential reference to deleted object
ClosedPublic

Authored by BrandonTJones on Jan 29 2019, 3:24 AM.

Details

Reviewers
andreadb
grosbach
craig.topper
Commits
rGfd880d30b194: X86Parser: Fix potential reference to deleted object
rL356973: X86Parser: Fix potential reference to deleted object
Summary

Within the MatchFPUWaitAlias function, Operands[0] is potentially overwritten leading to &Op referencing a deleted object. To fix this, assign the reference after the function.

Diff Detail

Repository
rL LLVM

Event Timeline

BrandonTJones created this revision.Jan 29 2019, 3:24 AM
Herald added subscribers: llvm-commits, hiraditya. · View Herald TranscriptJan 29 2019, 3:24 AM
BrandonTJones updated this revision to Diff 184069.Jan 29 2019, 5:46 AM
BrandonTJones updated this revision to Diff 184071.Jan 29 2019, 5:56 AM

Mistake diffing against a wrong commit

BrandonTJones added a comment.Feb 19 2019, 7:22 AM

ping

Herald added a project: Restricted Project. · View Herald TranscriptFeb 19 2019, 7:22 AM
BrandonTJones added a comment.Feb 28 2019, 2:50 AM

ping

craig.topper added a subscriber: craig.topper.Feb 28 2019, 10:54 AM

Doesn't this same issue exit in MatchAndEmitIntelInstruction?

BrandonTJones updated this revision to Diff 191475.Mar 20 2019, 4:35 AM

Added the change to EmitIntelInstruction Also.

craig.topper accepted this revision.Mar 21 2019, 10:52 PM
craig.topper added a reviewer: craig.topper.
craig.topper removed a subscriber: craig.topper.

LGTM

This revision is now accepted and ready to land.Mar 21 2019, 10:54 PM
BrandonTJones added a comment.Mar 25 2019, 2:29 AM

I do not have permissions to commit, can you do it for me? Thanks.

Closed by commit rL356973: X86Parser: Fix potential reference to deleted object (authored by ctopper). · Explain WhyMar 25 2019, 8:11 PM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
trunk/
lib/
Target/
X86/
AsmParser/
18 lines

Diff 192241

llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp

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} }
bool X86AsmParser::MatchAndEmitATTInstruction(SMLoc IDLoc, unsigned &Opcode, bool X86AsmParser::MatchAndEmitATTInstruction(SMLoc IDLoc, unsigned &Opcode,
OperandVector &Operands, OperandVector &Operands,
MCStreamer &Out, MCStreamer &Out,
uint64_t &ErrorInfo, uint64_t &ErrorInfo,
bool MatchingInlineAsm) { bool MatchingInlineAsm) {
assert(!Operands.empty() && "Unexpect empty operand list!"); assert(!Operands.empty() && "Unexpect empty operand list!");
X86Operand &Op = static_cast<X86Operand &>(*Operands[0]); assert((*Operands[0]).isToken() && "Leading operand should always be a mnemonic!");
assert(Op.isToken() && "Leading operand should always be a mnemonic!");
SMRange EmptyRange = None; SMRange EmptyRange = None;
// First, handle aliases that expand to multiple instructions. // First, handle aliases that expand to multiple instructions.
MatchFPUWaitAlias(IDLoc, Op, Operands, Out, MatchingInlineAsm); MatchFPUWaitAlias(IDLoc, static_cast<X86Operand &>(*Operands[0]), Operands,
Out, MatchingInlineAsm);
X86Operand &Op = static_cast<X86Operand &>(*Operands[0]);
bool WasOriginallyInvalidOperand = false; bool WasOriginallyInvalidOperand = false;
unsigned Prefixes = getPrefixes(Operands); unsigned Prefixes = getPrefixes(Operands);
MCInst Inst; MCInst Inst;
if (Prefixes) if (Prefixes)
Inst.setFlags(Prefixes); Inst.setFlags(Prefixes);
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} }
bool X86AsmParser::MatchAndEmitIntelInstruction(SMLoc IDLoc, unsigned &Opcode, bool X86AsmParser::MatchAndEmitIntelInstruction(SMLoc IDLoc, unsigned &Opcode,
OperandVector &Operands, OperandVector &Operands,
MCStreamer &Out, MCStreamer &Out,
uint64_t &ErrorInfo, uint64_t &ErrorInfo,
bool MatchingInlineAsm) { bool MatchingInlineAsm) {
assert(!Operands.empty() && "Unexpect empty operand list!"); assert(!Operands.empty() && "Unexpect empty operand list!");
X86Operand &Op = static_cast<X86Operand &>(*Operands[0]); assert((*Operands[0]).isToken() && "Leading operand should always be a mnemonic!");
assert(Op.isToken() && "Leading operand should always be a mnemonic!"); StringRef Mnemonic = (static_cast<X86Operand &>(*Operands[0])).getToken();
StringRef Mnemonic = Op.getToken();
SMRange EmptyRange = None; SMRange EmptyRange = None;
StringRef Base = Op.getToken(); StringRef Base = (static_cast<X86Operand &>(*Operands[0])).getToken();
unsigned Prefixes = getPrefixes(Operands); unsigned Prefixes = getPrefixes(Operands);
// First, handle aliases that expand to multiple instructions. // First, handle aliases that expand to multiple instructions.
MatchFPUWaitAlias(IDLoc, Op, Operands, Out, MatchingInlineAsm); MatchFPUWaitAlias(IDLoc, static_cast<X86Operand &>(*Operands[0]), Operands, Out, MatchingInlineAsm);
X86Operand &Op = static_cast<X86Operand &>(*Operands[0]);
MCInst Inst; MCInst Inst;
if (Prefixes) if (Prefixes)
Inst.setFlags(Prefixes); Inst.setFlags(Prefixes);
// Find one unsized memory operand, if present. // Find one unsized memory operand, if present.
X86Operand *UnsizedMemOp = nullptr; X86Operand *UnsizedMemOp = nullptr;
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