add -march=cascadelake support in clang

[Jianping]

Summary

add -march=cascadelake support in clang

[craig.topper]

LGTM

include/clang/Basic/X86Target.def

 /// Skylake client microarchitecture based processors.
 PROC_WITH_FEAT(SkylakeClient, "skylake", PROC_64_BIT, FEATURE_AVX2)
 
 /// \name Skylake Server
 /// Skylake server microarchitecture based processors.
 PROC_WITH_FEAT(SkylakeServer, "skylake-avx512", PROC_64_BIT, FEATURE_AVX512F)
 PROC_ALIAS(SkylakeServer, "skx")
 
+/// \name Cascadelake Server
+/// Cascadelake Server microarchitecture based processors.
+PROC_WITH_FEAT(Cascadelake, "cascadelake", PROC_64_BIT, FEATURE_AVX512VNNI)
+
 /// \name Cannonlake Client
 /// Cannonlake client microarchitecture based processors.
 PROC_WITH_FEAT(Cannonlake, "cannonlake", PROC_64_BIT, FEATURE_AVX512VBMI)
 
 /// \name Icelake Client
 /// Icelake client microarchitecture based processors.
 PROC(IcelakeClient, "icelake-client", PROC_64_BIT)
 

lib/Basic/Targets/X86.cpp

case CK_IcelakeServer:
     setFeatureEnabledImpl(Features, "pconfig", true);
     setFeatureEnabledImpl(Features, "wbnoinvd", true);
     LLVM_FALLTHROUGH;
   case CK_IcelakeClient:
     setFeatureEnabledImpl(Features, "vaes", true);
     setFeatureEnabledImpl(Features, "gfni", true);
     setFeatureEnabledImpl(Features, "vpclmulqdq", true);
     setFeatureEnabledImpl(Features, "avx512bitalg", true);
-    setFeatureEnabledImpl(Features, "avx512vnni", true);
     setFeatureEnabledImpl(Features, "avx512vbmi2", true);
     setFeatureEnabledImpl(Features, "avx512vpopcntdq", true);
     setFeatureEnabledImpl(Features, "rdpid", true);
     LLVM_FALLTHROUGH;
   case CK_Cannonlake:
     setFeatureEnabledImpl(Features, "avx512ifma", true);
     setFeatureEnabledImpl(Features, "avx512vbmi", true);
     setFeatureEnabledImpl(Features, "sha", true);
     LLVM_FALLTHROUGH;
+  case CK_Cascadelake:
+    //Cannonlake has no VNNI feature inside while Icelake has
+    if (Kind != CK_Cannonlake)
+      // CLK inherits all SKX features plus AVX512_VNNI
+      setFeatureEnabledImpl(Features, "avx512vnni", true);
+    LLVM_FALLTHROUGH;
   case CK_SkylakeServer:
     setFeatureEnabledImpl(Features, "avx512f", true);
     setFeatureEnabledImpl(Features, "avx512cd", true);
     setFeatureEnabledImpl(Features, "avx512dq", true);
     setFeatureEnabledImpl(Features, "avx512bw", true);
     setFeatureEnabledImpl(Features, "avx512vl", true);
     setFeatureEnabledImpl(Features, "pku", true);
     if (Kind != CK_Cannonlake) // CNL inherits all SKX features, except CLWB
       setFeatureEnabledImpl(Features, "clwb", true);
     LLVM_FALLTHROUGH;
   case CK_SkylakeClient:
     setFeatureEnabledImpl(Features, "xsavec", true);
     setFeatureEnabledImpl(Features, "xsaves", true);
     setFeatureEnabledImpl(Features, "mpx", true);
-    if (Kind != CK_SkylakeServer) // SKX inherits all SKL features, except SGX
+    if (Kind != CK_SkylakeServer
+        && Kind != CK_Cascadelake)
+      // SKX/CLX inherits all SKL features, except SGX
       setFeatureEnabledImpl(Features, "sgx", true);
     setFeatureEnabledImpl(Features, "clflushopt", true);
     setFeatureEnabledImpl(Features, "aes", true);
     LLVM_FALLTHROUGH;
   case CK_Broadwell:
     setFeatureEnabledImpl(Features, "rdseed", true);
     setFeatureEnabledImpl(Features, "adx", true);
     setFeatureEnabledImpl(Features, "prfchw", true);
void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
   case CK_Nehalem:
   case CK_Westmere:
   case CK_SandyBridge:
   case CK_IvyBridge:
   case CK_Haswell:
   case CK_Broadwell:
   case CK_SkylakeClient:
   case CK_SkylakeServer:
+  case CK_Cascadelake:
   case CK_Cannonlake:
   case CK_IcelakeClient:
   case CK_IcelakeServer:
     // FIXME: Historically, we defined this legacy name, it would be nice to
     // remove it at some point. We've never exposed fine-grained names for
     // recent primary x86 CPUs, and we should keep it that way.
     defineCPUMacros(Builder, "corei7");
     break;

test/Driver/x86-march.c

 // RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=skylake-avx512 2>&1 \
 // RUN:   | FileCheck %s -check-prefix=skylake-avx512
 // skylake-avx512: "-target-cpu" "skylake-avx512"
 //
 // RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=skx 2>&1 \
 // RUN:   | FileCheck %s -check-prefix=skx
 // skx: "-target-cpu" "skx"
 //
+// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=cascadelake 2>&1 \
+// RUN:   | FileCheck %s -check-prefix=cascadelake
+// cascadelake: "-target-cpu" "cascadelake"
+//
 // RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=knl 2>&1 \
 // RUN:   | FileCheck %s -check-prefix=knl
 // knl: "-target-cpu" "knl"
 //
 // RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=knm 2>&1 \
 // RUN:   | FileCheck %s -check-prefix=knm
 // knm: "-target-cpu" "knm"
 //

test/Misc/target-invalid-cpu-note.c

 // RUN: not %clang_cc1 -triple i386--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix X86
 // X86: error: unknown target CPU 'not-a-cpu'
 // X86: note: valid target CPU values are: i386, i486, winchip-c6, winchip2, c3,
 // X86-SAME: i586, pentium, pentium-mmx, pentiumpro, i686, pentium2, pentium3,
 // X86-SAME: pentium3m, pentium-m, c3-2, yonah, pentium4, pentium4m, prescott,
 // X86-SAME: nocona, core2, penryn, bonnell, atom, silvermont, slm, goldmont, goldmont-plus, tremont,
 // X86-SAME: nehalem, corei7, westmere, sandybridge, corei7-avx, ivybridge,
 // X86-SAME: core-avx-i, haswell, core-avx2, broadwell, skylake, skylake-avx512,
-// X86-SAME: skx, cannonlake, icelake-client, icelake-server, knl, knm, lakemont, k6, k6-2, k6-3,
+// X86-SAME: skx, cascadelake, cannonlake, icelake-client, icelake-server, knl, knm, lakemont, k6, k6-2, k6-3,
 // X86-SAME: athlon, athlon-tbird, athlon-xp, athlon-mp, athlon-4, k8, athlon64,
 // X86-SAME: athlon-fx, opteron, k8-sse3, athlon64-sse3, opteron-sse3, amdfam10,
 // X86-SAME: barcelona, btver1, btver2, bdver1, bdver2, bdver3, bdver4, znver1,
 // X86-SAME: x86-64, geode
 
 // RUN: not %clang_cc1 -triple x86_64--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix X86_64
 // X86_64: error: unknown target CPU 'not-a-cpu'
 // X86_64: note: valid target CPU values are: nocona, core2, penryn, bonnell,
 // X86_64-SAME: atom, silvermont, slm, goldmont, goldmont-plus, tremont, nehalem, corei7, westmere,
 // X86_64-SAME: sandybridge, corei7-avx, ivybridge, core-avx-i, haswell,
-// X86_64-SAME: core-avx2, broadwell, skylake, skylake-avx512, skx, cannonlake,
+// X86_64-SAME: core-avx2, broadwell, skylake, skylake-avx512, skx, cascadelake, cannonlake,
 // X86_64-SAME: icelake-client, icelake-server, knl, knm, k8, athlon64, athlon-fx, opteron, k8-sse3,
 // X86_64-SAME: athlon64-sse3, opteron-sse3, amdfam10, barcelona, btver1,
 // X86_64-SAME: btver2, bdver1, bdver2, bdver3, bdver4, znver1, x86-64
 
 // RUN: not %clang_cc1 -triple nvptx--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix NVPTX
 // NVPTX: error: unknown target CPU 'not-a-cpu'
 // NVPTX: note: valid target CPU values are: sm_20, sm_21, sm_30, sm_32, sm_35,
 // NVPTX-SAME: sm_37, sm_50, sm_52, sm_53, sm_60, sm_61, sm_62, sm_70, sm_72

test/Preprocessor/predefined-arch-macros.c

 // CHECK_SKX_M64: #define __amd64 1
 // CHECK_SKX_M64: #define __amd64__ 1
 // CHECK_SKX_M64: #define __corei7 1
 // CHECK_SKX_M64: #define __corei7__ 1
 // CHECK_SKX_M64: #define __tune_corei7__ 1
 // CHECK_SKX_M64: #define __x86_64 1
 // CHECK_SKX_M64: #define __x86_64__ 1
 
+// RUN: %clang -march=cascadelake -m32 -E -dM %s -o - 2>&1 \
+// RUN:     -target i386-unknown-linux \
+// RUN:   | FileCheck -match-full-lines %s -check-prefix=CHECK_CLX_M32
+// CHECK_CLX_M32: #define __AES__ 1
+// CHECK_CLX_M32: #define __AVX2__ 1
+// CHECK_CLX_M32: #define __AVX512BW__ 1
+// CHECK_CLX_M32: #define __AVX512CD__ 1
+// CHECK_CLX_M32: #define __AVX512DQ__ 1
+// CHECK_CLX_M32: #define __AVX512F__ 1
+// CHECK_CLX_M32: #define __AVX512VL__ 1
+// CHECK_CLX_M32: #define __AVX512VNNI__ 1
+// CHECK_CLX_M32: #define __AVX__ 1
+// CHECK_CLX_M32: #define __BMI2__ 1
+// CHECK_CLX_M32: #define __BMI__ 1
+// CHECK_CLX_M32: #define __CLFLUSHOPT__ 1
+// CHECK_CLX_M32: #define __CLWB__ 1
+// CHECK_CLX_M32: #define __F16C__ 1
+// CHECK_CLX_M32: #define __FMA__ 1
+// CHECK_CLX_M32: #define __INVPCID__ 1
+// CHECK_CLX_M32: #define __LZCNT__ 1
+// CHECK_CLX_M32: #define __MMX__ 1
+// CHECK_CLX_M32: #define __MOVBE__ 1
+// CHECK_CLX_M32: #define __MPX__ 1
+// CHECK_CLX_M32: #define __PCLMUL__ 1
+// CHECK_CLX_M32: #define __PKU__ 1
+// CHECK_CLX_M32: #define __POPCNT__ 1
+// CHECK_CLX_M32: #define __PRFCHW__ 1
+// CHECK_CLX_M32: #define __RDRND__ 1
+// CHECK_CLX_M32: #define __RDSEED__ 1
+// CHECK_CLX_M32-NOT: #define __SGX__ 1
+// CHECK_CLX_M32: #define __SSE2__ 1
+// CHECK_CLX_M32: #define __SSE3__ 1
+// CHECK_CLX_M32: #define __SSE4_1__ 1
+// CHECK_CLX_M32: #define __SSE4_2__ 1
+// CHECK_CLX_M32: #define __SSE__ 1
+// CHECK_CLX_M32: #define __SSSE3__ 1
+// CHECK_CLX_M32: #define __XSAVEC__ 1
+// CHECK_CLX_M32: #define __XSAVEOPT__ 1
+// CHECK_CLX_M32: #define __XSAVES__ 1
+// CHECK_CLX_M32: #define __XSAVE__ 1
+// CHECK_CLX_M32: #define __corei7 1
+// CHECK_CLX_M32: #define __corei7__ 1
+// CHECK_CLX_M32: #define __i386 1
+// CHECK_CLX_M32: #define __i386__ 1
+// CHECK_CLX_M32: #define __tune_corei7__ 1
+// CHECK_CLX_M32: #define i386 1
+
+// RUN: %clang -march=cascadelake -m64 -E -dM %s -o - 2>&1 \
+// RUN:     -target i386-unknown-linux \
+// RUN:   | FileCheck -match-full-lines %s -check-prefix=CHECK_CLX_M64
+// CHECK_CLX_M64: #define __AES__ 1
+// CHECK_CLX_M64: #define __AVX2__ 1
+// CHECK_CLX_M64: #define __AVX512BW__ 1
+// CHECK_CLX_M64: #define __AVX512CD__ 1
+// CHECK_CLX_M64: #define __AVX512DQ__ 1
+// CHECK_CLX_M64: #define __AVX512F__ 1
+// CHECK_CLX_M64: #define __AVX512VL__ 1
+// CHECK_CLX_M64: #define __AVX512VNNI__ 1
+// CHECK_CLX_M64: #define __AVX__ 1
+// CHECK_CLX_M64: #define __BMI2__ 1
+// CHECK_CLX_M64: #define __BMI__ 1
+// CHECK_CLX_M64: #define __CLFLUSHOPT__ 1
+// CHECK_CLX_M64: #define __CLWB__ 1
+// CHECK_CLX_M64: #define __F16C__ 1
+// CHECK_CLX_M64: #define __FMA__ 1
+// CHECK_CLX_M64: #define __INVPCID__ 1
+// CHECK_CLX_M64: #define __LZCNT__ 1
+// CHECK_CLX_M64: #define __MMX__ 1
+// CHECK_CLX_M64: #define __MOVBE__ 1
+// CHECK_CLX_M64: #define __MPX__ 1
+// CHECK_CLX_M64: #define __PCLMUL__ 1
+// CHECK_CLX_M64: #define __PKU__ 1
+// CHECK_CLX_M64: #define __POPCNT__ 1
+// CHECK_CLX_M64: #define __PRFCHW__ 1
+// CHECK_CLX_M64: #define __RDRND__ 1
+// CHECK_CLX_M64: #define __RDSEED__ 1
+// CHECK_CLX_M64-NOT: #define __SGX__ 1
+// CHECK_CLX_M64: #define __SSE2_MATH__ 1
+// CHECK_CLX_M64: #define __SSE2__ 1
+// CHECK_CLX_M64: #define __SSE3__ 1
+// CHECK_CLX_M64: #define __SSE4_1__ 1
+// CHECK_CLX_M64: #define __SSE4_2__ 1
+// CHECK_CLX_M64: #define __SSE_MATH__ 1
+// CHECK_CLX_M64: #define __SSE__ 1
+// CHECK_CLX_M64: #define __SSSE3__ 1
+// CHECK_CLX_M64: #define __XSAVEC__ 1
+// CHECK_CLX_M64: #define __XSAVEOPT__ 1
+// CHECK_CLX_M64: #define __XSAVES__ 1
+// CHECK_CLX_M64: #define __XSAVE__ 1
+// CHECK_CLX_M64: #define __amd64 1
+// CHECK_CLX_M64: #define __amd64__ 1
+// CHECK_CLX_M64: #define __corei7 1
+// CHECK_CLX_M64: #define __corei7__ 1
+// CHECK_CLX_M64: #define __tune_corei7__ 1
+// CHECK_CLX_M64: #define __x86_64 1
+// CHECK_CLX_M64: #define __x86_64__ 1
+
 // RUN: %clang -march=cannonlake -m32 -E -dM %s -o - 2>&1 \
 // RUN:     -target i386-unknown-linux \
 // RUN:   | FileCheck -match-full-lines %s -check-prefix=CHECK_CNL_M32
 // CHECK_CNL_M32: #define __AES__ 1
 // CHECK_CNL_M32: #define __AVX2__ 1
 // CHECK_CNL_M32: #define __AVX512BW__ 1
 // CHECK_CNL_M32: #define __AVX512CD__ 1
 // CHECK_CNL_M32: #define __AVX512DQ__ 1