[ELF] - Refactor getRelocTargetVA(). NFC.

[grimar]

Summary

Currently getRelocTargetVA handles relocation expressions
for all targets at once, mixing the common expressions and
target-specific expressions.

This approach has noticeable disadvantages:

1. When debugging the code for some target, expressions specific

to other targets are unuseful. It is harder to read when logic for all kinds
of target specific code is mixed in one place.

2. If we do a mistake in code and will use expression specific for target A

for target B, current code would not catch that. It's perhaps unlikely to happen,
but still not as safe/isolated as it could be.

[grimar]

ELF/InputSection.cpp

786

Since this code does not use anything target specific, I think
R_HEXAGON_GOT should not have HEXAGON prefix and can be renamed
and moved to the common handlers group.

[grimar]

Rui, what do you think about this? Should we try to group the expressions by target platform like this patch do? (I'll rebase it then)

[ruiu]

Honestly I don't think the new code is better than the existing one. All target-specific relocation types are clearly prefixed with target names (e.g. R_AARCH64 or R_HEXAGON), and I kind of like the old code as it is just a flat switch-case list.

[grimar]

OK, abandoning.

ELF/InputSection.cpp

case EM_PPC64:
     // offset to reach 0x1000 of TCB/thread-library data and 0xf000 of the
     // program's TLS segment.
     return -0x7000;
   default:
     llvm_unreachable("unhandled Config->EMachine");
   }
 }
 
-static uint64_t getRelocTargetVA(const InputFile *File, RelType Type, int64_t A,
-                                 uint64_t P, const Symbol &Sym, RelExpr Expr) {
+static uint64_t calcAArch64ExprVA(const InputFile *File, RelType Type,
+                                  int64_t A, uint64_t P, const Symbol &Sym,
+                                  RelExpr Expr) {
   switch (Expr) {
-  case R_INVALID:
-    return 0;
-  case R_ABS:
-  case R_RELAX_TLS_LD_TO_LE_ABS:
-  case R_RELAX_GOT_PC_NOPIC:
-    return Sym.getVA(A);
-  case R_ADDEND:
-    return A;
-  case R_ARM_SBREL:
-    return Sym.getVA(A) - getARMStaticBase(Sym);
-  case R_GOT:
-  case R_RELAX_TLS_GD_TO_IE_ABS:
-    return Sym.getGotVA() + A;
-  case R_GOTONLY_PC:
-    return In.Got->getVA() + A - P;
-  case R_GOTONLY_PC_FROM_END:
-    return In.Got->getVA() + A - P + In.Got->getSize();
-  case R_GOTREL:
-    return Sym.getVA(A) - In.Got->getVA();
-  case R_GOTREL_FROM_END:
-    return Sym.getVA(A) - In.Got->getVA() - In.Got->getSize();
-  case R_GOT_FROM_END:
-  case R_RELAX_TLS_GD_TO_IE_END:
-    return Sym.getGotOffset() + A - In.Got->getSize();
-  case R_TLSLD_GOT_OFF:
-  case R_GOT_OFF:
-  case R_RELAX_TLS_GD_TO_IE_GOT_OFF:
-    return Sym.getGotOffset() + A;
   case R_AARCH64_GOT_PAGE_PC:
   case R_AARCH64_RELAX_TLS_GD_TO_IE_PAGE_PC:
     return getAArch64Page(Sym.getGotVA() + A) - getAArch64Page(P);
-  case R_GOT_PC:
-  case R_RELAX_TLS_GD_TO_IE:
-    return Sym.getGotVA() + A - P;
-  case R_HEXAGON_GOT:
-    return Sym.getGotVA() - In.GotPlt->getVA();
+  case R_AARCH64_PAGE_PC: {
+    uint64_t Val = Sym.isUndefWeak() ? A : Sym.getVA(A);
+    return getAArch64Page(Val) - getAArch64Page(P);
+  }
+  case R_AARCH64_PLT_PAGE_PC: {
+    uint64_t Val = Sym.isUndefWeak() ? A : Sym.getPltVA() + A;
+    return getAArch64Page(Val) - getAArch64Page(P);
+  }
+  case R_AARCH64_TLSDESC_PAGE:
+    return getAArch64Page(In.Got->getGlobalDynAddr(Sym) + A) -
+           getAArch64Page(P);
+
+  default:
+    llvm_unreachable("invalid expression");
+  }
+}
+
+static uint64_t calcMipsExprVA(const InputFile *File, RelType Type, int64_t A,
+                               uint64_t P, const Symbol &Sym, RelExpr Expr) {
+  switch (Expr) {
   case R_MIPS_GOTREL:
     return Sym.getVA(A) - In.MipsGot->getGp(File);
   case R_MIPS_GOT_GP:
     return In.MipsGot->getGp(File) + A;
   case R_MIPS_GOT_GP_PC: {
     // R_MIPS_LO16 expression has R_MIPS_GOT_GP_PC type iif the target
     // is _gp_disp symbol. In that case we should use the following
     // formula for calculation "AHL + GP - P + 4". For details see p. 4-19 at
case R_MIPS_GOT_OFF32:
     return In.MipsGot->getVA() + In.MipsGot->getSymEntryOffset(File, Sym, A) -
            In.MipsGot->getGp(File);
   case R_MIPS_TLSGD:
     return In.MipsGot->getVA() + In.MipsGot->getGlobalDynOffset(File, Sym) -
            In.MipsGot->getGp(File);
   case R_MIPS_TLSLD:
     return In.MipsGot->getVA() + In.MipsGot->getTlsIndexOffset(File) -
            In.MipsGot->getGp(File);
-  case R_AARCH64_PAGE_PC: {
-    uint64_t Val = Sym.isUndefWeak() ? A : Sym.getVA(A);
-    return getAArch64Page(Val) - getAArch64Page(P);
-  }
-  case R_AARCH64_PLT_PAGE_PC: {
-    uint64_t Val = Sym.isUndefWeak() ? A : Sym.getPltVA() + A;
-    return getAArch64Page(Val) - getAArch64Page(P);
-  }
-  case R_RISCV_PC_INDIRECT: {
-    const Relocation *HiRel = getRISCVPCRelHi20(&Sym, A);
-    if (!HiRel)
-      return 0;
-    return getRelocTargetVA(File, HiRel->Type, HiRel->Addend, Sym.getVA(),
-                            *HiRel->Sym, HiRel->Expr);
-  }
-  case R_PC: {
-    uint64_t Dest;
-    if (Sym.isUndefWeak()) {
-      // On ARM and AArch64 a branch to an undefined weak resolves to the
-      // next instruction, otherwise the place.
-      if (Config->EMachine == EM_ARM)
-        Dest = getARMUndefinedRelativeWeakVA(Type, A, P);
-      else if (Config->EMachine == EM_AARCH64)
-        Dest = getAArch64UndefinedRelativeWeakVA(Type, A, P);
-      else
-        Dest = Sym.getVA(A);
-    } else {
-      Dest = Sym.getVA(A);
-    }
-    return Dest - P;
-  }
-  case R_PLT:
-    return Sym.getPltVA() + A;
-  case R_PLT_PC:
+  default:
+    llvm_unreachable("invalid expression");
+
+static uint64_t calcPPCExprVA(const InputFile *File, RelType Type, int64_t A,
+                              uint64_t P, const Symbol &Sym, RelExpr Expr) {
+  switch (Expr) {
   case R_PPC_CALL_PLT:
     return Sym.getPltVA() + A - P;
   case R_PPC_CALL: {
     uint64_t SymVA = Sym.getVA(A);
     // If we have an undefined weak symbol, we might get here with a symbol
     // address of zero. That could overflow, but the code must be unreachable,
     // so don't bother doing anything at all.
     if (!SymVA)
       return 0;
 
     // PPC64 V2 ABI describes two entry points to a function. The global entry
     // point is used for calls where the caller and callee (may) have different
     // TOC base pointers and r2 needs to be modified to hold the TOC base for
     // the callee. For local calls the caller and callee share the same
     // TOC base and so the TOC pointer initialization code should be skipped by
     // branching to the local entry point.
     return SymVA - P + getPPC64GlobalEntryToLocalEntryOffset(Sym.StOther);
   }
   case R_PPC_TOC:
     return getPPC64TocBase() + A;
+  default:
+    llvm_unreachable("invalid expression");
+  }
+}
+
+static uint64_t getRelocTargetVA(const InputFile *File, RelType Type, int64_t A,
+                                 uint64_t P, const Symbol &Sym, RelExpr Expr) {
+  switch (Expr) {
+  case R_INVALID:
+    return 0;
+  case R_ABS:
+  case R_RELAX_TLS_LD_TO_LE_ABS:
+  case R_RELAX_GOT_PC_NOPIC:
+    return Sym.getVA(A);
+  case R_ADDEND:
+    return A;
+  case R_GOT:
+  case R_RELAX_TLS_GD_TO_IE_ABS:
+    return Sym.getGotVA() + A;
+  case R_GOTONLY_PC:
+    return In.Got->getVA() + A - P;
+  case R_GOTONLY_PC_FROM_END:
+    return In.Got->getVA() + A - P + In.Got->getSize();
+  case R_GOTREL:
+    return Sym.getVA(A) - In.Got->getVA();
+  case R_GOTREL_FROM_END:
+    return Sym.getVA(A) - In.Got->getVA() - In.Got->getSize();
+  case R_GOT_FROM_END:
+  case R_RELAX_TLS_GD_TO_IE_END:
+    return Sym.getGotOffset() + A - In.Got->getSize();
+  case R_TLSLD_GOT_OFF:
+  case R_GOT_OFF:
+  case R_RELAX_TLS_GD_TO_IE_GOT_OFF:
+    return Sym.getGotOffset() + A;
+  case R_GOT_PC:
+  case R_RELAX_TLS_GD_TO_IE:
+    return Sym.getGotVA() + A - P;
+  case R_PC:
+    if (Sym.isUndefWeak()) {
+      // On ARM and AArch64 a branch to an undefined weak resolves to the
+      // next instruction, otherwise the place.
+      if (Config->EMachine == EM_ARM)
+        return getARMUndefinedRelativeWeakVA(Type, A, P) - P;
+      if (Config->EMachine == EM_AARCH64)
+        return getAArch64UndefinedRelativeWeakVA(Type, A, P) - P;
+    }
+    return Sym.getVA(A) - P;
+  case R_PLT:
+    return Sym.getPltVA() + A;
+  case R_PLT_PC:
+    return Sym.getPltVA() + A - P;
   case R_RELAX_GOT_PC:
     return Sym.getVA(A) - P;
   case R_RELAX_TLS_GD_TO_LE:
   case R_RELAX_TLS_IE_TO_LE:
   case R_RELAX_TLS_LD_TO_LE:
   case R_TLS:
     // A weak undefined TLS symbol resolves to the base of the TLS
     // block, i.e. gets a value of zero. If we pass --gc-sections to
     // lld and .tbss is not referenced, it gets reclaimed and we don't
     // create a TLS program header. Therefore, we resolve this
     // statically to zero.
     if (Sym.isTls() && Sym.isUndefWeak())
       return 0;
     return Sym.getVA(A) + getTlsTpOffset();
   case R_RELAX_TLS_GD_TO_LE_NEG:
   case R_NEG_TLS:
     return Out::TlsPhdr->p_memsz - Sym.getVA(A);
   case R_SIZE:
     return Sym.getSize() + A;
   case R_TLSDESC:
     return In.Got->getGlobalDynAddr(Sym) + A;
-  case R_AARCH64_TLSDESC_PAGE:
-    return getAArch64Page(In.Got->getGlobalDynAddr(Sym) + A) -
-           getAArch64Page(P);
   case R_TLSGD_GOT:
     return In.Got->getGlobalDynOffset(Sym) + A;
   case R_TLSGD_GOT_FROM_END:
     return In.Got->getGlobalDynOffset(Sym) + A - In.Got->getSize();
   case R_TLSGD_PC:
     return In.Got->getGlobalDynAddr(Sym) + A - P;
   case R_TLSLD_GOT_FROM_END:
     return In.Got->getTlsIndexOff() + A - In.Got->getSize();
   case R_TLSLD_GOT:
     return In.Got->getTlsIndexOff() + A;
   case R_TLSLD_PC:
     return In.Got->getTlsIndexVA() + A - P;
   default:
-    llvm_unreachable("invalid expression");
+    break;
+  }
+
+  switch (Config->EMachine) {
+  case EM_AARCH64:
+    return calcAArch64ExprVA(File, Type, A, P, Sym, Expr);
+  case EM_ARM:
+    if (Expr == R_ARM_SBREL)
+      return Sym.getVA(A) - getARMStaticBase(Sym);
+    break;
+  case EM_MIPS:
+    return calcMipsExprVA(File, Type, A, P, Sym, Expr);
+  case EM_HEXAGON:
+    if (Expr == R_HEXAGON_GOT)
+      return Sym.getGotVA() - In.GotPlt->getVA();
+    break;
+  case EM_PPC:
+  case EM_PPC64:
+    return calcPPCExprVA(File, Type, A, P, Sym, Expr);
+  case EM_RISCV:
+    if (Expr == R_RISCV_PC_INDIRECT) {
+      if (const Relocation *HiRel = getRISCVPCRelHi20(&Sym, A))
+        return getRelocTargetVA(File, HiRel->Type, HiRel->Addend, Sym.getVA(),
+                                *HiRel->Sym, HiRel->Expr);
+      return 0;
     }
+    break;
+  }
+
+  llvm_unreachable("invalid expression");
 }
 
 // This function applies relocations to sections without SHF_ALLOC bit.
 // Such sections are never mapped to memory at runtime. Debug sections are
 // an example. Relocations in non-alloc sections are much easier to
 // handle than in allocated sections because it will never need complex
 // treatement such as GOT or PLT (because at runtime no one refers them).
 // So, we handle relocations for non-alloc sections directly in this