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Move AESNI generation to Skylake and Goldmont
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Authored by thiagomacieira on Aug 30 2018, 2:46 PM.

Details

Summary

The instruction set first appeared with Westmere, but not all processors
in that and the next few generations have the instructions. According to
Wikipedia[1], the first generation in which all SKUs have AES
instructions are Skylake and Goldmont. I can't find any Skylake,
Kabylake, Kabylake-R or Cannon Lake currently listed at
https://ark.intel.com that says "Intel® AES New Instructions" "No".

This matches GCC commit
https://gcc.gnu.org/ml/gcc-patches/2018-08/msg01940.html

[1] https://en.wikipedia.org/wiki/AES_instruction_set

Diff Detail

Repository
rL LLVM

Event Timeline

thiagomacieira created this revision.Aug 30 2018, 2:46 PM
craig.topper accepted this revision.Aug 30 2018, 3:15 PM

LGTM. Can you update lib/Target/X86/X86.td in LLVM repo as well?

This revision is now accepted and ready to land.Aug 30 2018, 3:15 PM

Sure. Hadn't seen that file.

Do you have commit access, or do you need someone to commit this for you?

This revision was automatically updated to reflect the committed changes.