[LLD] [COFF] Change fatal() into error() when writing chunks to the output

[mstorsjo]

Summary

In most of these cases, it's easy to go on despite the error, printing as many valuable error messages as possible from one run as possible.

[ruiu]

LGTM

lld/trunk/COFF/Chunks.cpp

 // Verify that given sections are appropriate targets for SECREL
 // relocations. This check is relaxed because unfortunately debug
 // sections have section-relative relocations against absolute symbols.
 static bool checkSecRel(const SectionChunk *Sec, OutputSection *OS) {
   if (OS)
     return true;
   if (Sec->isCodeView())
     return false;
-  fatal("SECREL relocation cannot be applied to absolute symbols");
+  error("SECREL relocation cannot be applied to absolute symbols");
+  return false;
 }
 
 static void applySecRel(const SectionChunk *Sec, uint8_t *Off,
                         OutputSection *OS, uint64_t S) {
   if (!checkSecRel(Sec, OS))
     return;
   uint64_t SecRel = S - OS->getRVA();
   if (SecRel > UINT32_MAX) {
void SectionChunk::applyRelX64(uint8_t *Off, uint16_t Type, OutputSection *OS,
   case IMAGE_REL_AMD64_REL32_1:  add32(Off, S - P - 5); break;
   case IMAGE_REL_AMD64_REL32_2:  add32(Off, S - P - 6); break;
   case IMAGE_REL_AMD64_REL32_3:  add32(Off, S - P - 7); break;
   case IMAGE_REL_AMD64_REL32_4:  add32(Off, S - P - 8); break;
   case IMAGE_REL_AMD64_REL32_5:  add32(Off, S - P - 9); break;
   case IMAGE_REL_AMD64_SECTION:  applySecIdx(Off, OS); break;
   case IMAGE_REL_AMD64_SECREL:   applySecRel(this, Off, OS, S); break;
   default:
-    fatal("unsupported relocation type 0x" + Twine::utohexstr(Type) + " in " +
+    error("unsupported relocation type 0x" + Twine::utohexstr(Type) + " in " +
           toString(File));
   }
 }
 
 void SectionChunk::applyRelX86(uint8_t *Off, uint16_t Type, OutputSection *OS,
                                uint64_t S, uint64_t P) const {
   switch (Type) {
   case IMAGE_REL_I386_ABSOLUTE: break;
   case IMAGE_REL_I386_DIR32:    add32(Off, S + Config->ImageBase); break;
   case IMAGE_REL_I386_DIR32NB:  add32(Off, S); break;
   case IMAGE_REL_I386_REL32:    add32(Off, S - P - 4); break;
   case IMAGE_REL_I386_SECTION:  applySecIdx(Off, OS); break;
   case IMAGE_REL_I386_SECREL:   applySecRel(this, Off, OS, S); break;
   default:
-    fatal("unsupported relocation type 0x" + Twine::utohexstr(Type) + " in " +
+    error("unsupported relocation type 0x" + Twine::utohexstr(Type) + " in " +
           toString(File));
   }
 }
 
 static void applyMOV(uint8_t *Off, uint16_t V) {
   write16le(Off, (read16le(Off) & 0xfbf0) | ((V & 0x800) >> 1) | ((V >> 12) & 0xf));
   write16le(Off + 2, (read16le(Off + 2) & 0x8f00) | ((V & 0x700) << 4) | (V & 0xff));
 }
void applyMOV32T(uint8_t *Off, uint32_t V) {
   uint32_t Imm = ImmW | (ImmT << 16);
   V += Imm;                         // add the immediate offset
   applyMOV(Off, V);           // set MOVW operand
   applyMOV(Off + 4, V >> 16); // set MOVT operand
 }
 
 static void applyBranch20T(uint8_t *Off, int32_t V) {
   if (!isInt<21>(V))
-    fatal("relocation out of range");
+    error("relocation out of range");
   uint32_t S = V < 0 ? 1 : 0;
   uint32_t J1 = (V >> 19) & 1;
   uint32_t J2 = (V >> 18) & 1;
   or16(Off, (S << 10) | ((V >> 12) & 0x3f));
   or16(Off + 2, (J1 << 13) | (J2 << 11) | ((V >> 1) & 0x7ff));
 }
 
 void applyBranch24T(uint8_t *Off, int32_t V) {
   if (!isInt<25>(V))
-    fatal("relocation out of range");
+    error("relocation out of range");
   uint32_t S = V < 0 ? 1 : 0;
   uint32_t J1 = ((~V >> 23) & 1) ^ S;
   uint32_t J2 = ((~V >> 22) & 1) ^ S;
   or16(Off, (S << 10) | ((V >> 12) & 0x3ff));
   // Clear out the J1 and J2 bits which may be set.
   write16le(Off + 2, (read16le(Off + 2) & 0xd000) | (J1 << 13) | (J2 << 11) | ((V >> 1) & 0x7ff));
 }
 
 void SectionChunk::applyRelARM(uint8_t *Off, uint16_t Type, OutputSection *OS,
                                uint64_t S, uint64_t P) const {
   // Pointer to thumb code must have the LSB set.
   uint64_t SX = S;
   if (OS && (OS->Header.Characteristics & IMAGE_SCN_MEM_EXECUTE))
     SX |= 1;
   switch (Type) {
   case IMAGE_REL_ARM_ADDR32:    add32(Off, SX + Config->ImageBase); break;
   case IMAGE_REL_ARM_ADDR32NB:  add32(Off, SX); break;
   case IMAGE_REL_ARM_MOV32T:    applyMOV32T(Off, SX + Config->ImageBase); break;
   case IMAGE_REL_ARM_BRANCH20T: applyBranch20T(Off, SX - P - 4); break;
   case IMAGE_REL_ARM_BRANCH24T: applyBranch24T(Off, SX - P - 4); break;
   case IMAGE_REL_ARM_BLX23T:    applyBranch24T(Off, SX - P - 4); break;
   case IMAGE_REL_ARM_SECTION:   applySecIdx(Off, OS); break;
   case IMAGE_REL_ARM_SECREL:    applySecRel(this, Off, OS, S); break;
   default:
-    fatal("unsupported relocation type 0x" + Twine::utohexstr(Type) + " in " +
+    error("unsupported relocation type 0x" + Twine::utohexstr(Type) + " in " +
           toString(File));
   }
 }
 
 // Interpret the existing immediate value as a byte offset to the
 // target symbol, then update the instruction with the immediate as
 // the page offset from the current instruction to the target.
 static void applyArm64Addr(uint8_t *Off, uint64_t S, uint64_t P, int Shift) {

 static void applyArm64Ldr(uint8_t *Off, uint64_t Imm) {
   uint32_t Orig = read32le(Off);
   uint32_t Size = Orig >> 30;
   // 0x04000000 indicates SIMD/FP registers
   // 0x00800000 indicates 128 bit
   if ((Orig & 0x4800000) == 0x4800000)
     Size += 4;
   if ((Imm & ((1 << Size) - 1)) != 0)
-    fatal("misaligned ldr/str offset");
+    error("misaligned ldr/str offset");
   applyArm64Imm(Off, Imm >> Size, Size);
 }
 
 static void applySecRelLow12A(const SectionChunk *Sec, uint8_t *Off,
                               OutputSection *OS, uint64_t S) {
   if (checkSecRel(Sec, OS))
     applyArm64Imm(Off, (S - OS->getRVA()) & 0xfff, 0);
 }

 static void applySecRelLdr(const SectionChunk *Sec, uint8_t *Off,
                            OutputSection *OS, uint64_t S) {
   if (checkSecRel(Sec, OS))
     applyArm64Ldr(Off, (S - OS->getRVA()) & 0xfff);
 }
 
 static void applyArm64Branch26(uint8_t *Off, int64_t V) {
   if (!isInt<28>(V))
-    fatal("relocation out of range");
+    error("relocation out of range");
   or32(Off, (V & 0x0FFFFFFC) >> 2);
 }
 
 static void applyArm64Branch19(uint8_t *Off, int64_t V) {
   if (!isInt<21>(V))
-    fatal("relocation out of range");
+    error("relocation out of range");
   or32(Off, (V & 0x001FFFFC) << 3);
 }
 
 static void applyArm64Branch14(uint8_t *Off, int64_t V) {
   if (!isInt<16>(V))
-    fatal("relocation out of range");
+    error("relocation out of range");
   or32(Off, (V & 0x0000FFFC) << 3);
 }
 
 void SectionChunk::applyRelARM64(uint8_t *Off, uint16_t Type, OutputSection *OS,
                                  uint64_t S, uint64_t P) const {
   switch (Type) {
   case IMAGE_REL_ARM64_PAGEBASE_REL21: applyArm64Addr(Off, S, P, 12); break;
   case IMAGE_REL_ARM64_REL21:          applyArm64Addr(Off, S, P, 0); break;
   case IMAGE_REL_ARM64_PAGEOFFSET_12A: applyArm64Imm(Off, S & 0xfff, 0); break;
   case IMAGE_REL_ARM64_PAGEOFFSET_12L: applyArm64Ldr(Off, S & 0xfff); break;
   case IMAGE_REL_ARM64_BRANCH26:       applyArm64Branch26(Off, S - P); break;
   case IMAGE_REL_ARM64_BRANCH19:       applyArm64Branch19(Off, S - P); break;
   case IMAGE_REL_ARM64_BRANCH14:       applyArm64Branch14(Off, S - P); break;
   case IMAGE_REL_ARM64_ADDR32:         add32(Off, S + Config->ImageBase); break;
   case IMAGE_REL_ARM64_ADDR32NB:       add32(Off, S); break;
   case IMAGE_REL_ARM64_ADDR64:         add64(Off, S + Config->ImageBase); break;
   case IMAGE_REL_ARM64_SECREL:         applySecRel(this, Off, OS, S); break;
   case IMAGE_REL_ARM64_SECREL_LOW12A:  applySecRelLow12A(this, Off, OS, S); break;
   case IMAGE_REL_ARM64_SECREL_HIGH12A: applySecRelHigh12A(this, Off, OS, S); break;
   case IMAGE_REL_ARM64_SECREL_LOW12L:  applySecRelLdr(this, Off, OS, S); break;
   case IMAGE_REL_ARM64_SECTION:        applySecIdx(Off, OS); break;
   default:
-    fatal("unsupported relocation type 0x" + Twine::utohexstr(Type) + " in " +
+    error("unsupported relocation type 0x" + Twine::utohexstr(Type) + " in " +
           toString(File));
   }
 }
 
 void SectionChunk::writeTo(uint8_t *Buf) const {
   if (!hasData())
     return;
   // Copy section contents from source object file to output file.
   ArrayRef<uint8_t> A = getContents();
   if (!A.empty())
     memcpy(Buf + OutputSectionOff, A.data(), A.size());
 
   // Apply relocations.
   size_t InputSize = getSize();
   for (const coff_relocation &Rel : Relocs) {
     // Check for an invalid relocation offset. This check isn't perfect, because
     // we don't have the relocation size, which is only known after checking the
     // machine and relocation type. As a result, a relocation may overwrite the
     // beginning of the following input section.
-    if (Rel.VirtualAddress >= InputSize)
-      fatal("relocation points beyond the end of its parent section");
+    if (Rel.VirtualAddress >= InputSize) {
+      error("relocation points beyond the end of its parent section");
+      continue;
+    }
 
     uint8_t *Off = Buf + OutputSectionOff + Rel.VirtualAddress;
 
     // Get the output section of the symbol for this relocation.  The output
     // section is needed to compute SECREL and SECTION relocations used in debug
     // info.
     auto *Sym =
         dyn_cast_or_null<Defined>(File->getSymbol(Rel.SymbolTableIndex));
     if (!Sym) {
       if (isCodeView() || isDWARF())
         continue;
       // Symbols in early discarded sections are represented using null pointers,
       // so we need to retrieve the name from the object file.
       COFFSymbolRef Sym =
           check(File->getCOFFObj()->getSymbol(Rel.SymbolTableIndex));
       StringRef Name;
       File->getCOFFObj()->getSymbolName(Sym, Name);
-      fatal("relocation against symbol in discarded section: " + Name);
+      error("relocation against symbol in discarded section: " + Name);
+      continue;
     }
     Chunk *C = Sym->getChunk();
     OutputSection *OS = C ? C->getOutputSection() : nullptr;
 
     // Only absolute and __ImageBase symbols lack an output section. For any
     // other symbol, this indicates that the chunk was discarded.  Normally
     // relocations against discarded sections are an error.  However, debug info
     // sections are not GC roots and can end up with these kinds of relocations.
     // Skip these relocations.
     if (!OS && !isa<DefinedAbsolute>(Sym) && !isa<DefinedSynthetic>(Sym)) {
       if (isCodeView() || isDWARF())
         continue;
-      fatal("relocation against symbol in discarded section: " +
+      error("relocation against symbol in discarded section: " +
             Sym->getName());
+      continue;
     }
     uint64_t S = Sym->getRVA();
 
     // Compute the RVA of the relocation for relative relocations.
     uint64_t P = RVA + Rel.VirtualAddress;
     switch (Config->Machine) {
     case AMD64:
       applyRelX64(Off, Rel.Type, OS, S, P);