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[x86] When using "and $0" and "orl $-1" to store 0 and -1 for minsize, make sure the store isn't volatile
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Authored by craig.topper on Aug 3 2018, 2:12 PM.

Details

Summary

If the store is volatile this might be a memory mapped IO access. In that case we shouldn't generate a load that didn't exist in the source

Diff Detail

Event Timeline

craig.topper created this revision.Aug 3 2018, 2:12 PM
RKSimon added inline comments.Aug 5 2018, 1:37 AM
lib/Target/X86/X86InstrCompiler.td
1046

Is there any place more generic we can put this? It doesn't seem x86 specific

craig.topper added inline comments.Aug 6 2018, 9:46 AM
lib/Target/X86/X86InstrCompiler.td
1046

It should probably be hoisted to include/llvm/Target/TargetSelectionDAG.td. SystemZ has this already with this name so we'd have to change that too. Do you want me move it and change SystemZ as a pre-patch. Or do you want it folded in here? Or move SystemZ as a followup?

RKSimon accepted this revision.Aug 6 2018, 10:14 AM

LGTM - probably worth committing the new tests with current codegen as a pre-commit.

lib/Target/X86/X86InstrCompiler.td
1046

Leaving it here and doing the X86/SystemZ merge into TargetSelectionDAG.td as a followup is fine by me.

This revision is now accepted and ready to land.Aug 6 2018, 10:14 AM
This revision was automatically updated to reflect the committed changes.
hans added a comment.Aug 6 2018, 11:48 PM

Thanks for fixing this, Craig!