Enable some pointer authentication instructions for aarch64 v8a targets

[LukeCheeseman]

Summary

• Some of the v8.3 pointer authentication instruction inhabit the Hint space
• These instructions can be assembled to hint instructions which act as NOP instructions prior to v8.3
• This patch permits using the hint instructions for all v8a targets
• Also, correct the RETA{A,B} instructions to match the instruction attributes of RET (set isTerminator and isBarrier)

[javed.absar]

lib/Target/AArch64/AArch64InstrInfo.td

487 ↗

(On Diff #157220)

May be this comment has to change accordingly (with moving of Predicate)

[LukeCheeseman]

lib/Target/AArch64/AArch64InstrInfo.td

487 ↗

(On Diff #157220)

No, these are still v8.3a Pointer Authentication instructions. Only, they will assemble to a legal instruction for v8a architectures.

[thopre]

lib/Target/AArch64/AArch64InstrInfo.td

544 ↗

(On Diff #157220)

This change does not appear related to the change described. It should IMHO either be split in a separate patch or if that is deemed too cumbersome it should at least be mentioned in the patch description (and thus commit message).

[thopre]

LGTM now.

llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td

 // inside the multiclass as the FP16 versions need different predicates.
 defm FCMLA : SIMDThreeSameVectorTiedComplexHSD<1, 0b110, complexrotateop,
                                                "fcmla", null_frag>;
 defm FCADD : SIMDThreeSameVectorComplexHSD<1, 0b111, complexrotateopodd,
                                            "fcadd", null_frag>;
 defm FCMLA : SIMDIndexedTiedComplexHSD<1, 0, 1, complexrotateop, "fcmla",
                                        null_frag>;
 
-let Predicates = [HasV8_3a] in {
-  // v8.3a Pointer Authentication
-  let Uses = [LR], Defs = [LR] in {
-    def PACIAZ   : SystemNoOperands<0b000, "paciaz">;
-    def PACIBZ   : SystemNoOperands<0b010, "pacibz">;
-    def AUTIAZ   : SystemNoOperands<0b100, "autiaz">;
-    def AUTIBZ   : SystemNoOperands<0b110, "autibz">;
-  }
-  let Uses = [LR, SP], Defs = [LR] in {
-    def PACIASP  : SystemNoOperands<0b001, "paciasp">;
-    def PACIBSP  : SystemNoOperands<0b011, "pacibsp">;
-    def AUTIASP  : SystemNoOperands<0b101, "autiasp">;
-    def AUTIBSP  : SystemNoOperands<0b111, "autibsp">;
-  }
-  let Uses = [X16, X17], Defs = [X17], CRm = 0b0001 in {
-    def PACIA1716  : SystemNoOperands<0b000, "pacia1716">;
-    def PACIB1716  : SystemNoOperands<0b010, "pacib1716">;
-    def AUTIA1716  : SystemNoOperands<0b100, "autia1716">;
-    def AUTIB1716  : SystemNoOperands<0b110, "autib1716">;
-  }
+// These instructions inhabit part of the hint space and so can be used for
+// armv8 targets
 
-  let Uses = [LR], Defs = [LR], CRm = 0b0000 in {
-    def XPACLRI   : SystemNoOperands<0b111, "xpaclri">;
-  }
 
+// These pointer authentication isntructions require armv8.3a
+let Predicates = [HasV8_3a] in {
   multiclass SignAuth<bits<3> prefix, bits<3> prefix_z, string asm> {
     def IA   : SignAuthOneData<prefix, 0b00, !strconcat(asm, "ia")>;
     def IB   : SignAuthOneData<prefix, 0b01, !strconcat(asm, "ib")>;
     def DA   : SignAuthOneData<prefix, 0b10, !strconcat(asm, "da")>;
     def DB   : SignAuthOneData<prefix, 0b11, !strconcat(asm, "db")>;
     def IZA  : SignAuthZero<prefix_z, 0b00, !strconcat(asm, "iza")>;
     def DZA  : SignAuthZero<prefix_z, 0b10, !strconcat(asm, "dza")>;
     def IZB  : SignAuthZero<prefix_z, 0b01, !strconcat(asm, "izb")>;
let Predicates = [HasV8_3a] in {
   def BLRAA   : AuthBranchTwoOperands<1, 0, "blraa">;
   def BLRAB   : AuthBranchTwoOperands<1, 1, "blrab">;
 
   def BRAAZ   : AuthOneOperand<0b000, 0, "braaz">;
   def BRABZ   : AuthOneOperand<0b000, 1, "brabz">;
   def BLRAAZ  : AuthOneOperand<0b001, 0, "blraaz">;
   def BLRABZ  : AuthOneOperand<0b001, 1, "blrabz">;
 
-  let isReturn = 1 in {
+  let isReturn = 1, isTerminator = 1, isBarrier = 1 in {
     def RETAA   : AuthReturn<0b010, 0, "retaa">;
     def RETAB   : AuthReturn<0b010, 1, "retab">;
     def ERETAA  : AuthReturn<0b100, 0, "eretaa">;
     def ERETAB  : AuthReturn<0b100, 1, "eretab">;
   }
 
   defm LDRAA  : AuthLoad<0, "ldraa", simm10Scaled>;
   defm LDRAB  : AuthLoad<1, "ldrab", simm10Scaled>;

llvm/trunk/test/MC/AArch64/armv8.3a-signed-pointer.s

 // CHECK-REQ: error: expected writable system register or pstate
 // CHECK-REQ: error: expected writable system register or pstate
 // CHECK-REQ: error: expected writable system register or pstate
 // CHECK-REQ: error: expected writable system register or pstate
 // CHECK-REQ: error: expected writable system register or pstate
 
   paciasp
 // CHECK: paciasp        // encoding: [0x3f,0x23,0x03,0xd5]
-// CHECK-REQ: error: instruction requires: armv8.3a
+// CHECK-REQ-NOT: error: instruction requires: armv8.3a
   autiasp
 // CHECK: autiasp        // encoding: [0xbf,0x23,0x03,0xd5]
-// CHECK-REQ: error: instruction requires: armv8.3a
+// CHECK-REQ-NOT: error: instruction requires: armv8.3a
   paciaz
 // CHECK: paciaz         // encoding: [0x1f,0x23,0x03,0xd5]
-// CHECK-REQ: error: instruction requires: armv8.3a
+// CHECK-REQ-NOT: error: instruction requires: armv8.3a
   autiaz
 // CHECK: autiaz         // encoding: [0x9f,0x23,0x03,0xd5]
-// CHECK-REQ: error: instruction requires: armv8.3a
+// CHECK-REQ-NOT: error: instruction requires: armv8.3a
   pacia1716
 // CHECK: pacia1716      // encoding: [0x1f,0x21,0x03,0xd5]
-// CHECK-REQ: error: instruction requires: armv8.3a
+// CHECK-REQ-NOT: error: instruction requires: armv8.3a
   autia1716
 // CHECK: autia1716      // encoding: [0x9f,0x21,0x03,0xd5]
-// CHECK-REQ: error: instruction requires: armv8.3a
+// CHECK-REQ-NOT: error: instruction requires: armv8.3a
   pacibsp
 // CHECK: pacibsp        // encoding: [0x7f,0x23,0x03,0xd5]
-// CHECK-REQ: error: instruction requires: armv8.3a
+// CHECK-REQ-NOT: error: instruction requires: armv8.3a
   autibsp
 // CHECK: autibsp        // encoding: [0xff,0x23,0x03,0xd5]
-// CHECK-REQ: error: instruction requires: armv8.3a
+// CHECK-REQ-NOT: error: instruction requires: armv8.3a
   pacibz
 // CHECK: pacibz         // encoding: [0x5f,0x23,0x03,0xd5]
-// CHECK-REQ: error: instruction requires: armv8.3a
+// CHECK-REQ-NOT: error: instruction requires: armv8.3a
   autibz
 // CHECK: autibz         // encoding: [0xdf,0x23,0x03,0xd5]
-// CHECK-REQ: error: instruction requires: armv8.3a
+// CHECK-REQ-NOT: error: instruction requires: armv8.3a
   pacib1716
 // CHECK: pacib1716      // encoding: [0x5f,0x21,0x03,0xd5]
-// CHECK-REQ: error: instruction requires: armv8.3a
+// CHECK-REQ-NOT: error: instruction requires: armv8.3a
   autib1716
 // CHECK: autib1716      // encoding: [0xdf,0x21,0x03,0xd5]
-// CHECK-REQ: error: instruction requires: armv8.3a
+// CHECK-REQ-NOT: error: instruction requires: armv8.3a
   xpaclri
 // CHECK: xpaclri           // encoding: [0xff,0x20,0x03,0xd5]
-// CHECK-REQ: error: instruction requires: armv8.3a
+// CHECK-REQ-NOT: error: instruction requires: armv8.3a
 
   pacia x0, x1
 // CHECK: pacia x0, x1     // encoding: [0x20,0x00,0xc1,0xda]
 // CHECK-REQ: error: instruction requires: armv8.3a
   autia x0, x1
 // CHECK: autia x0, x1     // encoding: [0x20,0x10,0xc1,0xda]
 // CHECK-REQ: error: instruction requires: armv8.3a
   pacda x0, x1