[mips] Add assembler support for .set mips0 directive.

[tomatabacu]

Summary

This directive is used to reset the assembler options to their initial values.
Assembly programmers use it in conjunction with the ".set mipsX" directives.

This patch depends on the .set push/pop directive (http://reviews.llvm.org/D4821).

Contains work done by Matheus Almeida.

[tomatabacu]

Improved test.

[dsanders]

This patch will need updating after you remove the static variable from D4821.

lib/Target/Mips/AsmParser/MipsAsmParser.cpp

87–89

I don't think these 3 are supposed to be reset by '.set mips0'

[tomatabacu]

Updated to match the changes in D4821.
Rebased.
Addressed reviewer's concern.

[dsanders]

LGTM with a bug fix.

lib/Target/Mips/AsmParser/MipsAsmParser.cpp

2750

Don't you need something like this?

AssemblerOptions.back()->setCurrentFeatures(AssemblerOptions.front()->getFeatures());

or this?

AssemblerOptions.back()->setFeatures(getAvailableFeatures());

The test case I have in mind is:

.set msa
addvi.w $w0, $w0, $w0
.set mips0
addvi.w $w0, $w0, $w0 ; Should be an invalid instruction
.set push
addvi.w $w0, $w0, $w0 ; Should be an invalid instruction
.set dsp
addvi.w $w0, $w0, $w0 ; Should be an invalid instruction
.set pop
addvi.w $w0, $w0, $w0 ; Should be an invalid instruction

I think the '.set pop' will accidentally re-enable MSA because the MipsAssemblerOptions object on the stack still has MSA enabled after the '.set mips0'.

[tomatabacu]

Fixed the bug.

lib/Target/Mips/AsmParser/MipsAsmParser.cpp

public:
   void setCurrentFeatures(uint64_t Features) { CurrentFeatures = Features; }
 
   static uint64_t getInitialFeatures() { return InitialFeatures; }
 
   static void setInitialFeatures(uint64_t Features) {
     InitialFeatures = Features;
   }
 
+  void resetToInitialValues() {
+    aTReg = 1;
+    reorder = true;
+    macro = true;
+    CurrentFeatures = InitialFeatures;
+  }
+
 private:
   unsigned aTReg;
   bool reorder;
   bool macro;
   uint64_t CurrentFeatures;
   static uint64_t InitialFeatures;
 };
 
#include "MipsGenAsmMatcher.inc"
   bool reportParseError(SMLoc Loc, Twine ErrorMsg);
 
   bool parseMemOffset(const MCExpr *&Res, bool isParenExpr);
   bool parseRelocOperand(const MCExpr *&Res);
 
   const MCExpr *evaluateRelocExpr(const MCExpr *Expr, StringRef RelocStr);
 
   bool isEvaluated(const MCExpr *Expr);
+  bool parseSetMips0Directive();
   bool parseSetFeature(uint64_t Feature);
   bool parseDirectiveCPLoad(SMLoc Loc);
   bool parseDirectiveCPSetup();
   bool parseDirectiveNaN();
   bool parseDirectiveSet();
   bool parseDirectiveOption();
 
   bool parseSetAtDirective();
bool MipsAsmParser::parseSetAssignment() {
   if (Sym)
     return reportParseError("symbol already defined");
   Sym = getContext().GetOrCreateSymbol(Name);
   Sym->setVariableValue(Value);
 
   return false;
 }
 
+bool MipsAsmParser::parseSetMips0Directive() {
+  Parser.Lex();
+  if (getLexer().isNot(AsmToken::EndOfStatement))
+    return reportParseError("unexpected token, expected end of statement");
+
+  // Reset assembler options to their initial values.
+  AssemblerOptions.top()->resetToInitialValues();
+  setAvailableFeatures(MipsAssemblerOptions::getInitialFeatures());
+
+  getTargetStreamer().emitDirectiveSetMips0();
+  return false;
+}
+
 bool MipsAsmParser::parseSetFeature(uint64_t Feature) {
   Parser.Lex();
   if (getLexer().isNot(AsmToken::EndOfStatement))
     return reportParseError("unexpected token in .set directive");
 
   switch (Feature) {
   default:
     llvm_unreachable("Unimplemented feature");
bool MipsAsmParser::parseDirectiveSet() {
   } else if (Tok.getString() == "nomips16") {
     return parseSetNoMips16Directive();
   } else if (Tok.getString() == "nomicromips") {
     getTargetStreamer().emitDirectiveSetNoMicroMips();
     Parser.eatToEndOfStatement();
     return false;
   } else if (Tok.getString() == "micromips") {
     return parseSetFeature(Mips::FeatureMicroMips);
+  } else if (Tok.getString() == "mips0") {
+    return parseSetMips0Directive();
   } else if (Tok.getString() == "mips1") {
     return parseSetFeature(Mips::FeatureMips1);
   } else if (Tok.getString() == "mips2") {
     return parseSetFeature(Mips::FeatureMips2);
   } else if (Tok.getString() == "mips3") {
     return parseSetFeature(Mips::FeatureMips3);
   } else if (Tok.getString() == "mips4") {
     return parseSetFeature(Mips::FeatureMips4);

lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp

 void MipsTargetStreamer::emitDirectiveNaNLegacy() {}
 void MipsTargetStreamer::emitDirectiveOptionPic0() {}
 void MipsTargetStreamer::emitDirectiveOptionPic2() {}
 void MipsTargetStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
                                    unsigned ReturnReg) {}
 void MipsTargetStreamer::emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) {}
 void MipsTargetStreamer::emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) {
 }
+void MipsTargetStreamer::emitDirectiveSetMips0() {}
 void MipsTargetStreamer::emitDirectiveSetMips1() { forbidModuleDirective(); }
 void MipsTargetStreamer::emitDirectiveSetMips2() { forbidModuleDirective(); }
 void MipsTargetStreamer::emitDirectiveSetMips3() { forbidModuleDirective(); }
 void MipsTargetStreamer::emitDirectiveSetMips4() { forbidModuleDirective(); }
 void MipsTargetStreamer::emitDirectiveSetMips5() { forbidModuleDirective(); }
 void MipsTargetStreamer::emitDirectiveSetMips32() { forbidModuleDirective(); }
 void MipsTargetStreamer::emitDirectiveSetMips32R2() { forbidModuleDirective(); }
 void MipsTargetStreamer::emitDirectiveSetMips32R6() { forbidModuleDirective(); }

 void MipsTargetAsmStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
                                       unsigned ReturnReg) {
   OS << "\t.frame\t$"
      << StringRef(MipsInstPrinter::getRegisterName(StackReg)).lower() << ","
      << StackSize << ",$"
      << StringRef(MipsInstPrinter::getRegisterName(ReturnReg)).lower() << '\n';
 }
 
+void MipsTargetAsmStreamer::emitDirectiveSetMips0() { OS << "\t.set\tmips0\n"; }
+
 void MipsTargetAsmStreamer::emitDirectiveSetMips1() {
   OS << "\t.set\tmips1\n";
   MipsTargetStreamer::emitDirectiveSetMips1();
 }
 
 void MipsTargetAsmStreamer::emitDirectiveSetMips2() {
   OS << "\t.set\tmips2\n";
   MipsTargetStreamer::emitDirectiveSetMips2();

lib/Target/Mips/MipsTargetStreamer.h

public:
   virtual void emitDirectiveNaNLegacy();
   virtual void emitDirectiveOptionPic0();
   virtual void emitDirectiveOptionPic2();
   virtual void emitFrame(unsigned StackReg, unsigned StackSize,
                          unsigned ReturnReg);
   virtual void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff);
   virtual void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff);
 
+  virtual void emitDirectiveSetMips0();
   virtual void emitDirectiveSetMips1();
   virtual void emitDirectiveSetMips2();
   virtual void emitDirectiveSetMips3();
   virtual void emitDirectiveSetMips4();
   virtual void emitDirectiveSetMips5();
   virtual void emitDirectiveSetMips32();
   virtual void emitDirectiveSetMips32R2();
   virtual void emitDirectiveSetMips32R6();
public:
   void emitDirectiveNaNLegacy() override;
   void emitDirectiveOptionPic0() override;
   void emitDirectiveOptionPic2() override;
   void emitFrame(unsigned StackReg, unsigned StackSize,
                  unsigned ReturnReg) override;
   void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) override;
   void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) override;
 
+  void emitDirectiveSetMips0() override;
   void emitDirectiveSetMips1() override;
   void emitDirectiveSetMips2() override;
   void emitDirectiveSetMips3() override;
   void emitDirectiveSetMips4() override;
   void emitDirectiveSetMips5() override;
   void emitDirectiveSetMips32() override;
   void emitDirectiveSetMips32R2() override;
   void emitDirectiveSetMips32R6() override;

test/MC/Mips/set-mips0-directive.s

+# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -mattr=+msa | \
+# RUN: FileCheck %s
+# FIXME: Also test resetting of .set macro/nomacro option.
+
+    .text
+    rotr        $7, $7, 22
+    addvi.h     $w26, $w17, 4
+    lw          $1, 65536($1)
+    b           1332
+
+    .set mips32r6               # Test if the ISA is reset correctly.
+    .set nomsa                  # Test if the ASE is reset correctly.
+    mod         $2, $4, $6
+    .set at=$3                  # Test if the $at register is reset correctly.
+    lw          $1, 65536($1)
+    .set noreorder              # Test if reordering reset correctly.
+    b           3000
+
+    .set mips0
+    rotr        $2, $2, 15
+    addvi.b     $w14, $w12, 14
+    lw          $1, 65536($1)
+    b           2464
+
+# CHECK: rotr     $7, $7, 22
+# CHECK: addvi.h  $w26, $w17, 4
+# CHECK: lui      $1, 1
+# CHECK: addu     $1, $1, $1
+# CHECK: lw       $1, 0($1)
+# CHECK: b        1332
+# CHECK: nop
+
+# CHECK: .set     mips32r6
+# CHECK: .set     nomsa
+# CHECK: mod      $2, $4, $6
+# CHECK: lui      $3, 1
+# CHECK: addu     $3, $3, $1
+# CHECK: lw       $1, 0($3)
+# CHECK: b        3000
+# CHECK-NOT: nop
+
+# CHECK: .set     mips0
+# CHECK: rotr     $2, $2, 15
+# CHECK: addvi.b  $w14, $w12, 14
+# CHECK: lui      $1, 1
+# CHECK: addu     $1, $1, $1
+# CHECK: lw       $1, 0($1)
+# CHECK: b        2464
+# CHECK: nop