[Sparc] Flush register windows for @llvm.returnaddress(1)

[dcederman]

Summary

When @llvm.returnaddress is called with a value higher than 0 it needs to read from the call stack to get the return address. This means that the register windows needs to be flushed to the stack to guarantee that the data read is valid. For values higher than 1 this is done indirectly by the call to getFRAMEADDR(), but not for the value 1.

[jyknight]

lib/Target/Sparc/SparcISelLowering.cpp

2733 ↗

(On Diff #153051)

Maybe pull FLUSHW out of getFRAMEADDR, into LowerFRAMEADDR, so it doesn't get emitted twice here for returnaddress(>= 2) calls?

[dcederman]

Added optional argument to getFRAMEADDR to always flush register windows regardless of depth. Also simplified the code a bit.

llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp

 static SDValue getFLUSHW(SDValue Op, SelectionDAG &DAG) {
   SDLoc dl(Op);
   SDValue Chain = DAG.getNode(SPISD::FLUSHW,
                               dl, MVT::Other, DAG.getEntryNode());
   return Chain;
 }
 
 static SDValue getFRAMEADDR(uint64_t depth, SDValue Op, SelectionDAG &DAG,
-                            const SparcSubtarget *Subtarget) {
+                            const SparcSubtarget *Subtarget,
+                            bool AlwaysFlush = false) {
   MachineFrameInfo &MFI = DAG.getMachineFunction().getFrameInfo();
   MFI.setFrameAddressIsTaken(true);
 
   EVT VT = Op.getValueType();
   SDLoc dl(Op);
   unsigned FrameReg = SP::I6;
   unsigned stackBias = Subtarget->getStackPointerBias();
 
   SDValue FrameAddr;
-
-  if (depth == 0) {
-    FrameAddr = DAG.getCopyFromReg(DAG.getEntryNode(), dl, FrameReg, VT);
-    if (Subtarget->is64Bit())
-      FrameAddr = DAG.getNode(ISD::ADD, dl, VT, FrameAddr,
-                              DAG.getIntPtrConstant(stackBias, dl));
-    return FrameAddr;
-  }
+  SDValue Chain;
 
   // flush first to make sure the windowed registers' values are in stack
-  SDValue Chain = getFLUSHW(Op, DAG);
+  Chain = (depth || AlwaysFlush) ? getFLUSHW(Op, DAG) : DAG.getEntryNode();
+
   FrameAddr = DAG.getCopyFromReg(Chain, dl, FrameReg, VT);
 
   unsigned Offset = (Subtarget->is64Bit()) ? (stackBias + 112) : 56;
 
   while (depth--) {
     SDValue Ptr = DAG.getNode(ISD::ADD, dl, VT, FrameAddr,
                               DAG.getIntPtrConstant(Offset, dl));
     FrameAddr = DAG.getLoad(VT, dl, Chain, Ptr, MachinePointerInfo());
static SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG,
   if (depth == 0) {
     auto PtrVT = TLI.getPointerTy(DAG.getDataLayout());
     unsigned RetReg = MF.addLiveIn(SP::I7, TLI.getRegClassFor(PtrVT));
     RetAddr = DAG.getCopyFromReg(DAG.getEntryNode(), dl, RetReg, VT);
     return RetAddr;
   }
 
   // Need frame address to find return address of the caller.
-  SDValue FrameAddr = getFRAMEADDR(depth - 1, Op, DAG, Subtarget);
+  SDValue FrameAddr = getFRAMEADDR(depth - 1, Op, DAG, Subtarget, true);
 
   unsigned Offset = (Subtarget->is64Bit()) ? 120 : 60;
   SDValue Ptr = DAG.getNode(ISD::ADD,
                             dl, VT,
                             FrameAddr,
                             DAG.getIntPtrConstant(Offset, dl));
   RetAddr = DAG.getLoad(VT, dl, DAG.getEntryNode(), Ptr, MachinePointerInfo());
 

llvm/trunk/test/CodeGen/SPARC/2011-01-11-FrameAddr.ll

 ;SPARC64: ldx [%fp+2159],     %[[R0:[goli][0-7]]]
 ;SPARC64: ldx [%[[R0]]+2159], %[[R1:[goli][0-7]]]
 ;SPARC64: ldx [%[[R1]]+2167], {{.+}}
 
   %0 = tail call i8* @llvm.returnaddress(i32 3)
   ret i8* %0
 }
 
+define i8* @retaddr3() nounwind readnone {
+entry:
+;V8-LABEL: retaddr3:
+;V8: ta 3
+;V8: ld [%fp+60], {{.+}}
+
+;V9-LABEL: retaddr3:
+;V9: flushw
+;V9: ld [%fp+60], {{.+}}
+
+;SPARC64-LABEL: retaddr3
+;SPARC64:       flushw
+;SPARC64: ldx [%fp+2167],     %[[R0:[goli][0-7]]]
+
+  %0 = tail call i8* @llvm.returnaddress(i32 1)
+  ret i8* %0
+}
+
 declare i8* @llvm.returnaddress(i32) nounwind readnone