Do not sext i1 constants when selecting binary ops

[draganm]

Summary

MipsFastISel comparison lowering relies on i1 values allways being 1 or 0 zero extended which can be broken by [X]OR binop.
I chose to fix it here because it gives a slightly better codegen on MIPS.

[draganm]

PING.

[draganm]

Closing in favor of fixing this in Mips back-end.

lib/CodeGen/SelectionDAG/FastISel.cpp

bool FastISel::selectBinaryOp(const User *I, unsigned ISDOpcode) {
 
   unsigned Op0 = getRegForValue(I->getOperand(0));
   if (!Op0) // Unhandled operand. Halt "fast" selection and bail.
     return false;
   bool Op0IsKill = hasTrivialKill(I->getOperand(0));
 
   // Check if the second operand is a constant and handle it appropriately.
   if (const auto *CI = dyn_cast<ConstantInt>(I->getOperand(1))) {
-    uint64_t Imm = CI->getSExtValue();
+    // Use 1/0 for i1 otherwise use sext; Improves encoding on x86.
+    uint64_t Imm = CI->getBitWidth() != 1 ? CI->getSExtValue() : CI->getZExtValue();
 
     // Transform "sdiv exact X, 8" -> "sra X, 3".
     if (ISDOpcode == ISD::SDIV && isa<BinaryOperator>(I) &&
         cast<BinaryOperator>(I)->isExact() && isPowerOf2_64(Imm)) {
       Imm = Log2_64(Imm);
       ISDOpcode = ISD::SRA;
     }
 

test/CodeGen/Mips/Fast-ISel/xori1.ll

+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32r2 \
+; RUN:     < %s -verify-machineinstrs | FileCheck %s
+
+
+define zeroext i1 @foobar(i1 zeroext) {
+entry:
+; CHECK-LABEL: foobar:
+; CHECK:       # %bb.0: # %entry
+; CHECK:       addiu $1, $zero, 1
+; CHECK-NEXT:  xor $1, $4, $1
+; CHECK:       # %bb.1: # %bb0
+  %1 = xor i1 %0, true
+  br label %bb0
+bb0:
+  %2 = icmp eq i1 %1, true
+  ret i1 %2
+}
+
+

test/CodeGen/X86/avx512-fsel.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -O0 -mattr=+avx512f < %s | FileCheck %s
 
 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-apple-macosx10.11.0"
 
 define i32 @test(float %a, float %b)  {
 ; CHECK-LABEL: test:
 ; CHECK:       ## %bb.0:
 ; CHECK-NEXT:    pushq %rax
 ; CHECK-NEXT:    .cfi_def_cfa_offset 16
 ; CHECK-NEXT:    vucomiss %xmm1, %xmm0
 ; CHECK-NEXT:    sete %al
 ; CHECK-NEXT:    setnp %cl
 ; CHECK-NEXT:    andb %cl, %al
-; CHECK-NEXT:    xorb $-1, %al
+; CHECK-NEXT:    xorb $1, %al
 ; CHECK-NEXT:    testb $1, %al
 ; CHECK-NEXT:    jne LBB0_1
 ; CHECK-NEXT:    jmp LBB0_2
 ; CHECK-NEXT:  LBB0_1: ## %L_0
 ; CHECK-NEXT:    callq ___assert_rtn
 ; CHECK-NEXT:    ud2
 ; CHECK-NEXT:  LBB0_2: ## %L_1
 ; CHECK-NEXT:    xorl %eax, %eax

test/CodeGen/X86/pr32256.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -fast-isel -mtriple=i686-unknown-unknown -O0 -mcpu=skx | FileCheck %s
 
 @c = external global i8, align 1
 
 ; Function Attrs: noinline nounwind
 define void @_Z1av() {
 ; CHECK-LABEL: _Z1av:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subl $2, %esp
 ; CHECK-NEXT:    .cfi_def_cfa_offset 6
 ; CHECK-NEXT:    xorl %eax, %eax
 ; CHECK-NEXT:    movb %al, %cl
 ; CHECK-NEXT:    movb c, %dl
-; CHECK-NEXT:    xorb $-1, %dl
+; CHECK-NEXT:    xorb $1, %dl
 ; CHECK-NEXT:    testb $1, %dl
 ; CHECK-NEXT:    movb %cl, (%esp) # 1-byte Spill
 ; CHECK-NEXT:    jne .LBB0_1
 ; CHECK-NEXT:    jmp .LBB0_2
 ; CHECK-NEXT:  .LBB0_1: # %land.rhs
 ; CHECK-NEXT:    xorl %eax, %eax
 ; CHECK-NEXT:    movb %al, %cl
 ; CHECK-NEXT:    movb %cl, (%esp) # 1-byte Spill

test/CodeGen/X86/pr32284.ll

 ; X86-O0-NEXT:    subq %rsi, %rcx
 ; X86-O0-NEXT:    movb %cl, %dil
 ; X86-O0-NEXT:    cmpb $0, %dil
 ; X86-O0-NEXT:    setne %dil
 ; X86-O0-NEXT:    andb $1, %dil
 ; X86-O0-NEXT:    movb %dil, -{{[0-9]+}}(%rsp)
 ; X86-O0-NEXT:    cmpb $0, c
 ; X86-O0-NEXT:    setne %dil
-; X86-O0-NEXT:    xorb $-1, %dil
-; X86-O0-NEXT:    xorb $-1, %dil
+; X86-O0-NEXT:    xorb $1, %dil
+; X86-O0-NEXT:    xorb $1, %dil
 ; X86-O0-NEXT:    andb $1, %dil
 ; X86-O0-NEXT:    movzbl %dil, %eax
 ; X86-O0-NEXT:    movzbl c, %edx
 ; X86-O0-NEXT:    cmpl %edx, %eax
 ; X86-O0-NEXT:    setle %dil
 ; X86-O0-NEXT:    andb $1, %dil
 ; X86-O0-NEXT:    movzbl %dil, %eax
 ; X86-O0-NEXT:    movl %eax, -{{[0-9]+}}(%rsp)

 ; 686-O0-NEXT:    .cfi_def_cfa_offset 12
 ; 686-O0-NEXT:    movb c, %al
 ; 686-O0-NEXT:    cmpb $0, %al
 ; 686-O0-NEXT:    setne %al
 ; 686-O0-NEXT:    andb $1, %al
 ; 686-O0-NEXT:    movb %al, {{[0-9]+}}(%esp)
 ; 686-O0-NEXT:    cmpb $0, c
 ; 686-O0-NEXT:    setne %al
-; 686-O0-NEXT:    xorb $-1, %al
-; 686-O0-NEXT:    xorb $-1, %al
+; 686-O0-NEXT:    xorb $1, %al
+; 686-O0-NEXT:    xorb $1, %al
 ; 686-O0-NEXT:    andb $1, %al
 ; 686-O0-NEXT:    movzbl %al, %ecx
 ; 686-O0-NEXT:    movzbl c, %edx
 ; 686-O0-NEXT:    cmpl %edx, %ecx
 ; 686-O0-NEXT:    setle %al
 ; 686-O0-NEXT:    andb $1, %al
 ; 686-O0-NEXT:    movzbl %al, %ecx
 ; 686-O0-NEXT:    movl %ecx, (%esp)

 ; X86-O0-NEXT:    cmpq $0, %rax
 ; X86-O0-NEXT:    setne %dl
 ; X86-O0-NEXT:    andb $1, %dl
 ; X86-O0-NEXT:    movb %dl, -{{[0-9]+}}(%rsp)
 ; X86-O0-NEXT:    movl var_5, %esi
 ; X86-O0-NEXT:    xorl $-1, %esi
 ; X86-O0-NEXT:    cmpl $0, %esi
 ; X86-O0-NEXT:    setne %dl
-; X86-O0-NEXT:    xorb $-1, %dl
+; X86-O0-NEXT:    xorb $1, %dl
 ; X86-O0-NEXT:    andb $1, %dl
 ; X86-O0-NEXT:    movzbl %dl, %esi
 ; X86-O0-NEXT:    movl %esi, %eax
 ; X86-O0-NEXT:    movslq var_5, %rcx
 ; X86-O0-NEXT:    addq $7093, %rcx # imm = 0x1BB5
 ; X86-O0-NEXT:    cmpq %rcx, %rax
 ; X86-O0-NEXT:    setg %dl
 ; X86-O0-NEXT:    andb $1, %dl
 ; X86-O0-NEXT:    movzbl %dl, %esi
 ; X86-O0-NEXT:    movl %esi, %eax
 ; X86-O0-NEXT:    movq %rax, var_57
 ; X86-O0-NEXT:    movl var_5, %esi
 ; X86-O0-NEXT:    xorl $-1, %esi
 ; X86-O0-NEXT:    cmpl $0, %esi
 ; X86-O0-NEXT:    setne %dl
-; X86-O0-NEXT:    xorb $-1, %dl
+; X86-O0-NEXT:    xorb $1, %dl
 ; X86-O0-NEXT:    andb $1, %dl
 ; X86-O0-NEXT:    movzbl %dl, %esi
 ; X86-O0-NEXT:    movl %esi, %eax
 ; X86-O0-NEXT:    movq %rax, _ZN8struct_210member_2_0E
 ; X86-O0-NEXT:    retq
 ;
 ; X64-LABEL: f1:
 ; X64:       # %bb.0: # %entry

 @var_7 = external global i8, align 1
 
 define void @f2() {
 ; X86-O0-LABEL: f2:
 ; X86-O0:       # %bb.0: # %entry
 ; X86-O0-NEXT:    movzbl var_7, %eax
 ; X86-O0-NEXT:    cmpb $0, var_7
 ; X86-O0-NEXT:    setne %cl
-; X86-O0-NEXT:    xorb $-1, %cl
+; X86-O0-NEXT:    xorb $1, %cl
 ; X86-O0-NEXT:    andb $1, %cl
 ; X86-O0-NEXT:    movzbl %cl, %edx
 ; X86-O0-NEXT:    xorl %edx, %eax
 ; X86-O0-NEXT:    movw %ax, %si
 ; X86-O0-NEXT:    movw %si, -{{[0-9]+}}(%rsp)
 ; X86-O0-NEXT:    movzbl var_7, %eax
 ; X86-O0-NEXT:    movw %ax, %si
 ; X86-O0-NEXT:    cmpw $0, %si
 ; X86-O0-NEXT:    setne %cl
-; X86-O0-NEXT:    xorb $-1, %cl
+; X86-O0-NEXT:    xorb $1, %cl
 ; X86-O0-NEXT:    andb $1, %cl
 ; X86-O0-NEXT:    movzbl %cl, %eax
 ; X86-O0-NEXT:    movzbl var_7, %edx
 ; X86-O0-NEXT:    cmpl %edx, %eax
 ; X86-O0-NEXT:    sete %cl
 ; X86-O0-NEXT:    andb $1, %cl
 ; X86-O0-NEXT:    movzbl %cl, %eax
 ; X86-O0-NEXT:    movw %ax, %si

 ; 686-O0-NEXT:    pushl %esi
 ; 686-O0-NEXT:    .cfi_def_cfa_offset 8
 ; 686-O0-NEXT:    subl $2, %esp
 ; 686-O0-NEXT:    .cfi_def_cfa_offset 10
 ; 686-O0-NEXT:    .cfi_offset %esi, -8
 ; 686-O0-NEXT:    movzbl var_7, %eax
 ; 686-O0-NEXT:    cmpb $0, var_7
 ; 686-O0-NEXT:    setne %cl
-; 686-O0-NEXT:    xorb $-1, %cl
+; 686-O0-NEXT:    xorb $1, %cl
 ; 686-O0-NEXT:    andb $1, %cl
 ; 686-O0-NEXT:    movzbl %cl, %edx
 ; 686-O0-NEXT:    xorl %edx, %eax
 ; 686-O0-NEXT:    movw %ax, %si
 ; 686-O0-NEXT:    movw %si, (%esp)
 ; 686-O0-NEXT:    movzbl var_7, %eax
 ; 686-O0-NEXT:    movw %ax, %si
 ; 686-O0-NEXT:    cmpw $0, %si
 ; 686-O0-NEXT:    setne %cl
-; 686-O0-NEXT:    xorb $-1, %cl
+; 686-O0-NEXT:    xorb $1, %cl
 ; 686-O0-NEXT:    andb $1, %cl
 ; 686-O0-NEXT:    movzbl %cl, %eax
 ; 686-O0-NEXT:    movzbl var_7, %edx
 ; 686-O0-NEXT:    cmpl %edx, %eax
 ; 686-O0-NEXT:    sete %cl
 ; 686-O0-NEXT:    andb $1, %cl
 ; 686-O0-NEXT:    movzbl %cl, %eax
 ; 686-O0-NEXT:    movw %ax, %si

 ; X86-O0-LABEL: f3:
 ; X86-O0:       # %bb.0: # %entry
 ; X86-O0-NEXT:    movl var_13, %eax
 ; X86-O0-NEXT:    xorl $-1, %eax
 ; X86-O0-NEXT:    movl %eax, %eax
 ; X86-O0-NEXT:    movl %eax, %ecx
 ; X86-O0-NEXT:    cmpl $0, var_13
 ; X86-O0-NEXT:    setne %dl
-; X86-O0-NEXT:    xorb $-1, %dl
+; X86-O0-NEXT:    xorb $1, %dl
 ; X86-O0-NEXT:    andb $1, %dl
 ; X86-O0-NEXT:    movzbl %dl, %eax
 ; X86-O0-NEXT:    movl %eax, %esi
 ; X86-O0-NEXT:    movl var_13, %eax
 ; X86-O0-NEXT:    xorl $-1, %eax
 ; X86-O0-NEXT:    xorl var_16, %eax
 ; X86-O0-NEXT:    movl %eax, %eax
 ; X86-O0-NEXT:    movl %eax, %edi
 ; X86-O0-NEXT:    andq %rdi, %rsi
 ; X86-O0-NEXT:    orq %rsi, %rcx
 ; X86-O0-NEXT:    movq %rcx, -{{[0-9]+}}(%rsp)
 ; X86-O0-NEXT:    movl var_13, %eax
 ; X86-O0-NEXT:    xorl $-1, %eax
 ; X86-O0-NEXT:    movl %eax, %eax
 ; X86-O0-NEXT:    movl %eax, %ecx
 ; X86-O0-NEXT:    cmpl $0, var_13
 ; X86-O0-NEXT:    setne %dl
-; X86-O0-NEXT:    xorb $-1, %dl
+; X86-O0-NEXT:    xorb $1, %dl
 ; X86-O0-NEXT:    andb $1, %dl
 ; X86-O0-NEXT:    movzbl %dl, %eax
 ; X86-O0-NEXT:    movl %eax, %esi
 ; X86-O0-NEXT:    andq $0, %rsi
 ; X86-O0-NEXT:    orq %rsi, %rcx
 ; X86-O0-NEXT:    movl %ecx, %eax
 ; X86-O0-NEXT:    movl %eax, var_46
 ; X86-O0-NEXT:    retq