[X86] Use XOR for SUB (C, X) during isel if will help fold an immediate

[craig.topper]

Summary

Same idea as D48529, but restricted to X86 and done very late to avoid any surprises where subtract might be better for DAG combining.

This seems like the safest way to do this trick. And we consider doing it as a DAG combine later.

[spatel]

I agree with the direction. It's hard to generalize folds for select-of-constants even for x86 alone because there are so many weird cases.

I've made patches that do something like these:
https://rise4fun.com/Alive/Mwl

...but unraveling all of the regressions is painful.

test/CodeGen/X86/extract-lowbits.ll

31 ↗

(On Diff #152746)

This shouldn't be in the patch?

[craig.topper]

Remove the extra test change.

[spatel]

LGTM.

llvm/trunk/lib/Target/X86/X86InstrCompiler.td

 def ADD64ri32_DB : I<0, Pseudo,
                      (outs GR64:$dst), (ins GR64:$src1, i64i32imm:$src2),
                      "", // orq/addq REG, imm
                      [(set GR64:$dst, (or_is_add GR64:$src1,
                                                  i64immSExt32:$src2))]>;
 }
 } // AddedComplexity, SchedRW
 
+//===----------------------------------------------------------------------===//
+// Pattern match SUB as XOR
+//===----------------------------------------------------------------------===//
+
+// An immediate in the LHS of a subtract can't be encoded in the instruction.
+// If there is no possibility of a borrow we can use an XOR instead of a SUB
+// to enable the immediate to be folded.
+// TODO: Move this to a DAG combine?
+
+def sub_is_xor : PatFrag<(ops node:$lhs, node:$rhs), (sub node:$lhs, node:$rhs),[{
+  if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N->getOperand(0))) {
+    KnownBits Known;
+    CurDAG->computeKnownBits(N->getOperand(1), Known);
+
+    // If all possible ones in the RHS are set in the LHS then there can't be
+    // a borrow and we can use xor.
+    return (~Known.Zero).isSubsetOf(CN->getAPIntValue());
+  }
+
+  return false;
+}]>;
+
+let AddedComplexity = 5 in {
+def : Pat<(sub_is_xor imm:$src2, GR8:$src1),
+          (XOR8ri GR8:$src1, imm:$src2)>;
+def : Pat<(sub_is_xor i16immSExt8:$src2, GR16:$src1),
+          (XOR16ri8 GR16:$src1, i16immSExt8:$src2)>;
+def : Pat<(sub_is_xor imm:$src2, GR16:$src1),
+          (XOR16ri GR16:$src1, imm:$src2)>;
+def : Pat<(sub_is_xor i32immSExt8:$src2, GR32:$src1),
+          (XOR32ri8 GR32:$src1, i32immSExt8:$src2)>;
+def : Pat<(sub_is_xor imm:$src2, GR32:$src1),
+          (XOR32ri GR32:$src1, imm:$src2)>;
+def : Pat<(sub_is_xor i64immSExt8:$src2, GR64:$src1),
+          (XOR64ri8 GR64:$src1, i64immSExt8:$src2)>;
+def : Pat<(sub_is_xor i64immSExt32:$src2, GR64:$src1),
+          (XOR64ri32 GR64:$src1, i64immSExt32:$src2)>;
+}
 
 //===----------------------------------------------------------------------===//
 // Some peepholes
 //===----------------------------------------------------------------------===//
 
 // Odd encoding trick: -128 fits into an 8-bit immediate field while
 // +128 doesn't, so in this special case use a sub instead of an add.
 def : Pat<(add GR16:$src1, 128),

llvm/trunk/test/CodeGen/X86/bool-math.ll

; CHECK-NEXT:    retq
   %r = sub i8 47, %z
   ret i8 %r
 }
 
 define i8 @add_zext_cmp_mask_same_size_result(i8 %x) {
 ; CHECK-LABEL: add_zext_cmp_mask_same_size_result:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    andb $1, %dil
-; CHECK-NEXT:    movb $27, %al
-; CHECK-NEXT:    subb %dil, %al
+; CHECK-NEXT:    xorb $27, %dil
+; CHECK-NEXT:    movl %edi, %eax
 ; CHECK-NEXT:    retq
   %a = and i8 %x, 1
   %c = icmp eq i8 %a, 0
   %z = zext i1 %c to i8
   %r = add i8 %z, 26
   ret i8 %r
 }
 
 define i32 @add_zext_cmp_mask_wider_result(i8 %x) {
 ; CHECK-LABEL: add_zext_cmp_mask_wider_result:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    andl $1, %edi
-; CHECK-NEXT:    movl $27, %eax
-; CHECK-NEXT:    subl %edi, %eax
+; CHECK-NEXT:    xorl $27, %edi
+; CHECK-NEXT:    movl %edi, %eax
 ; CHECK-NEXT:    retq
   %a = and i8 %x, 1
   %c = icmp eq i8 %a, 0
   %z = zext i1 %c to i32
   %r = add i32 %z, 26
   ret i32 %r
 }
 
 define i8 @add_zext_cmp_mask_narrower_result(i32 %x) {
 ; CHECK-LABEL: add_zext_cmp_mask_narrower_result:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    andl $1, %edi
-; CHECK-NEXT:    movb $43, %al
-; CHECK-NEXT:    subb %dil, %al
+; CHECK-NEXT:    xorb $43, %dil
+; CHECK-NEXT:    movl %edi, %eax
 ; CHECK-NEXT:    retq
   %a = and i32 %x, 1
   %c = icmp eq i32 %a, 0
   %z = zext i1 %c to i8
   %r = add i8 %z, 42
   ret i8 %r
 }
 
; CHECK-NEXT:    retq
   %r = select i1 %c, i16 36, i16 37
   ret i16 %r
 }
 
 define i8 @low_bit_select_constants_bigger_true_same_size_result(i8 %x) {
 ; CHECK-LABEL: low_bit_select_constants_bigger_true_same_size_result:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    andb $1, %dil
-; CHECK-NEXT:    movb $-29, %al
-; CHECK-NEXT:    subb %dil, %al
+; CHECK-NEXT:    xorb $-29, %dil
+; CHECK-NEXT:    movl %edi, %eax
 ; CHECK-NEXT:    retq
   %a = and i8 %x, 1
   %c = icmp eq i8 %a, 0
   %r = select i1 %c, i8 227, i8 226
   ret i8 %r
 }
 
 define i32 @low_bit_select_constants_bigger_true_wider_result(i8 %x) {
 ; CHECK-LABEL: low_bit_select_constants_bigger_true_wider_result:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    andl $1, %edi
-; CHECK-NEXT:    movl $227, %eax
-; CHECK-NEXT:    subl %edi, %eax
+; CHECK-NEXT:    xorl $227, %edi
+; CHECK-NEXT:    movl %edi, %eax
 ; CHECK-NEXT:    retq
   %a = and i8 %x, 1
   %c = icmp eq i8 %a, 0
   %r = select i1 %c, i32 227, i32 226
   ret i32 %r
 }
 
 define i8 @low_bit_select_constants_bigger_true_narrower_result(i16 %x) {
 ; CHECK-LABEL: low_bit_select_constants_bigger_true_narrower_result:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    andl $1, %edi
-; CHECK-NEXT:    movb $41, %al
-; CHECK-NEXT:    subb %dil, %al
+; CHECK-NEXT:    xorb $41, %dil
+; CHECK-NEXT:    movl %edi, %eax
 ; CHECK-NEXT:    retq
   %a = and i16 %x, 1
   %c = icmp eq i16 %a, 0
   %r = select i1 %c, i8 41, i8 40
   ret i8 %r
 }
 

llvm/trunk/test/CodeGen/X86/dagcombine-select.ll

; CHECK-NEXT:    retq
   %bo = shl i32 %sel, 8
   ret i32 %bo
 }
 
 define i32 @shl_constant_sel_constants(i1 %cond) {
 ; CHECK-LABEL: shl_constant_sel_constants:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    andb $1, %dil
-; CHECK-NEXT:    movb $3, %cl
-; CHECK-NEXT:    subb %dil, %cl
+; CHECK-NEXT:    xorb $3, %dil
 ; CHECK-NEXT:    movl $1, %eax
+; CHECK-NEXT:    movl %edi, %ecx
 ; CHECK-NEXT:    shll %cl, %eax
 ; CHECK-NEXT:    retq
   %sel = select i1 %cond, i32 2, i32 3
   %bo = shl i32 1, %sel
   ret i32 %bo
 }
 
 define i32 @lshr_constant_sel_constants(i1 %cond) {
 ; CHECK-LABEL: lshr_constant_sel_constants:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    andb $1, %dil
-; CHECK-NEXT:    movb $3, %cl
-; CHECK-NEXT:    subb %dil, %cl
+; CHECK-NEXT:    xorb $3, %dil
 ; CHECK-NEXT:    movl $64, %eax
+; CHECK-NEXT:    movl %edi, %ecx
 ; CHECK-NEXT:    shrl %cl, %eax
 ; CHECK-NEXT:    retq
   %sel = select i1 %cond, i32 2, i32 3
   %bo = lshr i32 64, %sel
   ret i32 %bo
 }
 
 define i32 @ashr_constant_sel_constants(i1 %cond) {
 ; CHECK-LABEL: ashr_constant_sel_constants:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    andb $1, %dil
-; CHECK-NEXT:    movb $3, %cl
-; CHECK-NEXT:    subb %dil, %cl
+; CHECK-NEXT:    xorb $3, %dil
 ; CHECK-NEXT:    movl $128, %eax
+; CHECK-NEXT:    movl %edi, %ecx
 ; CHECK-NEXT:    shrl %cl, %eax
 ; CHECK-NEXT:    retq
   %sel = select i1 %cond, i32 2, i32 3
   %bo = ashr i32 128, %sel
   ret i32 %bo
 }
 
 define double @fsub_constant_sel_constants(i1 %cond) {