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Differential D48347

[X86] Update fast-isel tests for changes from D48346.
ClosedPublic

Authored by craig.topper on Jun 19 2018, 10:28 PM.

Details

Reviewers
RKSimon
Commits
rG8014053cbd85: [X86] Update fast-isel tests for clang r335253.
rL335256: [X86] Update fast-isel tests for clang r335253.
Summary

The new IR fixes a mismatch in the final extractelement for the i32 intrinsics. Previously we extracted a 64-bit element even though we only wanted 32 bits.

SimplifyDemandedElts isn't able to make FP elements undef now and the shuffle mask I used prevents the use of horizontal add we had before. Not sure we should have been using horizontal add anyway. It's implemented on Intel with two port 5 shuffles and an add. So we have on less shuffle now, but an additional instruction to decode.

Diff Detail

Repository
rL LLVM

Event Timeline

craig.topper created this revision.Jun 19 2018, 10:28 PM
Harbormaster completed remote builds in B19494: Diff 152023.Jun 19 2018, 10:28 PM
RKSimon accepted this revision.Jun 20 2018, 3:56 AM

LGTM - avx512-reduceMinMaxIntrin.c codegen could be cleaned up a bit to match these better - we don't typically include all the alloca etc. from -O0 code

This revision is now accepted and ready to land.Jun 20 2018, 3:56 AM
Closed by commit rL335256: [X86] Update fast-isel tests for clang r335253. (authored by ctopper). · Explain WhyJun 21 2018, 9:58 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
trunk/
test/
CodeGen/
X86/
551 lines

Diff 152333

llvm/trunk/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll

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Show First 20 Lines • Show All 6,728 Lines • ▼ Show 20 Linesentry:
%or4.i = or <2 x i64> %shuffle2.i, %shuffle3.i %or4.i = or <2 x i64> %shuffle2.i, %shuffle3.i
%shuffle6.i = shufflevector <2 x i64> %or4.i, <2 x i64> undef, <2 x i32> <i32 1, i32 undef> %shuffle6.i = shufflevector <2 x i64> %or4.i, <2 x i64> undef, <2 x i32> <i32 1, i32 undef>
%or7.i = or <2 x i64> %shuffle6.i, %or4.i %or7.i = or <2 x i64> %shuffle6.i, %or4.i
%vecext.i = extractelement <2 x i64> %or7.i, i32 0 %vecext.i = extractelement <2 x i64> %or7.i, i32 0
ret i64 %vecext.i ret i64 %vecext.i
} }
define i32 @test_mm512_reduce_add_epi32(<8 x i64> %__W) { define i32 @test_mm512_reduce_add_epi32(<8 x i64> %__W) {
; X86-LABEL: test_mm512_reduce_add_epi32: ; CHECK-LABEL: test_mm512_reduce_add_epi32:
; X86: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; X86-NEXT: vextracti64x4 $1, %zmm0, %ymm1 ; CHECK-NEXT: vextracti64x4 $1, %zmm0, %ymm1
; X86-NEXT: vpaddd %ymm1, %ymm0, %ymm0 ; CHECK-NEXT: vpaddd %ymm1, %ymm0, %ymm0
; X86-NEXT: vextracti128 $1, %ymm0, %xmm1 ; CHECK-NEXT: vextracti128 $1, %ymm0, %xmm1
; X86-NEXT: vpaddd %xmm1, %xmm0, %xmm0 ; CHECK-NEXT: vpaddd %xmm1, %xmm0, %xmm0
; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] ; CHECK-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; X86-NEXT: vpaddd %xmm0, %xmm1, %xmm0 ; CHECK-NEXT: vpaddd %xmm0, %xmm1, %xmm0
; X86-NEXT: vphaddd %xmm0, %xmm0, %xmm0 ; CHECK-NEXT: vphaddd %xmm0, %xmm0, %xmm0
; X86-NEXT: vmovd %xmm0, %eax ; CHECK-NEXT: vmovd %xmm0, %eax
; X86-NEXT: vzeroupper ; CHECK-NEXT: vzeroupper
; X86-NEXT: retl ; CHECK-NEXT: ret{{[l|q]}}
;
; X64-LABEL: test_mm512_reduce_add_epi32:
; X64: # %bb.0: # %entry
; X64-NEXT: vextracti64x4 $1, %zmm0, %ymm1
; X64-NEXT: vpaddd %ymm1, %ymm0, %ymm0
; X64-NEXT: vextracti128 $1, %ymm0, %xmm1
; X64-NEXT: vpaddd %xmm1, %xmm0, %xmm0
; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; X64-NEXT: vpaddd %xmm0, %xmm1, %xmm0
; X64-NEXT: vphaddd %xmm0, %xmm0, %xmm0
; X64-NEXT: vmovq %xmm0, %rax
; X64-NEXT: # kill: def $eax killed $eax killed $rax
; X64-NEXT: vzeroupper
; X64-NEXT: retq
entry: entry:
%0 = bitcast <8 x i64> %__W to <16 x i32> %extract.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
%shuffle.i = shufflevector <16 x i32> %0, <16 x i32> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> %0 = bitcast <4 x i64> %extract.i to <8 x i32>
%shuffle1.i = shufflevector <16 x i32> %0, <16 x i32> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> %extract2.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
%add.i = add <8 x i32> %shuffle.i, %shuffle1.i %1 = bitcast <4 x i64> %extract2.i to <8 x i32>
%shuffle2.i = shufflevector <8 x i32> %add.i, <8 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> %add.i = add <8 x i32> %0, %1
%shuffle3.i = shufflevector <8 x i32> %add.i, <8 x i32> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7> %2 = bitcast <8 x i32> %add.i to <4 x i64>
%add4.i = add <4 x i32> %shuffle2.i, %shuffle3.i %extract3.i = shufflevector <4 x i64> %2, <4 x i64> undef, <2 x i32> <i32 0, i32 1>
%shuffle6.i = shufflevector <4 x i32> %add4.i, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef> %3 = bitcast <2 x i64> %extract3.i to <4 x i32>
%add7.i = add <4 x i32> %shuffle6.i, %add4.i %extract4.i = shufflevector <4 x i64> %2, <4 x i64> undef, <2 x i32> <i32 2, i32 3>
%shuffle9.i = shufflevector <4 x i32> %add7.i, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> %4 = bitcast <2 x i64> %extract4.i to <4 x i32>
%add10.i = add <4 x i32> %shuffle9.i, %add7.i %add5.i = add <4 x i32> %3, %4
%1 = bitcast <4 x i32> %add10.i to <2 x i64> %shuffle.i = shufflevector <4 x i32> %add5.i, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
%vecext.i = extractelement <2 x i64> %1, i32 0 %add6.i = add <4 x i32> %shuffle.i, %add5.i
%conv.i = trunc i64 %vecext.i to i32 %shuffle7.i = shufflevector <4 x i32> %add6.i, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
ret i32 %conv.i %add8.i = add <4 x i32> %shuffle7.i, %add6.i
%vecext.i = extractelement <4 x i32> %add8.i, i32 0
ret i32 %vecext.i
} }
define i32 @test_mm512_reduce_mul_epi32(<8 x i64> %__W) { define i32 @test_mm512_reduce_mul_epi32(<8 x i64> %__W) {
; X86-LABEL: test_mm512_reduce_mul_epi32: ; CHECK-LABEL: test_mm512_reduce_mul_epi32:
; X86: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; X86-NEXT: vextracti64x4 $1, %zmm0, %ymm1 ; CHECK-NEXT: vextracti64x4 $1, %zmm0, %ymm1
; X86-NEXT: vpmulld %ymm1, %ymm0, %ymm0 ; CHECK-NEXT: vpmulld %ymm1, %ymm0, %ymm0
; X86-NEXT: vextracti128 $1, %ymm0, %xmm1 ; CHECK-NEXT: vextracti128 $1, %ymm0, %xmm1
; X86-NEXT: vpmulld %xmm1, %xmm0, %xmm0 ; CHECK-NEXT: vpmulld %xmm1, %xmm0, %xmm0
; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] ; CHECK-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; X86-NEXT: vpmulld %xmm0, %xmm1, %xmm0 ; CHECK-NEXT: vpmulld %xmm0, %xmm1, %xmm0
; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] ; CHECK-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
; X86-NEXT: vpmulld %xmm0, %xmm1, %xmm0 ; CHECK-NEXT: vpmulld %xmm0, %xmm1, %xmm0
; X86-NEXT: vmovd %xmm0, %eax ; CHECK-NEXT: vmovd %xmm0, %eax
; X86-NEXT: vzeroupper ; CHECK-NEXT: vzeroupper
; X86-NEXT: retl ; CHECK-NEXT: ret{{[l|q]}}
;
; X64-LABEL: test_mm512_reduce_mul_epi32:
; X64: # %bb.0: # %entry
; X64-NEXT: vextracti64x4 $1, %zmm0, %ymm1
; X64-NEXT: vpmulld %ymm1, %ymm0, %ymm0
; X64-NEXT: vextracti128 $1, %ymm0, %xmm1
; X64-NEXT: vpmulld %xmm1, %xmm0, %xmm0
; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; X64-NEXT: vpmulld %xmm0, %xmm1, %xmm0
; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
; X64-NEXT: vpmulld %xmm0, %xmm1, %xmm0
; X64-NEXT: vmovq %xmm0, %rax
; X64-NEXT: # kill: def $eax killed $eax killed $rax
; X64-NEXT: vzeroupper
; X64-NEXT: retq
entry: entry:
%0 = bitcast <8 x i64> %__W to <16 x i32> %extract.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
%shuffle.i = shufflevector <16 x i32> %0, <16 x i32> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> %0 = bitcast <4 x i64> %extract.i to <8 x i32>
%shuffle1.i = shufflevector <16 x i32> %0, <16 x i32> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> %extract2.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
%mul.i = mul <8 x i32> %shuffle.i, %shuffle1.i %1 = bitcast <4 x i64> %extract2.i to <8 x i32>
%shuffle2.i = shufflevector <8 x i32> %mul.i, <8 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> %mul.i = mul <8 x i32> %0, %1
%shuffle3.i = shufflevector <8 x i32> %mul.i, <8 x i32> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7> %2 = bitcast <8 x i32> %mul.i to <4 x i64>
%mul4.i = mul <4 x i32> %shuffle2.i, %shuffle3.i %extract3.i = shufflevector <4 x i64> %2, <4 x i64> undef, <2 x i32> <i32 0, i32 1>
%shuffle6.i = shufflevector <4 x i32> %mul4.i, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef> %3 = bitcast <2 x i64> %extract3.i to <4 x i32>
%mul7.i = mul <4 x i32> %shuffle6.i, %mul4.i %extract4.i = shufflevector <4 x i64> %2, <4 x i64> undef, <2 x i32> <i32 2, i32 3>
%shuffle9.i = shufflevector <4 x i32> %mul7.i, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> %4 = bitcast <2 x i64> %extract4.i to <4 x i32>
%mul10.i = mul <4 x i32> %shuffle9.i, %mul7.i %mul5.i = mul <4 x i32> %3, %4
%1 = bitcast <4 x i32> %mul10.i to <2 x i64> %shuffle.i = shufflevector <4 x i32> %mul5.i, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
%vecext.i = extractelement <2 x i64> %1, i32 0 %mul6.i = mul <4 x i32> %shuffle.i, %mul5.i
%conv.i = trunc i64 %vecext.i to i32 %shuffle7.i = shufflevector <4 x i32> %mul6.i, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
ret i32 %conv.i %mul8.i = mul <4 x i32> %shuffle7.i, %mul6.i
%vecext.i = extractelement <4 x i32> %mul8.i, i32 0
ret i32 %vecext.i
} }
define i32 @test_mm512_reduce_or_epi32(<8 x i64> %__W) { define i32 @test_mm512_reduce_or_epi32(<8 x i64> %__W) {
; X86-LABEL: test_mm512_reduce_or_epi32: ; CHECK-LABEL: test_mm512_reduce_or_epi32:
; X86: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; X86-NEXT: vextracti64x4 $1, %zmm0, %ymm1 ; CHECK-NEXT: vextracti64x4 $1, %zmm0, %ymm1
; X86-NEXT: vpor %ymm1, %ymm0, %ymm0 ; CHECK-NEXT: vpor %ymm1, %ymm0, %ymm0
; X86-NEXT: vextracti128 $1, %ymm0, %xmm1 ; CHECK-NEXT: vextracti128 $1, %ymm0, %xmm1
; X86-NEXT: vpor %xmm1, %xmm0, %xmm0 ; CHECK-NEXT: vpor %xmm1, %xmm0, %xmm0
; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] ; CHECK-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; X86-NEXT: vpor %xmm0, %xmm1, %xmm0 ; CHECK-NEXT: vpor %xmm0, %xmm1, %xmm0
; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] ; CHECK-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
; X86-NEXT: vpor %xmm0, %xmm1, %xmm0 ; CHECK-NEXT: vpor %xmm0, %xmm1, %xmm0
; X86-NEXT: vmovd %xmm0, %eax ; CHECK-NEXT: vmovd %xmm0, %eax
; X86-NEXT: vzeroupper ; CHECK-NEXT: vzeroupper
; X86-NEXT: retl ; CHECK-NEXT: ret{{[l|q]}}
;
; X64-LABEL: test_mm512_reduce_or_epi32:
; X64: # %bb.0: # %entry
; X64-NEXT: vextracti64x4 $1, %zmm0, %ymm1
; X64-NEXT: vpor %ymm1, %ymm0, %ymm0
; X64-NEXT: vextracti128 $1, %ymm0, %xmm1
; X64-NEXT: vpor %xmm1, %xmm0, %xmm0
; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; X64-NEXT: vpor %xmm0, %xmm1, %xmm0
; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
; X64-NEXT: vpor %xmm0, %xmm1, %xmm0
; X64-NEXT: vmovq %xmm0, %rax
; X64-NEXT: # kill: def $eax killed $eax killed $rax
; X64-NEXT: vzeroupper
; X64-NEXT: retq
entry: entry:
%0 = bitcast <8 x i64> %__W to <16 x i32> %extract.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
%shuffle.i = shufflevector <16 x i32> %0, <16 x i32> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> %extract2.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
%shuffle1.i = shufflevector <16 x i32> %0, <16 x i32> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> %or25.i = or <4 x i64> %extract.i, %extract2.i
%or.i = or <8 x i32> %shuffle.i, %shuffle1.i %extract3.i = shufflevector <4 x i64> %or25.i, <4 x i64> undef, <2 x i32> <i32 0, i32 1>
%shuffle2.i = shufflevector <8 x i32> %or.i, <8 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> %extract4.i = shufflevector <4 x i64> %or25.i, <4 x i64> undef, <2 x i32> <i32 2, i32 3>
%shuffle3.i = shufflevector <8 x i32> %or.i, <8 x i32> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7> %or526.i = or <2 x i64> %extract3.i, %extract4.i
%or4.i = or <4 x i32> %shuffle2.i, %shuffle3.i %or5.i = bitcast <2 x i64> %or526.i to <4 x i32>
%shuffle6.i = shufflevector <4 x i32> %or4.i, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef> %shuffle.i = shufflevector <4 x i32> %or5.i, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
%or7.i = or <4 x i32> %shuffle6.i, %or4.i %or6.i = or <4 x i32> %shuffle.i, %or5.i
%shuffle9.i = shufflevector <4 x i32> %or7.i, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> %shuffle7.i = shufflevector <4 x i32> %or6.i, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
%or10.i = or <4 x i32> %shuffle9.i, %or7.i %or8.i = or <4 x i32> %shuffle7.i, %or6.i
%1 = bitcast <4 x i32> %or10.i to <2 x i64> %vecext.i = extractelement <4 x i32> %or8.i, i32 0
%vecext.i = extractelement <2 x i64> %1, i32 0 ret i32 %vecext.i
%conv.i = trunc i64 %vecext.i to i32
ret i32 %conv.i
} }
define i32 @test_mm512_reduce_and_epi32(<8 x i64> %__W) { define i32 @test_mm512_reduce_and_epi32(<8 x i64> %__W) {
; X86-LABEL: test_mm512_reduce_and_epi32: ; CHECK-LABEL: test_mm512_reduce_and_epi32:
; X86: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; X86-NEXT: vextracti64x4 $1, %zmm0, %ymm1 ; CHECK-NEXT: vextracti64x4 $1, %zmm0, %ymm1
; X86-NEXT: vpand %ymm1, %ymm0, %ymm0 ; CHECK-NEXT: vpand %ymm1, %ymm0, %ymm0
; X86-NEXT: vextracti128 $1, %ymm0, %xmm1 ; CHECK-NEXT: vextracti128 $1, %ymm0, %xmm1
; X86-NEXT: vpand %xmm1, %xmm0, %xmm0 ; CHECK-NEXT: vpand %xmm1, %xmm0, %xmm0
; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] ; CHECK-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; X86-NEXT: vpand %xmm0, %xmm1, %xmm0 ; CHECK-NEXT: vpand %xmm0, %xmm1, %xmm0
; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] ; CHECK-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
; X86-NEXT: vpand %xmm0, %xmm1, %xmm0 ; CHECK-NEXT: vpand %xmm0, %xmm1, %xmm0
; X86-NEXT: vmovd %xmm0, %eax ; CHECK-NEXT: vmovd %xmm0, %eax
; X86-NEXT: vzeroupper ; CHECK-NEXT: vzeroupper
; X86-NEXT: retl ; CHECK-NEXT: ret{{[l|q]}}
;
; X64-LABEL: test_mm512_reduce_and_epi32:
; X64: # %bb.0: # %entry
; X64-NEXT: vextracti64x4 $1, %zmm0, %ymm1
; X64-NEXT: vpand %ymm1, %ymm0, %ymm0
; X64-NEXT: vextracti128 $1, %ymm0, %xmm1
; X64-NEXT: vpand %xmm1, %xmm0, %xmm0
; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; X64-NEXT: vpand %xmm0, %xmm1, %xmm0
; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
; X64-NEXT: vpand %xmm0, %xmm1, %xmm0
; X64-NEXT: vmovq %xmm0, %rax
; X64-NEXT: # kill: def $eax killed $eax killed $rax
; X64-NEXT: vzeroupper
; X64-NEXT: retq
entry: entry:
%0 = bitcast <8 x i64> %__W to <16 x i32> %extract.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
%shuffle.i = shufflevector <16 x i32> %0, <16 x i32> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> %extract2.i = shufflevector <8 x i64> %__W, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
%shuffle1.i = shufflevector <16 x i32> %0, <16 x i32> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> %and25.i = and <4 x i64> %extract.i, %extract2.i
%and.i = and <8 x i32> %shuffle.i, %shuffle1.i %extract3.i = shufflevector <4 x i64> %and25.i, <4 x i64> undef, <2 x i32> <i32 0, i32 1>
%shuffle2.i = shufflevector <8 x i32> %and.i, <8 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> %extract4.i = shufflevector <4 x i64> %and25.i, <4 x i64> undef, <2 x i32> <i32 2, i32 3>
%shuffle3.i = shufflevector <8 x i32> %and.i, <8 x i32> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7> %and526.i = and <2 x i64> %extract3.i, %extract4.i
%and4.i = and <4 x i32> %shuffle2.i, %shuffle3.i %and5.i = bitcast <2 x i64> %and526.i to <4 x i32>
%shuffle6.i = shufflevector <4 x i32> %and4.i, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef> %shuffle.i = shufflevector <4 x i32> %and5.i, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
%and7.i = and <4 x i32> %shuffle6.i, %and4.i %and6.i = and <4 x i32> %shuffle.i, %and5.i
%shuffle9.i = shufflevector <4 x i32> %and7.i, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> %shuffle7.i = shufflevector <4 x i32> %and6.i, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
%and10.i = and <4 x i32> %shuffle9.i, %and7.i %and8.i = and <4 x i32> %shuffle7.i, %and6.i
%1 = bitcast <4 x i32> %and10.i to <2 x i64> %vecext.i = extractelement <4 x i32> %and8.i, i32 0
%vecext.i = extractelement <2 x i64> %1, i32 0 ret i32 %vecext.i
%conv.i = trunc i64 %vecext.i to i32
ret i32 %conv.i
} }
define i32 @test_mm512_mask_reduce_add_epi32(i16 zeroext %__M, <8 x i64> %__W) { define i32 @test_mm512_mask_reduce_add_epi32(i16 zeroext %__M, <8 x i64> %__W) {
; X86-LABEL: test_mm512_mask_reduce_add_epi32: ; X86-LABEL: test_mm512_mask_reduce_add_epi32:
; X86: # %bb.0: # %entry ; X86: # %bb.0: # %entry
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1
; X86-NEXT: vmovdqa32 %zmm0, %zmm0 {%k1} {z} ; X86-NEXT: vmovdqa32 %zmm0, %zmm0 {%k1} {z}
; X86-NEXT: vextracti64x4 $1, %zmm0, %ymm1 ; X86-NEXT: vextracti64x4 $1, %zmm0, %ymm1
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; X64-NEXT: vmovdqa32 %zmm0, %zmm0 {%k1} {z} ; X64-NEXT: vmovdqa32 %zmm0, %zmm0 {%k1} {z}
; X64-NEXT: vextracti64x4 $1, %zmm0, %ymm1 ; X64-NEXT: vextracti64x4 $1, %zmm0, %ymm1
; X64-NEXT: vpaddd %ymm1, %ymm0, %ymm0 ; X64-NEXT: vpaddd %ymm1, %ymm0, %ymm0
; X64-NEXT: vextracti128 $1, %ymm0, %xmm1 ; X64-NEXT: vextracti128 $1, %ymm0, %xmm1
; X64-NEXT: vpaddd %xmm1, %xmm0, %xmm0 ; X64-NEXT: vpaddd %xmm1, %xmm0, %xmm0
; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] ; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; X64-NEXT: vpaddd %xmm0, %xmm1, %xmm0 ; X64-NEXT: vpaddd %xmm0, %xmm1, %xmm0
; X64-NEXT: vphaddd %xmm0, %xmm0, %xmm0 ; X64-NEXT: vphaddd %xmm0, %xmm0, %xmm0
; X64-NEXT: vmovq %xmm0, %rax ; X64-NEXT: vmovd %xmm0, %eax
; X64-NEXT: # kill: def $eax killed $eax killed $rax
; X64-NEXT: vzeroupper ; X64-NEXT: vzeroupper
; X64-NEXT: retq ; X64-NEXT: retq
entry: entry:
%0 = bitcast <8 x i64> %__W to <16 x i32> %0 = bitcast <8 x i64> %__W to <16 x i32>
%1 = bitcast i16 %__M to <16 x i1> %1 = bitcast i16 %__M to <16 x i1>
%2 = select <16 x i1> %1, <16 x i32> %0, <16 x i32> zeroinitializer %2 = select <16 x i1> %1, <16 x i32> %0, <16 x i32> zeroinitializer
%shuffle.i = shufflevector <16 x i32> %2, <16 x i32> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> %3 = bitcast <16 x i32> %2 to <8 x i64>
%shuffle1.i = shufflevector <16 x i32> %2, <16 x i32> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> %extract.i = shufflevector <8 x i64> %3, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
%add.i = add <8 x i32> %shuffle.i, %shuffle1.i %4 = bitcast <4 x i64> %extract.i to <8 x i32>
%shuffle2.i = shufflevector <8 x i32> %add.i, <8 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> %extract3.i = shufflevector <8 x i64> %3, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
%shuffle3.i = shufflevector <8 x i32> %add.i, <8 x i32> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7> %5 = bitcast <4 x i64> %extract3.i to <8 x i32>
%add4.i = add <4 x i32> %shuffle2.i, %shuffle3.i %add.i = add <8 x i32> %4, %5
%shuffle6.i = shufflevector <4 x i32> %add4.i, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef> %6 = bitcast <8 x i32> %add.i to <4 x i64>
%add7.i = add <4 x i32> %shuffle6.i, %add4.i %extract4.i = shufflevector <4 x i64> %6, <4 x i64> undef, <2 x i32> <i32 0, i32 1>
%shuffle9.i = shufflevector <4 x i32> %add7.i, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> %7 = bitcast <2 x i64> %extract4.i to <4 x i32>
%add10.i = add <4 x i32> %shuffle9.i, %add7.i %extract5.i = shufflevector <4 x i64> %6, <4 x i64> undef, <2 x i32> <i32 2, i32 3>
%3 = bitcast <4 x i32> %add10.i to <2 x i64> %8 = bitcast <2 x i64> %extract5.i to <4 x i32>
%vecext.i = extractelement <2 x i64> %3, i32 0 %add6.i = add <4 x i32> %7, %8
%conv.i = trunc i64 %vecext.i to i32 %shuffle.i = shufflevector <4 x i32> %add6.i, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
ret i32 %conv.i %add7.i = add <4 x i32> %shuffle.i, %add6.i
%shuffle8.i = shufflevector <4 x i32> %add7.i, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
%add9.i = add <4 x i32> %shuffle8.i, %add7.i
%vecext.i = extractelement <4 x i32> %add9.i, i32 0
ret i32 %vecext.i
} }
define i32 @test_mm512_mask_reduce_mul_epi32(i16 zeroext %__M, <8 x i64> %__W) { define i32 @test_mm512_mask_reduce_mul_epi32(i16 zeroext %__M, <8 x i64> %__W) {
; X86-LABEL: test_mm512_mask_reduce_mul_epi32: ; X86-LABEL: test_mm512_mask_reduce_mul_epi32:
; X86: # %bb.0: # %entry ; X86: # %bb.0: # %entry
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1
; X86-NEXT: vpbroadcastd {{.*#+}} zmm1 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1] ; X86-NEXT: vpbroadcastd {{.*#+}} zmm1 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
; X86-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1} ; X86-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1}
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; X64-NEXT: vextracti64x4 $1, %zmm1, %ymm0 ; X64-NEXT: vextracti64x4 $1, %zmm1, %ymm0
; X64-NEXT: vpmulld %ymm0, %ymm1, %ymm0 ; X64-NEXT: vpmulld %ymm0, %ymm1, %ymm0
; X64-NEXT: vextracti128 $1, %ymm0, %xmm1 ; X64-NEXT: vextracti128 $1, %ymm0, %xmm1
; X64-NEXT: vpmulld %xmm1, %xmm0, %xmm0 ; X64-NEXT: vpmulld %xmm1, %xmm0, %xmm0
; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] ; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; X64-NEXT: vpmulld %xmm0, %xmm1, %xmm0 ; X64-NEXT: vpmulld %xmm0, %xmm1, %xmm0
; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] ; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
; X64-NEXT: vpmulld %xmm0, %xmm1, %xmm0 ; X64-NEXT: vpmulld %xmm0, %xmm1, %xmm0
; X64-NEXT: vmovq %xmm0, %rax ; X64-NEXT: vmovd %xmm0, %eax
; X64-NEXT: # kill: def $eax killed $eax killed $rax
; X64-NEXT: vzeroupper ; X64-NEXT: vzeroupper
; X64-NEXT: retq ; X64-NEXT: retq
entry: entry:
%0 = bitcast <8 x i64> %__W to <16 x i32> %0 = bitcast <8 x i64> %__W to <16 x i32>
%1 = bitcast i16 %__M to <16 x i1> %1 = bitcast i16 %__M to <16 x i1>
%2 = select <16 x i1> %1, <16 x i32> %0, <16 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1> %2 = select <16 x i1> %1, <16 x i32> %0, <16 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
%shuffle.i = shufflevector <16 x i32> %2, <16 x i32> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> %3 = bitcast <16 x i32> %2 to <8 x i64>
%shuffle1.i = shufflevector <16 x i32> %2, <16 x i32> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> %extract.i = shufflevector <8 x i64> %3, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
%mul.i = mul <8 x i32> %shuffle.i, %shuffle1.i %4 = bitcast <4 x i64> %extract.i to <8 x i32>
%shuffle2.i = shufflevector <8 x i32> %mul.i, <8 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> %extract4.i = shufflevector <8 x i64> %3, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
%shuffle3.i = shufflevector <8 x i32> %mul.i, <8 x i32> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7> %5 = bitcast <4 x i64> %extract4.i to <8 x i32>
%mul4.i = mul <4 x i32> %shuffle2.i, %shuffle3.i %mul.i = mul <8 x i32> %4, %5
%shuffle6.i = shufflevector <4 x i32> %mul4.i, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef> %6 = bitcast <8 x i32> %mul.i to <4 x i64>
%mul7.i = mul <4 x i32> %shuffle6.i, %mul4.i %extract5.i = shufflevector <4 x i64> %6, <4 x i64> undef, <2 x i32> <i32 0, i32 1>
%shuffle9.i = shufflevector <4 x i32> %mul7.i, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> %7 = bitcast <2 x i64> %extract5.i to <4 x i32>
%mul10.i = mul <4 x i32> %shuffle9.i, %mul7.i %extract6.i = shufflevector <4 x i64> %6, <4 x i64> undef, <2 x i32> <i32 2, i32 3>
%3 = bitcast <4 x i32> %mul10.i to <2 x i64> %8 = bitcast <2 x i64> %extract6.i to <4 x i32>
%vecext.i = extractelement <2 x i64> %3, i32 0 %mul7.i = mul <4 x i32> %7, %8
%conv.i = trunc i64 %vecext.i to i32 %shuffle.i = shufflevector <4 x i32> %mul7.i, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
ret i32 %conv.i %mul8.i = mul <4 x i32> %shuffle.i, %mul7.i
%shuffle9.i = shufflevector <4 x i32> %mul8.i, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
%mul10.i = mul <4 x i32> %shuffle9.i, %mul8.i
%vecext.i = extractelement <4 x i32> %mul10.i, i32 0
ret i32 %vecext.i
} }
define i32 @test_mm512_mask_reduce_and_epi32(i16 zeroext %__M, <8 x i64> %__W) { define i32 @test_mm512_mask_reduce_and_epi32(i16 zeroext %__M, <8 x i64> %__W) {
; X86-LABEL: test_mm512_mask_reduce_and_epi32: ; X86-LABEL: test_mm512_mask_reduce_and_epi32:
; X86: # %bb.0: # %entry ; X86: # %bb.0: # %entry
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1
; X86-NEXT: vpternlogd $255, %zmm1, %zmm1, %zmm1 ; X86-NEXT: vpternlogd $255, %zmm1, %zmm1, %zmm1
; X86-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1} ; X86-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1}
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; X64-NEXT: vextracti64x4 $1, %zmm1, %ymm0 ; X64-NEXT: vextracti64x4 $1, %zmm1, %ymm0
; X64-NEXT: vpand %ymm0, %ymm1, %ymm0 ; X64-NEXT: vpand %ymm0, %ymm1, %ymm0
; X64-NEXT: vextracti128 $1, %ymm0, %xmm1 ; X64-NEXT: vextracti128 $1, %ymm0, %xmm1
; X64-NEXT: vpand %xmm1, %xmm0, %xmm0 ; X64-NEXT: vpand %xmm1, %xmm0, %xmm0
; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] ; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; X64-NEXT: vpand %xmm0, %xmm1, %xmm0 ; X64-NEXT: vpand %xmm0, %xmm1, %xmm0
; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] ; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
; X64-NEXT: vpand %xmm0, %xmm1, %xmm0 ; X64-NEXT: vpand %xmm0, %xmm1, %xmm0
; X64-NEXT: vmovq %xmm0, %rax ; X64-NEXT: vmovd %xmm0, %eax
; X64-NEXT: # kill: def $eax killed $eax killed $rax
; X64-NEXT: vzeroupper ; X64-NEXT: vzeroupper
; X64-NEXT: retq ; X64-NEXT: retq
entry: entry:
%0 = bitcast <8 x i64> %__W to <16 x i32> %0 = bitcast <8 x i64> %__W to <16 x i32>
%1 = bitcast i16 %__M to <16 x i1> %1 = bitcast i16 %__M to <16 x i1>
%2 = select <16 x i1> %1, <16 x i32> %0, <16 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1> %2 = select <16 x i1> %1, <16 x i32> %0, <16 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>
%shuffle.i = shufflevector <16 x i32> %2, <16 x i32> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> %3 = bitcast <16 x i32> %2 to <8 x i64>
%shuffle1.i = shufflevector <16 x i32> %2, <16 x i32> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> %extract.i = shufflevector <8 x i64> %3, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
%and.i = and <8 x i32> %shuffle.i, %shuffle1.i %extract4.i = shufflevector <8 x i64> %3, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
%shuffle2.i = shufflevector <8 x i32> %and.i, <8 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> %and28.i = and <4 x i64> %extract.i, %extract4.i
%shuffle3.i = shufflevector <8 x i32> %and.i, <8 x i32> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7> %extract5.i = shufflevector <4 x i64> %and28.i, <4 x i64> undef, <2 x i32> <i32 0, i32 1>
%and4.i = and <4 x i32> %shuffle2.i, %shuffle3.i %extract6.i = shufflevector <4 x i64> %and28.i, <4 x i64> undef, <2 x i32> <i32 2, i32 3>
%shuffle6.i = shufflevector <4 x i32> %and4.i, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef> %and729.i = and <2 x i64> %extract5.i, %extract6.i
%and7.i = and <4 x i32> %shuffle6.i, %and4.i %and7.i = bitcast <2 x i64> %and729.i to <4 x i32>
%shuffle9.i = shufflevector <4 x i32> %and7.i, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> %shuffle.i = shufflevector <4 x i32> %and7.i, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
%and10.i = and <4 x i32> %shuffle9.i, %and7.i %and8.i = and <4 x i32> %shuffle.i, %and7.i
%3 = bitcast <4 x i32> %and10.i to <2 x i64> %shuffle9.i = shufflevector <4 x i32> %and8.i, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
%vecext.i = extractelement <2 x i64> %3, i32 0 %and10.i = and <4 x i32> %shuffle9.i, %and8.i
%conv.i = trunc i64 %vecext.i to i32 %vecext.i = extractelement <4 x i32> %and10.i, i32 0
ret i32 %conv.i ret i32 %vecext.i
} }
define i32 @test_mm512_mask_reduce_or_epi32(i16 zeroext %__M, <8 x i64> %__W) { define i32 @test_mm512_mask_reduce_or_epi32(i16 zeroext %__M, <8 x i64> %__W) {
; X86-LABEL: test_mm512_mask_reduce_or_epi32: ; X86-LABEL: test_mm512_mask_reduce_or_epi32:
; X86: # %bb.0: # %entry ; X86: # %bb.0: # %entry
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1
; X86-NEXT: vmovdqa32 %zmm0, %zmm0 {%k1} {z} ; X86-NEXT: vmovdqa32 %zmm0, %zmm0 {%k1} {z}
; X86-NEXT: vextracti64x4 $1, %zmm0, %ymm1 ; X86-NEXT: vextracti64x4 $1, %zmm0, %ymm1
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; X64-NEXT: vextracti64x4 $1, %zmm0, %ymm1 ; X64-NEXT: vextracti64x4 $1, %zmm0, %ymm1
; X64-NEXT: vpor %ymm1, %ymm0, %ymm0 ; X64-NEXT: vpor %ymm1, %ymm0, %ymm0
; X64-NEXT: vextracti128 $1, %ymm0, %xmm1 ; X64-NEXT: vextracti128 $1, %ymm0, %xmm1
; X64-NEXT: vpor %xmm1, %xmm0, %xmm0 ; X64-NEXT: vpor %xmm1, %xmm0, %xmm0
; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] ; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; X64-NEXT: vpor %xmm0, %xmm1, %xmm0 ; X64-NEXT: vpor %xmm0, %xmm1, %xmm0
; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] ; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
; X64-NEXT: vpor %xmm0, %xmm1, %xmm0 ; X64-NEXT: vpor %xmm0, %xmm1, %xmm0
; X64-NEXT: vmovq %xmm0, %rax ; X64-NEXT: vmovd %xmm0, %eax
; X64-NEXT: # kill: def $eax killed $eax killed $rax
; X64-NEXT: vzeroupper ; X64-NEXT: vzeroupper
; X64-NEXT: retq ; X64-NEXT: retq
entry: entry:
%0 = bitcast <8 x i64> %__W to <16 x i32> %0 = bitcast <8 x i64> %__W to <16 x i32>
%1 = bitcast i16 %__M to <16 x i1> %1 = bitcast i16 %__M to <16 x i1>
%2 = select <16 x i1> %1, <16 x i32> %0, <16 x i32> zeroinitializer %2 = select <16 x i1> %1, <16 x i32> %0, <16 x i32> zeroinitializer
%shuffle.i = shufflevector <16 x i32> %2, <16 x i32> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> %3 = bitcast <16 x i32> %2 to <8 x i64>
%shuffle1.i = shufflevector <16 x i32> %2, <16 x i32> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> %extract.i = shufflevector <8 x i64> %3, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
%or.i = or <8 x i32> %shuffle.i, %shuffle1.i %extract3.i = shufflevector <8 x i64> %3, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
%shuffle2.i = shufflevector <8 x i32> %or.i, <8 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> %or27.i = or <4 x i64> %extract.i, %extract3.i
%shuffle3.i = shufflevector <8 x i32> %or.i, <8 x i32> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7> %extract4.i = shufflevector <4 x i64> %or27.i, <4 x i64> undef, <2 x i32> <i32 0, i32 1>
%or4.i = or <4 x i32> %shuffle2.i, %shuffle3.i %extract5.i = shufflevector <4 x i64> %or27.i, <4 x i64> undef, <2 x i32> <i32 2, i32 3>
%shuffle6.i = shufflevector <4 x i32> %or4.i, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef> %or628.i = or <2 x i64> %extract4.i, %extract5.i
%or7.i = or <4 x i32> %shuffle6.i, %or4.i %or6.i = bitcast <2 x i64> %or628.i to <4 x i32>
%shuffle9.i = shufflevector <4 x i32> %or7.i, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> %shuffle.i = shufflevector <4 x i32> %or6.i, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
%or10.i = or <4 x i32> %shuffle9.i, %or7.i %or7.i = or <4 x i32> %shuffle.i, %or6.i
%3 = bitcast <4 x i32> %or10.i to <2 x i64> %shuffle8.i = shufflevector <4 x i32> %or7.i, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
%vecext.i = extractelement <2 x i64> %3, i32 0 %or9.i = or <4 x i32> %shuffle8.i, %or7.i
%conv.i = trunc i64 %vecext.i to i32 %vecext.i = extractelement <4 x i32> %or9.i, i32 0
ret i32 %conv.i ret i32 %vecext.i
} }
define double @test_mm512_reduce_add_pd(<8 x double> %__W) { define double @test_mm512_reduce_add_pd(<8 x double> %__W) {
; X86-LABEL: test_mm512_reduce_add_pd: ; X86-LABEL: test_mm512_reduce_add_pd:
; X86: # %bb.0: # %entry ; X86: # %bb.0: # %entry
; X86-NEXT: pushl %ebp ; X86-NEXT: pushl %ebp
; X86-NEXT: .cfi_def_cfa_offset 8 ; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .cfi_offset %ebp, -8 ; X86-NEXT: .cfi_offset %ebp, -8
; X86-NEXT: movl %esp, %ebp ; X86-NEXT: movl %esp, %ebp
; X86-NEXT: .cfi_def_cfa_register %ebp ; X86-NEXT: .cfi_def_cfa_register %ebp
; X86-NEXT: andl $-8, %esp ; X86-NEXT: andl $-8, %esp
; X86-NEXT: subl $8, %esp ; X86-NEXT: subl $8, %esp
; X86-NEXT: vextractf64x4 $1, %zmm0, %ymm1 ; X86-NEXT: vextractf64x4 $1, %zmm0, %ymm1
; X86-NEXT: vaddpd %ymm1, %ymm0, %ymm0 ; X86-NEXT: vaddpd %ymm1, %ymm0, %ymm0
; X86-NEXT: vextractf128 $1, %ymm0, %xmm1 ; X86-NEXT: vextractf128 $1, %ymm0, %xmm1
; X86-NEXT: vaddpd %xmm1, %xmm0, %xmm0 ; X86-NEXT: vaddpd %xmm1, %xmm0, %xmm0
; X86-NEXT: vhaddpd %xmm0, %xmm0, %xmm0 ; X86-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
; X86-NEXT: vaddpd %xmm1, %xmm0, %xmm0
; X86-NEXT: vmovlpd %xmm0, (%esp) ; X86-NEXT: vmovlpd %xmm0, (%esp)
; X86-NEXT: fldl (%esp) ; X86-NEXT: fldl (%esp)
; X86-NEXT: movl %ebp, %esp ; X86-NEXT: movl %ebp, %esp
; X86-NEXT: popl %ebp ; X86-NEXT: popl %ebp
; X86-NEXT: .cfi_def_cfa %esp, 4 ; X86-NEXT: .cfi_def_cfa %esp, 4
; X86-NEXT: vzeroupper ; X86-NEXT: vzeroupper
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: test_mm512_reduce_add_pd: ; X64-LABEL: test_mm512_reduce_add_pd:
; X64: # %bb.0: # %entry ; X64: # %bb.0: # %entry
; X64-NEXT: vextractf64x4 $1, %zmm0, %ymm1 ; X64-NEXT: vextractf64x4 $1, %zmm0, %ymm1
; X64-NEXT: vaddpd %ymm1, %ymm0, %ymm0 ; X64-NEXT: vaddpd %ymm1, %ymm0, %ymm0
; X64-NEXT: vextractf128 $1, %ymm0, %xmm1 ; X64-NEXT: vextractf128 $1, %ymm0, %xmm1
; X64-NEXT: vaddpd %xmm1, %xmm0, %xmm0 ; X64-NEXT: vaddpd %xmm1, %xmm0, %xmm0
; X64-NEXT: vhaddpd %xmm0, %xmm0, %xmm0 ; X64-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
; X64-NEXT: vaddpd %xmm1, %xmm0, %xmm0
; X64-NEXT: vzeroupper ; X64-NEXT: vzeroupper
; X64-NEXT: retq ; X64-NEXT: retq
entry: entry:
%shuffle.i = shufflevector <8 x double> %__W, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> %shuffle.i = shufflevector <8 x double> %__W, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
%shuffle1.i = shufflevector <8 x double> %__W, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7> %shuffle1.i = shufflevector <8 x double> %__W, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
%add.i = fadd <4 x double> %shuffle.i, %shuffle1.i %add.i = fadd <4 x double> %shuffle.i, %shuffle1.i
%shuffle2.i = shufflevector <4 x double> %add.i, <4 x double> undef, <2 x i32> <i32 0, i32 1> %shuffle2.i = shufflevector <4 x double> %add.i, <4 x double> undef, <2 x i32> <i32 0, i32 1>
%shuffle3.i = shufflevector <4 x double> %add.i, <4 x double> undef, <2 x i32> <i32 2, i32 3> %shuffle3.i = shufflevector <4 x double> %add.i, <4 x double> undef, <2 x i32> <i32 2, i32 3>
%add4.i = fadd <2 x double> %shuffle2.i, %shuffle3.i %add4.i = fadd <2 x double> %shuffle2.i, %shuffle3.i
%shuffle6.i = shufflevector <2 x double> %add4.i, <2 x double> undef, <2 x i32> <i32 1, i32 undef> %shuffle6.i = shufflevector <2 x double> %add4.i, <2 x double> undef, <2 x i32> <i32 1, i32 0>
%add7.i = fadd <2 x double> %add4.i, %shuffle6.i %add7.i = fadd <2 x double> %add4.i, %shuffle6.i
%vecext.i = extractelement <2 x double> %add7.i, i32 0 %vecext.i = extractelement <2 x double> %add7.i, i32 0
ret double %vecext.i ret double %vecext.i
} }
define double @test_mm512_reduce_mul_pd(<8 x double> %__W) { define double @test_mm512_reduce_mul_pd(<8 x double> %__W) {
; X86-LABEL: test_mm512_reduce_mul_pd: ; X86-LABEL: test_mm512_reduce_mul_pd:
; X86: # %bb.0: # %entry ; X86: # %bb.0: # %entry
Show All 30 Lines
; X64-NEXT: retq ; X64-NEXT: retq
entry: entry:
%shuffle.i = shufflevector <8 x double> %__W, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> %shuffle.i = shufflevector <8 x double> %__W, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
%shuffle1.i = shufflevector <8 x double> %__W, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7> %shuffle1.i = shufflevector <8 x double> %__W, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
%mul.i = fmul <4 x double> %shuffle.i, %shuffle1.i %mul.i = fmul <4 x double> %shuffle.i, %shuffle1.i
%shuffle2.i = shufflevector <4 x double> %mul.i, <4 x double> undef, <2 x i32> <i32 0, i32 1> %shuffle2.i = shufflevector <4 x double> %mul.i, <4 x double> undef, <2 x i32> <i32 0, i32 1>
%shuffle3.i = shufflevector <4 x double> %mul.i, <4 x double> undef, <2 x i32> <i32 2, i32 3> %shuffle3.i = shufflevector <4 x double> %mul.i, <4 x double> undef, <2 x i32> <i32 2, i32 3>
%mul4.i = fmul <2 x double> %shuffle2.i, %shuffle3.i %mul4.i = fmul <2 x double> %shuffle2.i, %shuffle3.i
%shuffle6.i = shufflevector <2 x double> %mul4.i, <2 x double> undef, <2 x i32> <i32 1, i32 undef> %shuffle6.i = shufflevector <2 x double> %mul4.i, <2 x double> undef, <2 x i32> <i32 1, i32 0>
%mul7.i = fmul <2 x double> %mul4.i, %shuffle6.i %mul7.i = fmul <2 x double> %mul4.i, %shuffle6.i
%vecext.i = extractelement <2 x double> %mul7.i, i32 0 %vecext.i = extractelement <2 x double> %mul7.i, i32 0
ret double %vecext.i ret double %vecext.i
} }
define float @test_mm512_reduce_add_ps(<16 x float> %__W) { define float @test_mm512_reduce_add_ps(<16 x float> %__W) {
; X86-LABEL: test_mm512_reduce_add_ps: ; X86-LABEL: test_mm512_reduce_add_ps:
; X86: # %bb.0: # %entry ; X86: # %bb.0: # %entry
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: .cfi_def_cfa_offset 8 ; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: vextractf64x4 $1, %zmm0, %ymm1 ; X86-NEXT: vextractf64x4 $1, %zmm0, %ymm1
; X86-NEXT: vaddps %ymm1, %ymm0, %ymm0 ; X86-NEXT: vaddps %ymm1, %ymm0, %ymm0
; X86-NEXT: vextractf128 $1, %ymm0, %xmm1 ; X86-NEXT: vextractf128 $1, %ymm0, %xmm1
; X86-NEXT: vaddps %xmm1, %xmm0, %xmm0 ; X86-NEXT: vaddps %xmm1, %xmm0, %xmm0
; X86-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0] ; X86-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
; X86-NEXT: vaddps %xmm1, %xmm0, %xmm0 ; X86-NEXT: vaddps %xmm1, %xmm0, %xmm0
; X86-NEXT: vhaddps %xmm0, %xmm0, %xmm0 ; X86-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,0,3,2]
; X86-NEXT: vaddps %xmm1, %xmm0, %xmm0
; X86-NEXT: vmovss %xmm0, (%esp) ; X86-NEXT: vmovss %xmm0, (%esp)
; X86-NEXT: flds (%esp) ; X86-NEXT: flds (%esp)
; X86-NEXT: popl %eax ; X86-NEXT: popl %eax
; X86-NEXT: .cfi_def_cfa_offset 4 ; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: vzeroupper ; X86-NEXT: vzeroupper
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: test_mm512_reduce_add_ps: ; X64-LABEL: test_mm512_reduce_add_ps:
; X64: # %bb.0: # %entry ; X64: # %bb.0: # %entry
; X64-NEXT: vextractf64x4 $1, %zmm0, %ymm1 ; X64-NEXT: vextractf64x4 $1, %zmm0, %ymm1
; X64-NEXT: vaddps %ymm1, %ymm0, %ymm0 ; X64-NEXT: vaddps %ymm1, %ymm0, %ymm0
; X64-NEXT: vextractf128 $1, %ymm0, %xmm1 ; X64-NEXT: vextractf128 $1, %ymm0, %xmm1
; X64-NEXT: vaddps %xmm1, %xmm0, %xmm0 ; X64-NEXT: vaddps %xmm1, %xmm0, %xmm0
; X64-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0] ; X64-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
; X64-NEXT: vaddps %xmm1, %xmm0, %xmm0 ; X64-NEXT: vaddps %xmm1, %xmm0, %xmm0
; X64-NEXT: vhaddps %xmm0, %xmm0, %xmm0 ; X64-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,0,3,2]
; X64-NEXT: vaddps %xmm1, %xmm0, %xmm0
; X64-NEXT: vzeroupper ; X64-NEXT: vzeroupper
; X64-NEXT: retq ; X64-NEXT: retq
entry: entry:
%shuffle.i = shufflevector <16 x float> %__W, <16 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> %0 = bitcast <16 x float> %__W to <8 x double>
%shuffle1.i = shufflevector <16 x float> %__W, <16 x float> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> %extract.i = shufflevector <8 x double> %0, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
%add.i = fadd <8 x float> %shuffle.i, %shuffle1.i %1 = bitcast <4 x double> %extract.i to <8 x float>
%shuffle2.i = shufflevector <8 x float> %add.i, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> %extract2.i = shufflevector <8 x double> %0, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
%shuffle3.i = shufflevector <8 x float> %add.i, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7> %2 = bitcast <4 x double> %extract2.i to <8 x float>
%add4.i = fadd <4 x float> %shuffle2.i, %shuffle3.i %add.i = fadd <8 x float> %1, %2
%shuffle6.i = shufflevector <4 x float> %add4.i, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef> %extract3.i = shufflevector <8 x float> %add.i, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
%add7.i = fadd <4 x float> %add4.i, %shuffle6.i %extract4.i = shufflevector <8 x float> %add.i, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
%shuffle9.i = shufflevector <4 x float> %add7.i, <4 x float> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> %add5.i = fadd <4 x float> %extract3.i, %extract4.i
%add10.i = fadd <4 x float> %add7.i, %shuffle9.i %shuffle.i = shufflevector <4 x float> %add5.i, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
%vecext.i = extractelement <4 x float> %add10.i, i32 0 %add6.i = fadd <4 x float> %add5.i, %shuffle.i
%shuffle7.i = shufflevector <4 x float> %add6.i, <4 x float> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
%add8.i = fadd <4 x float> %add6.i, %shuffle7.i
%vecext.i = extractelement <4 x float> %add8.i, i32 0
ret float %vecext.i ret float %vecext.i
} }
define float @test_mm512_reduce_mul_ps(<16 x float> %__W) { define float @test_mm512_reduce_mul_ps(<16 x float> %__W) {
; X86-LABEL: test_mm512_reduce_mul_ps: ; X86-LABEL: test_mm512_reduce_mul_ps:
; X86: # %bb.0: # %entry ; X86: # %bb.0: # %entry
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: .cfi_def_cfa_offset 8 ; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: vextractf64x4 $1, %zmm0, %ymm1 ; X86-NEXT: vextractf64x4 $1, %zmm0, %ymm1
; X86-NEXT: vmulps %ymm1, %ymm0, %ymm0 ; X86-NEXT: vmulps %ymm1, %ymm0, %ymm0
; X86-NEXT: vextractf128 $1, %ymm0, %xmm1 ; X86-NEXT: vextractf128 $1, %ymm0, %xmm1
; X86-NEXT: vmulps %xmm1, %xmm0, %xmm0 ; X86-NEXT: vmulps %xmm1, %xmm0, %xmm0
; X86-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0] ; X86-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
; X86-NEXT: vmulps %xmm1, %xmm0, %xmm0 ; X86-NEXT: vmulps %xmm1, %xmm0, %xmm0
; X86-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3] ; X86-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,0,3,2]
; X86-NEXT: vmulps %xmm1, %xmm0, %xmm0 ; X86-NEXT: vmulps %xmm1, %xmm0, %xmm0
; X86-NEXT: vmovss %xmm0, (%esp) ; X86-NEXT: vmovss %xmm0, (%esp)
; X86-NEXT: flds (%esp) ; X86-NEXT: flds (%esp)
; X86-NEXT: popl %eax ; X86-NEXT: popl %eax
; X86-NEXT: .cfi_def_cfa_offset 4 ; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: vzeroupper ; X86-NEXT: vzeroupper
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: test_mm512_reduce_mul_ps: ; X64-LABEL: test_mm512_reduce_mul_ps:
; X64: # %bb.0: # %entry ; X64: # %bb.0: # %entry
; X64-NEXT: vextractf64x4 $1, %zmm0, %ymm1 ; X64-NEXT: vextractf64x4 $1, %zmm0, %ymm1
; X64-NEXT: vmulps %ymm1, %ymm0, %ymm0 ; X64-NEXT: vmulps %ymm1, %ymm0, %ymm0
; X64-NEXT: vextractf128 $1, %ymm0, %xmm1 ; X64-NEXT: vextractf128 $1, %ymm0, %xmm1
; X64-NEXT: vmulps %xmm1, %xmm0, %xmm0 ; X64-NEXT: vmulps %xmm1, %xmm0, %xmm0
; X64-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0] ; X64-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
; X64-NEXT: vmulps %xmm1, %xmm0, %xmm0 ; X64-NEXT: vmulps %xmm1, %xmm0, %xmm0
; X64-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3] ; X64-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,0,3,2]
; X64-NEXT: vmulps %xmm1, %xmm0, %xmm0 ; X64-NEXT: vmulps %xmm1, %xmm0, %xmm0
; X64-NEXT: vzeroupper ; X64-NEXT: vzeroupper
; X64-NEXT: retq ; X64-NEXT: retq
entry: entry:
%shuffle.i = shufflevector <16 x float> %__W, <16 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> %0 = bitcast <16 x float> %__W to <8 x double>
%shuffle1.i = shufflevector <16 x float> %__W, <16 x float> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> %extract.i = shufflevector <8 x double> %0, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
%mul.i = fmul <8 x float> %shuffle.i, %shuffle1.i %1 = bitcast <4 x double> %extract.i to <8 x float>
%shuffle2.i = shufflevector <8 x float> %mul.i, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> %extract2.i = shufflevector <8 x double> %0, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
%shuffle3.i = shufflevector <8 x float> %mul.i, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7> %2 = bitcast <4 x double> %extract2.i to <8 x float>
%mul4.i = fmul <4 x float> %shuffle2.i, %shuffle3.i %mul.i = fmul <8 x float> %1, %2
%shuffle6.i = shufflevector <4 x float> %mul4.i, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef> %extract3.i = shufflevector <8 x float> %mul.i, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
%mul7.i = fmul <4 x float> %mul4.i, %shuffle6.i %extract4.i = shufflevector <8 x float> %mul.i, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
%shuffle9.i = shufflevector <4 x float> %mul7.i, <4 x float> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> %mul5.i = fmul <4 x float> %extract3.i, %extract4.i
%mul10.i = fmul <4 x float> %mul7.i, %shuffle9.i %shuffle.i = shufflevector <4 x float> %mul5.i, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
%vecext.i = extractelement <4 x float> %mul10.i, i32 0 %mul6.i = fmul <4 x float> %mul5.i, %shuffle.i
%shuffle7.i = shufflevector <4 x float> %mul6.i, <4 x float> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
%mul8.i = fmul <4 x float> %mul6.i, %shuffle7.i
%vecext.i = extractelement <4 x float> %mul8.i, i32 0
ret float %vecext.i ret float %vecext.i
} }
define double @test_mm512_mask_reduce_add_pd(i8 zeroext %__M, <8 x double> %__W) { define double @test_mm512_mask_reduce_add_pd(i8 zeroext %__M, <8 x double> %__W) {
; X86-LABEL: test_mm512_mask_reduce_add_pd: ; X86-LABEL: test_mm512_mask_reduce_add_pd:
; X86: # %bb.0: # %entry ; X86: # %bb.0: # %entry
; X86-NEXT: pushl %ebp ; X86-NEXT: pushl %ebp
; X86-NEXT: .cfi_def_cfa_offset 8 ; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .cfi_offset %ebp, -8 ; X86-NEXT: .cfi_offset %ebp, -8
; X86-NEXT: movl %esp, %ebp ; X86-NEXT: movl %esp, %ebp
; X86-NEXT: .cfi_def_cfa_register %ebp ; X86-NEXT: .cfi_def_cfa_register %ebp
; X86-NEXT: andl $-8, %esp ; X86-NEXT: andl $-8, %esp
; X86-NEXT: subl $8, %esp ; X86-NEXT: subl $8, %esp
; X86-NEXT: movb 8(%ebp), %al ; X86-NEXT: movb 8(%ebp), %al
; X86-NEXT: kmovw %eax, %k1 ; X86-NEXT: kmovw %eax, %k1
; X86-NEXT: vmovapd %zmm0, %zmm0 {%k1} {z} ; X86-NEXT: vmovapd %zmm0, %zmm0 {%k1} {z}
; X86-NEXT: vextractf64x4 $1, %zmm0, %ymm1 ; X86-NEXT: vextractf64x4 $1, %zmm0, %ymm1
; X86-NEXT: vaddpd %ymm1, %ymm0, %ymm0 ; X86-NEXT: vaddpd %ymm1, %ymm0, %ymm0
; X86-NEXT: vextractf128 $1, %ymm0, %xmm1 ; X86-NEXT: vextractf128 $1, %ymm0, %xmm1
; X86-NEXT: vaddpd %xmm1, %xmm0, %xmm0 ; X86-NEXT: vaddpd %xmm1, %xmm0, %xmm0
; X86-NEXT: vhaddpd %xmm0, %xmm0, %xmm0 ; X86-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
; X86-NEXT: vaddpd %xmm1, %xmm0, %xmm0
; X86-NEXT: vmovlpd %xmm0, (%esp) ; X86-NEXT: vmovlpd %xmm0, (%esp)
; X86-NEXT: fldl (%esp) ; X86-NEXT: fldl (%esp)
; X86-NEXT: movl %ebp, %esp ; X86-NEXT: movl %ebp, %esp
; X86-NEXT: popl %ebp ; X86-NEXT: popl %ebp
; X86-NEXT: .cfi_def_cfa %esp, 4 ; X86-NEXT: .cfi_def_cfa %esp, 4
; X86-NEXT: vzeroupper ; X86-NEXT: vzeroupper
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: test_mm512_mask_reduce_add_pd: ; X64-LABEL: test_mm512_mask_reduce_add_pd:
; X64: # %bb.0: # %entry ; X64: # %bb.0: # %entry
; X64-NEXT: kmovw %edi, %k1 ; X64-NEXT: kmovw %edi, %k1
; X64-NEXT: vmovapd %zmm0, %zmm0 {%k1} {z} ; X64-NEXT: vmovapd %zmm0, %zmm0 {%k1} {z}
; X64-NEXT: vextractf64x4 $1, %zmm0, %ymm1 ; X64-NEXT: vextractf64x4 $1, %zmm0, %ymm1
; X64-NEXT: vaddpd %ymm1, %ymm0, %ymm0 ; X64-NEXT: vaddpd %ymm1, %ymm0, %ymm0
; X64-NEXT: vextractf128 $1, %ymm0, %xmm1 ; X64-NEXT: vextractf128 $1, %ymm0, %xmm1
; X64-NEXT: vaddpd %xmm1, %xmm0, %xmm0 ; X64-NEXT: vaddpd %xmm1, %xmm0, %xmm0
; X64-NEXT: vhaddpd %xmm0, %xmm0, %xmm0 ; X64-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
; X64-NEXT: vaddpd %xmm1, %xmm0, %xmm0
; X64-NEXT: vzeroupper ; X64-NEXT: vzeroupper
; X64-NEXT: retq ; X64-NEXT: retq
entry: entry:
%0 = bitcast i8 %__M to <8 x i1> %0 = bitcast i8 %__M to <8 x i1>
%1 = select <8 x i1> %0, <8 x double> %__W, <8 x double> zeroinitializer %1 = select <8 x i1> %0, <8 x double> %__W, <8 x double> zeroinitializer
%shuffle.i = shufflevector <8 x double> %1, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> %shuffle.i = shufflevector <8 x double> %1, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
%shuffle1.i = shufflevector <8 x double> %1, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7> %shuffle1.i = shufflevector <8 x double> %1, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
%add.i = fadd <4 x double> %shuffle.i, %shuffle1.i %add.i = fadd <4 x double> %shuffle.i, %shuffle1.i
%shuffle2.i = shufflevector <4 x double> %add.i, <4 x double> undef, <2 x i32> <i32 0, i32 1> %shuffle2.i = shufflevector <4 x double> %add.i, <4 x double> undef, <2 x i32> <i32 0, i32 1>
%shuffle3.i = shufflevector <4 x double> %add.i, <4 x double> undef, <2 x i32> <i32 2, i32 3> %shuffle3.i = shufflevector <4 x double> %add.i, <4 x double> undef, <2 x i32> <i32 2, i32 3>
%add4.i = fadd <2 x double> %shuffle2.i, %shuffle3.i %add4.i = fadd <2 x double> %shuffle2.i, %shuffle3.i
%shuffle6.i = shufflevector <2 x double> %add4.i, <2 x double> undef, <2 x i32> <i32 1, i32 undef> %shuffle6.i = shufflevector <2 x double> %add4.i, <2 x double> undef, <2 x i32> <i32 1, i32 0>
%add7.i = fadd <2 x double> %add4.i, %shuffle6.i %add7.i = fadd <2 x double> %add4.i, %shuffle6.i
%vecext.i = extractelement <2 x double> %add7.i, i32 0 %vecext.i = extractelement <2 x double> %add7.i, i32 0
ret double %vecext.i ret double %vecext.i
} }
define double @test_mm512_mask_reduce_mul_pd(i8 zeroext %__M, <8 x double> %__W) { define double @test_mm512_mask_reduce_mul_pd(i8 zeroext %__M, <8 x double> %__W) {
; X86-LABEL: test_mm512_mask_reduce_mul_pd: ; X86-LABEL: test_mm512_mask_reduce_mul_pd:
; X86: # %bb.0: # %entry ; X86: # %bb.0: # %entry
Show All 39 Linesentry:
%0 = bitcast i8 %__M to <8 x i1> %0 = bitcast i8 %__M to <8 x i1>
%1 = select <8 x i1> %0, <8 x double> %__W, <8 x double> <double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00> %1 = select <8 x i1> %0, <8 x double> %__W, <8 x double> <double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00>
%shuffle.i = shufflevector <8 x double> %1, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> %shuffle.i = shufflevector <8 x double> %1, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
%shuffle1.i = shufflevector <8 x double> %1, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7> %shuffle1.i = shufflevector <8 x double> %1, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
%mul.i = fmul <4 x double> %shuffle.i, %shuffle1.i %mul.i = fmul <4 x double> %shuffle.i, %shuffle1.i
%shuffle2.i = shufflevector <4 x double> %mul.i, <4 x double> undef, <2 x i32> <i32 0, i32 1> %shuffle2.i = shufflevector <4 x double> %mul.i, <4 x double> undef, <2 x i32> <i32 0, i32 1>
%shuffle3.i = shufflevector <4 x double> %mul.i, <4 x double> undef, <2 x i32> <i32 2, i32 3> %shuffle3.i = shufflevector <4 x double> %mul.i, <4 x double> undef, <2 x i32> <i32 2, i32 3>
%mul4.i = fmul <2 x double> %shuffle2.i, %shuffle3.i %mul4.i = fmul <2 x double> %shuffle2.i, %shuffle3.i
%shuffle6.i = shufflevector <2 x double> %mul4.i, <2 x double> undef, <2 x i32> <i32 1, i32 undef> %shuffle6.i = shufflevector <2 x double> %mul4.i, <2 x double> undef, <2 x i32> <i32 1, i32 0>
%mul7.i = fmul <2 x double> %mul4.i, %shuffle6.i %mul7.i = fmul <2 x double> %mul4.i, %shuffle6.i
%vecext.i = extractelement <2 x double> %mul7.i, i32 0 %vecext.i = extractelement <2 x double> %mul7.i, i32 0
ret double %vecext.i ret double %vecext.i
} }
define float @test_mm512_mask_reduce_add_ps(i16 zeroext %__M, <16 x float> %__W) { define float @test_mm512_mask_reduce_add_ps(i16 zeroext %__M, <16 x float> %__W) {
; X86-LABEL: test_mm512_mask_reduce_add_ps: ; X86-LABEL: test_mm512_mask_reduce_add_ps:
; X86: # %bb.0: # %entry ; X86: # %bb.0: # %entry
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: .cfi_def_cfa_offset 8 ; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1
; X86-NEXT: vmovaps %zmm0, %zmm0 {%k1} {z} ; X86-NEXT: vmovaps %zmm0, %zmm0 {%k1} {z}
; X86-NEXT: vextractf64x4 $1, %zmm0, %ymm1 ; X86-NEXT: vextractf64x4 $1, %zmm0, %ymm1
; X86-NEXT: vaddps %ymm1, %ymm0, %ymm0 ; X86-NEXT: vaddps %ymm1, %ymm0, %ymm0
; X86-NEXT: vextractf128 $1, %ymm0, %xmm1 ; X86-NEXT: vextractf128 $1, %ymm0, %xmm1
; X86-NEXT: vaddps %xmm1, %xmm0, %xmm0 ; X86-NEXT: vaddps %xmm1, %xmm0, %xmm0
; X86-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0] ; X86-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
; X86-NEXT: vaddps %xmm1, %xmm0, %xmm0 ; X86-NEXT: vaddps %xmm1, %xmm0, %xmm0
; X86-NEXT: vhaddps %xmm0, %xmm0, %xmm0 ; X86-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,0,3,2]
; X86-NEXT: vaddps %xmm1, %xmm0, %xmm0
; X86-NEXT: vmovss %xmm0, (%esp) ; X86-NEXT: vmovss %xmm0, (%esp)
; X86-NEXT: flds (%esp) ; X86-NEXT: flds (%esp)
; X86-NEXT: popl %eax ; X86-NEXT: popl %eax
; X86-NEXT: .cfi_def_cfa_offset 4 ; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: vzeroupper ; X86-NEXT: vzeroupper
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: test_mm512_mask_reduce_add_ps: ; X64-LABEL: test_mm512_mask_reduce_add_ps:
; X64: # %bb.0: # %entry ; X64: # %bb.0: # %entry
; X64-NEXT: kmovw %edi, %k1 ; X64-NEXT: kmovw %edi, %k1
; X64-NEXT: vmovaps %zmm0, %zmm0 {%k1} {z} ; X64-NEXT: vmovaps %zmm0, %zmm0 {%k1} {z}
; X64-NEXT: vextractf64x4 $1, %zmm0, %ymm1 ; X64-NEXT: vextractf64x4 $1, %zmm0, %ymm1
; X64-NEXT: vaddps %ymm1, %ymm0, %ymm0 ; X64-NEXT: vaddps %ymm1, %ymm0, %ymm0
; X64-NEXT: vextractf128 $1, %ymm0, %xmm1 ; X64-NEXT: vextractf128 $1, %ymm0, %xmm1
; X64-NEXT: vaddps %xmm1, %xmm0, %xmm0 ; X64-NEXT: vaddps %xmm1, %xmm0, %xmm0
; X64-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0] ; X64-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
; X64-NEXT: vaddps %xmm1, %xmm0, %xmm0 ; X64-NEXT: vaddps %xmm1, %xmm0, %xmm0
; X64-NEXT: vhaddps %xmm0, %xmm0, %xmm0 ; X64-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,0,3,2]
; X64-NEXT: vaddps %xmm1, %xmm0, %xmm0
; X64-NEXT: vzeroupper ; X64-NEXT: vzeroupper
; X64-NEXT: retq ; X64-NEXT: retq
entry: entry:
%0 = bitcast i16 %__M to <16 x i1> %0 = bitcast i16 %__M to <16 x i1>
%1 = select <16 x i1> %0, <16 x float> %__W, <16 x float> zeroinitializer %1 = select <16 x i1> %0, <16 x float> %__W, <16 x float> zeroinitializer
%shuffle.i = shufflevector <16 x float> %1, <16 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> %2 = bitcast <16 x float> %1 to <8 x double>
%shuffle1.i = shufflevector <16 x float> %1, <16 x float> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> %extract.i = shufflevector <8 x double> %2, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
%add.i = fadd <8 x float> %shuffle.i, %shuffle1.i %3 = bitcast <4 x double> %extract.i to <8 x float>
%shuffle2.i = shufflevector <8 x float> %add.i, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> %extract3.i = shufflevector <8 x double> %2, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
%shuffle3.i = shufflevector <8 x float> %add.i, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7> %4 = bitcast <4 x double> %extract3.i to <8 x float>
%add4.i = fadd <4 x float> %shuffle2.i, %shuffle3.i %add.i = fadd <8 x float> %3, %4
%shuffle6.i = shufflevector <4 x float> %add4.i, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef> %extract4.i = shufflevector <8 x float> %add.i, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
%add7.i = fadd <4 x float> %add4.i, %shuffle6.i %extract5.i = shufflevector <8 x float> %add.i, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
%shuffle9.i = shufflevector <4 x float> %add7.i, <4 x float> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> %add6.i = fadd <4 x float> %extract4.i, %extract5.i
%add10.i = fadd <4 x float> %add7.i, %shuffle9.i %shuffle.i = shufflevector <4 x float> %add6.i, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
%vecext.i = extractelement <4 x float> %add10.i, i32 0 %add7.i = fadd <4 x float> %add6.i, %shuffle.i
%shuffle8.i = shufflevector <4 x float> %add7.i, <4 x float> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
%add9.i = fadd <4 x float> %add7.i, %shuffle8.i
%vecext.i = extractelement <4 x float> %add9.i, i32 0
ret float %vecext.i ret float %vecext.i
} }
define float @test_mm512_mask_reduce_mul_ps(i16 zeroext %__M, <16 x float> %__W) { define float @test_mm512_mask_reduce_mul_ps(i16 zeroext %__M, <16 x float> %__W) {
; X86-LABEL: test_mm512_mask_reduce_mul_ps: ; X86-LABEL: test_mm512_mask_reduce_mul_ps:
; X86: # %bb.0: # %entry ; X86: # %bb.0: # %entry
; X86-NEXT: pushl %eax ; X86-NEXT: pushl %eax
; X86-NEXT: .cfi_def_cfa_offset 8 ; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1
; X86-NEXT: vbroadcastss {{.*#+}} zmm1 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1] ; X86-NEXT: vbroadcastss {{.*#+}} zmm1 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
; X86-NEXT: vmovaps %zmm0, %zmm1 {%k1} ; X86-NEXT: vmovaps %zmm0, %zmm1 {%k1}
; X86-NEXT: vextractf64x4 $1, %zmm1, %ymm0 ; X86-NEXT: vextractf64x4 $1, %zmm1, %ymm0
; X86-NEXT: vmulps %ymm0, %ymm1, %ymm0 ; X86-NEXT: vmulps %ymm0, %ymm1, %ymm0
; X86-NEXT: vextractf128 $1, %ymm0, %xmm1 ; X86-NEXT: vextractf128 $1, %ymm0, %xmm1
; X86-NEXT: vmulps %xmm1, %xmm0, %xmm0 ; X86-NEXT: vmulps %xmm1, %xmm0, %xmm0
; X86-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0] ; X86-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
; X86-NEXT: vmulps %xmm1, %xmm0, %xmm0 ; X86-NEXT: vmulps %xmm1, %xmm0, %xmm0
; X86-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3] ; X86-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,0,3,2]
; X86-NEXT: vmulps %xmm1, %xmm0, %xmm0 ; X86-NEXT: vmulps %xmm1, %xmm0, %xmm0
; X86-NEXT: vmovss %xmm0, (%esp) ; X86-NEXT: vmovss %xmm0, (%esp)
; X86-NEXT: flds (%esp) ; X86-NEXT: flds (%esp)
; X86-NEXT: popl %eax ; X86-NEXT: popl %eax
; X86-NEXT: .cfi_def_cfa_offset 4 ; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: vzeroupper ; X86-NEXT: vzeroupper
; X86-NEXT: retl ; X86-NEXT: retl
; ;
; X64-LABEL: test_mm512_mask_reduce_mul_ps: ; X64-LABEL: test_mm512_mask_reduce_mul_ps:
; X64: # %bb.0: # %entry ; X64: # %bb.0: # %entry
; X64-NEXT: kmovw %edi, %k1 ; X64-NEXT: kmovw %edi, %k1
; X64-NEXT: vbroadcastss {{.*#+}} zmm1 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1] ; X64-NEXT: vbroadcastss {{.*#+}} zmm1 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
; X64-NEXT: vmovaps %zmm0, %zmm1 {%k1} ; X64-NEXT: vmovaps %zmm0, %zmm1 {%k1}
; X64-NEXT: vextractf64x4 $1, %zmm1, %ymm0 ; X64-NEXT: vextractf64x4 $1, %zmm1, %ymm0
; X64-NEXT: vmulps %ymm0, %ymm1, %ymm0 ; X64-NEXT: vmulps %ymm0, %ymm1, %ymm0
; X64-NEXT: vextractf128 $1, %ymm0, %xmm1 ; X64-NEXT: vextractf128 $1, %ymm0, %xmm1
; X64-NEXT: vmulps %xmm1, %xmm0, %xmm0 ; X64-NEXT: vmulps %xmm1, %xmm0, %xmm0
; X64-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0] ; X64-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
; X64-NEXT: vmulps %xmm1, %xmm0, %xmm0 ; X64-NEXT: vmulps %xmm1, %xmm0, %xmm0
; X64-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3] ; X64-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,0,3,2]
; X64-NEXT: vmulps %xmm1, %xmm0, %xmm0 ; X64-NEXT: vmulps %xmm1, %xmm0, %xmm0
; X64-NEXT: vzeroupper ; X64-NEXT: vzeroupper
; X64-NEXT: retq ; X64-NEXT: retq
entry: entry:
%0 = bitcast i16 %__M to <16 x i1> %0 = bitcast i16 %__M to <16 x i1>
%1 = select <16 x i1> %0, <16 x float> %__W, <16 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00> %1 = select <16 x i1> %0, <16 x float> %__W, <16 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>
%shuffle.i = shufflevector <16 x float> %1, <16 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> %2 = bitcast <16 x float> %1 to <8 x double>
%shuffle1.i = shufflevector <16 x float> %1, <16 x float> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> %extract.i = shufflevector <8 x double> %2, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
%mul.i = fmul <8 x float> %shuffle.i, %shuffle1.i %3 = bitcast <4 x double> %extract.i to <8 x float>
%shuffle2.i = shufflevector <8 x float> %mul.i, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> %extract4.i = shufflevector <8 x double> %2, <8 x double> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
%shuffle3.i = shufflevector <8 x float> %mul.i, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7> %4 = bitcast <4 x double> %extract4.i to <8 x float>
%mul4.i = fmul <4 x float> %shuffle2.i, %shuffle3.i %mul.i = fmul <8 x float> %3, %4
%shuffle6.i = shufflevector <4 x float> %mul4.i, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef> %extract5.i = shufflevector <8 x float> %mul.i, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
%mul7.i = fmul <4 x float> %mul4.i, %shuffle6.i %extract6.i = shufflevector <8 x float> %mul.i, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
%shuffle9.i = shufflevector <4 x float> %mul7.i, <4 x float> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> %mul7.i = fmul <4 x float> %extract5.i, %extract6.i
%mul10.i = fmul <4 x float> %mul7.i, %shuffle9.i %shuffle.i = shufflevector <4 x float> %mul7.i, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
%mul8.i = fmul <4 x float> %mul7.i, %shuffle.i
%shuffle9.i = shufflevector <4 x float> %mul8.i, <4 x float> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
%mul10.i = fmul <4 x float> %mul8.i, %shuffle9.i
%vecext.i = extractelement <4 x float> %mul10.i, i32 0 %vecext.i = extractelement <4 x float> %mul10.i, i32 0
ret float %vecext.i ret float %vecext.i
} }
define i64 @test_mm512_reduce_max_epi64(<8 x i64> %__W) { define i64 @test_mm512_reduce_max_epi64(<8 x i64> %__W) {
; X86-LABEL: test_mm512_reduce_max_epi64: ; X86-LABEL: test_mm512_reduce_max_epi64:
; X86: # %bb.0: # %entry ; X86: # %bb.0: # %entry
; X86-NEXT: vshufi64x2 {{.*#+}} zmm1 = zmm0[4,5,6,7,0,1,2,3] ; X86-NEXT: vshufi64x2 {{.*#+}} zmm1 = zmm0[4,5,6,7,0,1,2,3]
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