[llvm-exegesis] Add a Configuration object for Benchmark.

[gchatelet]

Summary

This is the first step to have the BenchmarkRunner create and measure many different configurations (different initial values for instance).

[courbet]

tools/llvm-exegesis/lib/BenchmarkRunner.h

34 ↗

(On Diff #150132)

I don't think this should even be part of the configuration. This code can be the same for all instructions for a target.

[gchatelet]

Removing BenchmarkSetup instructions as suggested.

llvm/trunk/tools/llvm-exegesis/lib/BenchmarkRunner.h

 #include "LlvmState.h"
 #include "RegisterAliasing.h"
 #include "llvm/MC/MCInst.h"
 #include "llvm/Support/Error.h"
 #include <vector>
 
 namespace exegesis {
 
+// A collection of instructions that are to be assembled, executed and measured.
+struct BenchmarkConfiguration {
+  // This code is run before the Snippet is iterated. Since it is part of the
+  // measurement it should be as short as possible. It is usually used to setup
+  // the content of the Registers.
+  std::vector<llvm::MCInst> SnippetSetup;
+
+  // The sequence of instructions that are to be repeated.
+  std::vector<llvm::MCInst> Snippet;
+};
+
 // Common code for all benchmark modes.
 class BenchmarkRunner {
 public:
   explicit BenchmarkRunner(const LLVMState &State);
 
   // Subtargets can disable running benchmarks for some instructions by
   // returning an error here.
   class InstructionFilter {

 protected:
   const LLVMState &State;
   const llvm::MCInstrInfo &MCInstrInfo;
   const llvm::MCRegisterInfo &MCRegisterInfo;
 
 private:
   virtual InstructionBenchmark::ModeE getMode() const = 0;
 
-  virtual llvm::Expected<std::vector<llvm::MCInst>>
-  createSnippet(RegisterAliasingTrackerCache &RATC, unsigned Opcode,
+  virtual llvm::Expected<BenchmarkConfiguration>
+  createConfiguration(RegisterAliasingTrackerCache &RATC, unsigned Opcode,
                       llvm::raw_ostream &Debug) const = 0;
 
   virtual std::vector<BenchmarkMeasure>
   runMeasurements(const ExecutableFunction &EF,
                   const unsigned NumRepetitions) const = 0;
 
   llvm::Expected<std::string>
   writeObjectFile(llvm::ArrayRef<llvm::MCInst> Code) const;
 
   RegisterAliasingTrackerCache RATC;
 };
 
 } // namespace exegesis
 
 #endif // LLVM_TOOLS_LLVM_EXEGESIS_BENCHMARKRUNNER_H

llvm/trunk/tools/llvm-exegesis/lib/BenchmarkRunner.cpp

if (State.getInstrInfo().get(Opcode).isPseudo()) {
     InstrBenchmark.Error = "Unsupported opcode: isPseudo";
     return InstrBenchmark;
   }
   if (llvm::Error E = Filter.shouldRun(State, Opcode)) {
     InstrBenchmark.Error = llvm::toString(std::move(E));
     return InstrBenchmark;
   }
   llvm::raw_string_ostream InfoStream(InstrBenchmark.Info);
-  llvm::Expected<std::vector<llvm::MCInst>> SnippetOrError =
-      createSnippet(RATC, Opcode, InfoStream);
-  if (llvm::Error E = SnippetOrError.takeError()) {
+  llvm::Expected<BenchmarkConfiguration> ConfigurationOrError =
+      createConfiguration(RATC, Opcode, InfoStream);
+  if (llvm::Error E = ConfigurationOrError.takeError()) {
     InstrBenchmark.Error = llvm::toString(std::move(E));
     return InstrBenchmark;
   }
-  std::vector<llvm::MCInst> &Snippet = SnippetOrError.get();
+  BenchmarkConfiguration &Configuration = ConfigurationOrError.get();
+  const std::vector<llvm::MCInst> &Snippet = Configuration.Snippet;
   if (Snippet.empty()) {
     InstrBenchmark.Error = "Empty snippet";
     return InstrBenchmark;
   }
   for (const auto &MCInst : Snippet) {
     InstrBenchmark.Key.Instructions.push_back(MCInst);
   }
   InfoStream << "Snippet:\n";

llvm/trunk/tools/llvm-exegesis/lib/Latency.h

 class LatencyBenchmarkRunner : public BenchmarkRunner {
 public:
   using BenchmarkRunner::BenchmarkRunner;
   ~LatencyBenchmarkRunner() override;
 
 private:
   InstructionBenchmark::ModeE getMode() const override;
 
-  llvm::Expected<std::vector<llvm::MCInst>>
-  createSnippet(RegisterAliasingTrackerCache &RATC, unsigned OpcodeIndex,
+  llvm::Expected<BenchmarkConfiguration>
+  createConfiguration(RegisterAliasingTrackerCache &RATC, unsigned OpcodeIndex,
                       llvm::raw_ostream &Info) const override;
 
   std::vector<BenchmarkMeasure>
   runMeasurements(const ExecutableFunction &EF,
                   const unsigned NumRepetitions) const override;
 };
 
 } // namespace exegesis
 
 #endif // LLVM_TOOLS_LLVM_EXEGESIS_LATENCY_H

llvm/trunk/tools/llvm-exegesis/lib/Latency.cpp

 }
 
 LatencyBenchmarkRunner::~LatencyBenchmarkRunner() = default;
 
 InstructionBenchmark::ModeE LatencyBenchmarkRunner::getMode() const {
   return InstructionBenchmark::Latency;
 }
 
-llvm::Expected<std::vector<llvm::MCInst>>
-LatencyBenchmarkRunner::createSnippet(RegisterAliasingTrackerCache &RATC,
+llvm::Expected<BenchmarkConfiguration>
+LatencyBenchmarkRunner::createConfiguration(RegisterAliasingTrackerCache &RATC,
                                             unsigned Opcode,
                                             llvm::raw_ostream &Info) const {
-  std::vector<llvm::MCInst> Snippet;
+  BenchmarkConfiguration Configuration;
+  std::vector<llvm::MCInst> &Snippet = Configuration.Snippet;
   const llvm::MCInstrDesc &MCInstrDesc = MCInstrInfo.get(Opcode);
   const Instruction ThisInstruction(MCInstrDesc, RATC);
 
   std::string Error;
   if (IsInfeasible(ThisInstruction, Error))
     return makeError(llvm::Twine("Infeasible : ").concat(Error));
 
   const AliasingConfigurations SelfAliasing(ThisInstruction, ThisInstruction);
   if (!SelfAliasing.empty()) {
     if (!SelfAliasing.hasImplicitAliasing()) {
       Info << "explicit self cycles, selecting one aliasing configuration.\n";
       setRandomAliasing(SelfAliasing);
     } else {
       Info << "implicit Self cycles, picking random values.\n";
     }
     Snippet.push_back(randomizeUnsetVariablesAndBuild(ThisInstruction));
-    return Snippet;
+    return Configuration;
   }
 
   // Let's try to create a dependency through another opcode.
   std::vector<unsigned> Opcodes;
   Opcodes.resize(MCInstrInfo.getNumOpcodes());
   std::iota(Opcodes.begin(), Opcodes.end(), 0U);
   std::shuffle(Opcodes.begin(), Opcodes.end(), randomGenerator());
   for (const unsigned OtherOpcode : Opcodes) {
     clearVariableAssignments(ThisInstruction);
     if (OtherOpcode == Opcode)
       continue;
     const Instruction OtherInstruction(MCInstrInfo.get(OtherOpcode), RATC);
     if (IsInfeasible(OtherInstruction, Error))
       continue;
     const AliasingConfigurations Forward(ThisInstruction, OtherInstruction);
     const AliasingConfigurations Back(OtherInstruction, ThisInstruction);
     if (Forward.empty() || Back.empty())
       continue;
     setRandomAliasing(Forward);
     setRandomAliasing(Back);
     Info << "creating cycle through " << MCInstrInfo.getName(OtherOpcode)
          << ".\n";
     Snippet.push_back(randomizeUnsetVariablesAndBuild(ThisInstruction));
     Snippet.push_back(randomizeUnsetVariablesAndBuild(OtherInstruction));
-    return Snippet;
+    return Configuration;
   }
 
   return makeError(
       "Infeasible : Didn't find any scheme to make the instruction serial\n");
 }
 
 std::vector<BenchmarkMeasure>
 LatencyBenchmarkRunner::runMeasurements(const ExecutableFunction &Function,

llvm/trunk/tools/llvm-exegesis/lib/Uops.h

 class UopsBenchmarkRunner : public BenchmarkRunner {
 public:
   using BenchmarkRunner::BenchmarkRunner;
   ~UopsBenchmarkRunner() override;
 
 private:
   InstructionBenchmark::ModeE getMode() const override;
 
-  llvm::Expected<std::vector<llvm::MCInst>>
-  createSnippet(RegisterAliasingTrackerCache &RATC, unsigned Opcode,
+  llvm::Expected<BenchmarkConfiguration>
+  createConfiguration(RegisterAliasingTrackerCache &RATC, unsigned Opcode,
                       llvm::raw_ostream &Info) const override;
 
   std::vector<BenchmarkMeasure>
   runMeasurements(const ExecutableFunction &EF,
                   const unsigned NumRepetitions) const override;
 };
 
 } // namespace exegesis
 
 #endif // LLVM_TOOLS_LLVM_EXEGESIS_UOPS_H

llvm/trunk/tools/llvm-exegesis/lib/Uops.cpp

 }
 
 UopsBenchmarkRunner::~UopsBenchmarkRunner() = default;
 
 InstructionBenchmark::ModeE UopsBenchmarkRunner::getMode() const {
   return InstructionBenchmark::Uops;
 }
 
-llvm::Expected<std::vector<llvm::MCInst>>
-UopsBenchmarkRunner::createSnippet(RegisterAliasingTrackerCache &RATC,
+llvm::Expected<BenchmarkConfiguration>
+UopsBenchmarkRunner::createConfiguration(RegisterAliasingTrackerCache &RATC,
                                          unsigned Opcode,
                                          llvm::raw_ostream &Info) const {
-  std::vector<llvm::MCInst> Snippet;
+  BenchmarkConfiguration Configuration;
+  std::vector<llvm::MCInst> &Snippet = Configuration.Snippet;
   const llvm::MCInstrDesc &MCInstrDesc = MCInstrInfo.get(Opcode);
   const Instruction Instruction(MCInstrDesc, RATC);
 
   std::string Error;
   if (isInfeasible(Instruction, Error)) {
     llvm::report_fatal_error(llvm::Twine("Infeasible : ").concat(Error));
   }
 
   const AliasingConfigurations SelfAliasing(Instruction, Instruction);
   if (SelfAliasing.empty()) {
     Info << "instruction is parallel, repeating a random one.\n";
     Snippet.push_back(randomizeUnsetVariablesAndBuild(Instruction));
-    return Snippet;
+    return Configuration;
   }
   if (SelfAliasing.hasImplicitAliasing()) {
     Info << "instruction is serial, repeating a random one.\n";
     Snippet.push_back(randomizeUnsetVariablesAndBuild(Instruction));
-    return Snippet;
+    return Configuration;
   }
   const auto TiedVariables = getTiedVariables(Instruction);
   if (!TiedVariables.empty()) {
     if (TiedVariables.size() > 1) {
       Info << "Not yet implemented, don't know how to handle several tied "
               "variables\n";
       return makeError("Infeasible : don't know how to handle several tied "
                        "variables");
     }
     Info << "instruction has tied variables using static renaming.\n";
     Variable *Var = TiedVariables.front();
     assert(Var);
     assert(!Var->TiedOperands.empty());
     const Operand &Operand = *Var->TiedOperands.front();
     assert(Operand.Tracker);
     for (const llvm::MCPhysReg Reg : Operand.Tracker->sourceBits().set_bits()) {
       clearVariableAssignments(Instruction);
       Var->AssignedValue = llvm::MCOperand::createReg(Reg);
       Snippet.push_back(randomizeUnsetVariablesAndBuild(Instruction));
     }
-    return Snippet;
+    return Configuration;
   }
   // No tied variables, we pick random values for defs.
   llvm::BitVector Defs(MCRegisterInfo.getNumRegs());
   for (const auto &Op : Instruction.Operands) {
     if (Op.Tracker && Op.IsExplicit && Op.IsDef) {
       assert(Op.Var);
       auto PossibleRegisters = Op.Tracker->sourceBits();
       remove(PossibleRegisters, RATC.reservedRegisters());
if (Op.Tracker && Op.IsExplicit && !Op.IsDef) {
       assert(PossibleRegisters.any() && "No register left to choose from");
       const auto RandomReg = randomBit(PossibleRegisters);
       Op.Var->AssignedValue = llvm::MCOperand::createReg(RandomReg);
     }
   }
   Info
       << "instruction has no tied variables picking Uses different from defs\n";
   Snippet.push_back(randomizeUnsetVariablesAndBuild(Instruction));
-  return Snippet;
+  return Configuration;
 }
 
 std::vector<BenchmarkMeasure>
 UopsBenchmarkRunner::runMeasurements(const ExecutableFunction &Function,
                                      const unsigned NumRepetitions) const {
   const auto &SchedModel = State.getSubtargetInfo().getSchedModel();
 
   std::vector<BenchmarkMeasure> Result;