When working with the scheduler in regards to SystemZ WriteLatencys, I came across cases where the mapping from SchedWrite entry to MI def operands (mapped by the ordering) were corrupted by implicit def operands added by regalloc. The specific register was "CC", which is an implicitly defined register part of the MCInstrDesc.
Since regalloc will not put its implicit-def operands last in list, I believe the right fix is to ignore those when carefully looking up the def index in findDefIdx.
If approved, I will hopefully commit this soon with SystemZ SchedModel improvements.